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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=paolo.bonzini@gmail.com; helo=mail-ed1-x531.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1639923578442100002 Content-Type: text/plain; charset="utf-8" Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- configure | 67 ++++++++++++++++++++++++++----------------------------- 1 file changed, 32 insertions(+), 35 deletions(-) diff --git a/configure b/configure index f0a82dd8f5..77ccc15b73 100755 --- a/configure +++ b/configure @@ -636,32 +636,47 @@ else fi =20 ARCH=3D -# Normalise host CPU name and set ARCH. +# Normalise host CPU name, set ARCH and multilib cflags # Note that this case should only have supported host CPUs, not guests. case "$cpu" in - ppc|ppc64|s390x|sparc64|x32|riscv) - ;; - ppc64le) - ARCH=3D"ppc64" - ;; + aarch64|riscv) ;; + armv*b|armv*l|arm) + cpu=3D"arm" ;; + i386|i486|i586|i686|i86pc|BePC) cpu=3D"i386" - ;; + CPU_CFLAGS=3D"-m32" ;; + x32) + CPU_CFLAGS=3D"-mx32" ;; x86_64|amd64) cpu=3D"x86_64" - ;; - armv*b|armv*l|arm) - cpu=3D"arm" - ;; - aarch64) - cpu=3D"aarch64" - ;; + # ??? Only extremely old AMD cpus do not have cmpxchg16b. + # If we truly care, we should simply detect this case at + # runtime and generate the fallback to serial emulation. + CPU_CFLAGS=3D"-m64 -mcx16" ;; + mips*) - cpu=3D"mips" - ;; + cpu=3D"mips" ;; + + ppc) + CPU_CFLAGS=3D"-m32" ;; + ppc64) + CPU_CFLAGS=3D"-m64" ;; + ppc64le) + ARCH=3D"ppc64" ;; + + s390) + CPU_CFLAGS=3D"-m31" + ARCH=3Dunknown ;; + s390x) + CPU_CFLAGS=3D"-m64" ;; + sparc|sun4[cdmuv]) cpu=3D"sparc" - ;; + CPU_CFLAGS=3D"-m32 -mv8plus -mcpu=3Dultrasparc" ;; + sparc64) + CPU_CFLAGS=3D"-m64 -mcpu=3Dultrasparc" ;; + *) # This will result in either an error or falling back to TCI later ARCH=3Dunknown @@ -1252,24 +1267,6 @@ local_statedir=3D"${local_statedir:-$prefix/var}" firmwarepath=3D"${firmwarepath:-$datadir/qemu-firmware}" localedir=3D"${localedir:-$datadir/locale}" =20 -case "$cpu" in - ppc) CPU_CFLAGS=3D"-m32" ;; - ppc64) CPU_CFLAGS=3D"-m64" ;; - sparc) CPU_CFLAGS=3D"-m32 -mv8plus -mcpu=3Dultrasparc" ;; - sparc64) CPU_CFLAGS=3D"-m64 -mcpu=3Dultrasparc" ;; - s390) CPU_CFLAGS=3D"-m31" ;; - s390x) CPU_CFLAGS=3D"-m64" ;; - i386) CPU_CFLAGS=3D"-m32" ;; - x32) CPU_CFLAGS=3D"-mx32" ;; - - # ??? Only extremely old AMD cpus do not have cmpxchg16b. - # If we truly care, we should simply detect this case at - # runtime and generate the fallback to serial emulation. - x86_64) CPU_CFLAGS=3D"-m64 -mcx16" ;; - - # No special flags required for other host CPUs -esac - if eval test -z "\${cross_cc_$cpu}"; then eval "cross_cc_${cpu}=3D\$cc" cross_cc_vars=3D"$cross_cc_vars cross_cc_${cpu}" --=20 2.33.1