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[83.50.185.174]) by smtp.gmail.com with ESMTPSA id h19sm10834055wmq.0.2021.12.18.07.11.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Dec 2021 07:11:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1639840269; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=AGAlxPyEcsvzR3DZ2hxvZ+MjXjPRcaMiHyCHLICfCkI=; b=R7ECEwJlEyMCoeCS8DygZGiIrEzZ8bLdpSOar5gp9EaLS8Xt2VO+a3F4ipRbvLNPGxsGHB PlwxgE0p9Dfzj3rCeB6euSAsjV1rrLnWVmKG7BaqrBFOs/EhEoKocXueozHxGXZsf9ddek 9LDT+/vLeq2NRXRvSRF9aBYW+TMgj5c= X-MC-Unique: PGmQDydZOQWwiPqaCd_KQQ-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AGAlxPyEcsvzR3DZ2hxvZ+MjXjPRcaMiHyCHLICfCkI=; b=cqbZdGhMIunrfVtymNi6be+u9ys1Vyfz4Vf/ueTpYISPsaFS1nLvWeyBdUqB9rBlES /QcfkTHAMxzp36cUkqX1+bXjiBSTtORVhz+WjyM6AobkyLP7MwvTcCk1GTTNHOAwwhVB FLhA3sN36INuZvStVVKufHMR7x9qa2p6dEBI/LwaKzAbg9boRHc7mL6ZlVSJP3ph76kV bTmmhmDNG4EJOVnMScUQ+3ZYUq8ZYQoPhFxKKn+OvGNkg05H+/tYmTG57GWEFK2ac0km qwYt069I6dDjYLyWbxQ09httG7T3HX+++r4tAa4Hyrnm7jBemAmVtc3H1bWlVWV5hSHG 4t3g== X-Gm-Message-State: AOAM531daC5MqT68rmyV7bbIdjSFVBg/e1IOZRDlXexDTjVEC0Qf6S5i XHEMrQpQRDJ+Ge+o2F+e11scC/mgiYvtDk7N+oOcTbtFQusz+xVxbpO9p880m1Vw5WKyWxmxAHi qmwsSlLeNT9k0jg== X-Received: by 2002:a5d:42c8:: with SMTP id t8mr2553674wrr.369.1639840264695; Sat, 18 Dec 2021 07:11:04 -0800 (PST) X-Google-Smtp-Source: ABdhPJyVcbonj/g9x8/hXip0ziuZ5aoWdu2h5eM68JELiBXzA0r8rmWZVZNhbp3pFj24ZyM2UY5XZw== X-Received: by 2002:a5d:42c8:: with SMTP id t8mr2553646wrr.369.1639840264467; Sat, 18 Dec 2021 07:11:04 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Fam Zheng , "Michael S. Tsirkin" , Sven Schnelle , qemu-block@nongnu.org, Li Qiang , Jason Wang , Stefan Weil , David Hildenbrand , Dmitry Fleytman , Peter Xu , Hannes Reinecke , Gerd Hoffmann , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Qiuhao Li , Alexander Bulekov , Paolo Bonzini Subject: [PATCH 2/5] dma: Let st*_pci_dma() take MemTxAttrs argument Date: Sat, 18 Dec 2021 16:10:50 +0100 Message-Id: <20211218151053.1545962-3-philmd@redhat.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211218151053.1545962-1-philmd@redhat.com> References: <20211218151053.1545962-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1639840271814100001 Let devices specify transaction attributes when calling st*_pci_dma(). Keep the default MEMTXATTRS_UNSPECIFIED in the few callers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- include/hw/pci/pci.h | 11 ++++++----- hw/audio/intel-hda.c | 10 ++++++---- hw/net/eepro100.c | 29 ++++++++++++++++++----------- hw/net/tulip.c | 18 ++++++++++-------- hw/scsi/megasas.c | 15 ++++++++++----- hw/scsi/vmw_pvscsi.c | 3 ++- 6 files changed, 52 insertions(+), 34 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 8c5f2ed5054..9f51ef2c3c2 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -859,11 +859,12 @@ static inline MemTxResult pci_dma_write(PCIDevice *de= v, dma_addr_t addr, MEMTXATTRS_UNSPECIFIED); \ return val; \ } \ - static inline void st##_s##_pci_dma(PCIDevice *dev, \ - dma_addr_t addr, uint##_bits##_t v= al) \ - { \ - st##_s##_dma(pci_get_address_space(dev), addr, val, \ - MEMTXATTRS_UNSPECIFIED); \ + static inline void st##_s##_pci_dma(PCIDevice *dev, \ + dma_addr_t addr, \ + uint##_bits##_t val, \ + MemTxAttrs attrs) \ + { \ + st##_s##_dma(pci_get_address_space(dev), addr, val, attrs); \ } =20 PCI_DMA_DEFINE_LDST(ub, b, 8); diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index fb3d34a4a0c..3309ae0ea18 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -345,6 +345,7 @@ static void intel_hda_corb_run(IntelHDAState *d) =20 static void intel_hda_response(HDACodecDevice *dev, bool solicited, uint32= _t response) { + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; HDACodecBus *bus =3D HDA_BUS(dev->qdev.parent_bus); IntelHDAState *d =3D container_of(bus, IntelHDAState, codecs); hwaddr addr; @@ -367,8 +368,8 @@ static void intel_hda_response(HDACodecDevice *dev, boo= l solicited, uint32_t res ex =3D (solicited ? 0 : (1 << 4)) | dev->cad; wp =3D (d->rirb_wp + 1) & 0xff; addr =3D intel_hda_addr(d->rirb_lbase, d->rirb_ubase); - stl_le_pci_dma(&d->pci, addr + 8*wp, response); - stl_le_pci_dma(&d->pci, addr + 8*wp + 4, ex); + stl_le_pci_dma(&d->pci, addr + 8 * wp, response, attrs); + stl_le_pci_dma(&d->pci, addr + 8 * wp + 4, ex, attrs); d->rirb_wp =3D wp; =20 dprint(d, 2, "%s: [wp 0x%x] response 0x%x, extra 0x%x\n", @@ -394,6 +395,7 @@ static void intel_hda_response(HDACodecDevice *dev, boo= l solicited, uint32_t res static bool intel_hda_xfer(HDACodecDevice *dev, uint32_t stnr, bool output, uint8_t *buf, uint32_t len) { + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; HDACodecBus *bus =3D HDA_BUS(dev->qdev.parent_bus); IntelHDAState *d =3D container_of(bus, IntelHDAState, codecs); hwaddr addr; @@ -428,7 +430,7 @@ static bool intel_hda_xfer(HDACodecDevice *dev, uint32_= t stnr, bool output, st->be, st->bp, st->bpl[st->be].len, copy); =20 pci_dma_rw(&d->pci, st->bpl[st->be].addr + st->bp, buf, copy, !out= put, - MEMTXATTRS_UNSPECIFIED); + attrs); st->lpib +=3D copy; st->bp +=3D copy; buf +=3D copy; @@ -451,7 +453,7 @@ static bool intel_hda_xfer(HDACodecDevice *dev, uint32_= t stnr, bool output, if (d->dp_lbase & 0x01) { s =3D st - d->st; addr =3D intel_hda_addr(d->dp_lbase & ~0x01, d->dp_ubase); - stl_le_pci_dma(&d->pci, addr + 8*s, st->lpib); + stl_le_pci_dma(&d->pci, addr + 8 * s, st->lpib, attrs); } dprint(d, 3, "dma: --\n"); =20 diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c index 16e95ef9cc9..83c4431b1ad 100644 --- a/hw/net/eepro100.c +++ b/hw/net/eepro100.c @@ -700,6 +700,8 @@ static void set_ru_state(EEPRO100State * s, ru_state_t = state) =20 static void dump_statistics(EEPRO100State * s) { + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; + /* Dump statistical data. Most data is never changed by the emulation * and always 0, so we first just copy the whole block and then those * values which really matter. @@ -707,16 +709,18 @@ static void dump_statistics(EEPRO100State * s) */ pci_dma_write(&s->dev, s->statsaddr, &s->statistics, s->stats_size); stl_le_pci_dma(&s->dev, s->statsaddr + 0, - s->statistics.tx_good_frames); + s->statistics.tx_good_frames, attrs); stl_le_pci_dma(&s->dev, s->statsaddr + 36, - s->statistics.rx_good_frames); + s->statistics.rx_good_frames, attrs); stl_le_pci_dma(&s->dev, s->statsaddr + 48, - s->statistics.rx_resource_errors); + s->statistics.rx_resource_errors, attrs); stl_le_pci_dma(&s->dev, s->statsaddr + 60, - s->statistics.rx_short_frame_errors); + s->statistics.rx_short_frame_errors, attrs); #if 0 - stw_le_pci_dma(&s->dev, s->statsaddr + 76, s->statistics.xmt_tco_frame= s); - stw_le_pci_dma(&s->dev, s->statsaddr + 78, s->statistics.rcv_tco_frame= s); + stw_le_pci_dma(&s->dev, s->statsaddr + 76, + s->statistics.xmt_tco_frames, attrs); + stw_le_pci_dma(&s->dev, s->statsaddr + 78, + s->statistics.rcv_tco_frames, attrs); missing("CU dump statistical counters"); #endif } @@ -833,6 +837,7 @@ static void set_multicast_list(EEPRO100State *s) =20 static void action_command(EEPRO100State *s) { + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; /* The loop below won't stop if it gets special handcrafted data. Therefore we limit the number of iterations. */ unsigned max_loop_count =3D 16; @@ -911,7 +916,7 @@ static void action_command(EEPRO100State *s) } /* Write new status. */ stw_le_pci_dma(&s->dev, s->cb_address, - s->tx.status | ok_status | STATUS_C); + s->tx.status | ok_status | STATUS_C, attrs); if (bit_i) { /* CU completed action. */ eepro100_cx_interrupt(s); @@ -937,6 +942,7 @@ static void action_command(EEPRO100State *s) =20 static void eepro100_cu_command(EEPRO100State * s, uint8_t val) { + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; cu_state_t cu_state; switch (val) { case CU_NOP: @@ -986,7 +992,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint= 8_t val) /* Dump statistical counters. */ TRACE(OTHER, logout("val=3D0x%02x (dump stats)\n", val)); dump_statistics(s); - stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa005); + stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa005, attr= s); break; case CU_CMD_BASE: /* Load CU base. */ @@ -997,7 +1003,7 @@ static void eepro100_cu_command(EEPRO100State * s, uin= t8_t val) /* Dump and reset statistical counters. */ TRACE(OTHER, logout("val=3D0x%02x (dump stats and reset)\n", val)); dump_statistics(s); - stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa007); + stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa007, attr= s); memset(&s->statistics, 0, sizeof(s->statistics)); break; case CU_SRESUME: @@ -1612,6 +1618,7 @@ static ssize_t nic_receive(NetClientState *nc, const = uint8_t * buf, size_t size) * - Magic packets should set bit 30 in power management driver regist= er. * - Interesting packets should set bit 29 in power management driver = register. */ + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; EEPRO100State *s =3D qemu_get_nic_opaque(nc); uint16_t rfd_status =3D 0xa000; #if defined(CONFIG_PAD_RECEIVED_FRAMES) @@ -1726,9 +1733,9 @@ static ssize_t nic_receive(NetClientState *nc, const = uint8_t * buf, size_t size) TRACE(OTHER, logout("command 0x%04x, link 0x%08x, addr 0x%08x, size %u= \n", rfd_command, rx.link, rx.rx_buf_addr, rfd_size)); stw_le_pci_dma(&s->dev, s->ru_base + s->ru_offset + - offsetof(eepro100_rx_t, status), rfd_status); + offsetof(eepro100_rx_t, status), rfd_status, attrs); stw_le_pci_dma(&s->dev, s->ru_base + s->ru_offset + - offsetof(eepro100_rx_t, count), size); + offsetof(eepro100_rx_t, count), size, attrs); /* Early receive interrupt not supported. */ #if 0 eepro100_er_interrupt(s); diff --git a/hw/net/tulip.c b/hw/net/tulip.c index ca69f7ea5e1..1f2c79dd58b 100644 --- a/hw/net/tulip.c +++ b/hw/net/tulip.c @@ -86,16 +86,18 @@ static void tulip_desc_read(TULIPState *s, hwaddr p, static void tulip_desc_write(TULIPState *s, hwaddr p, struct tulip_descriptor *desc) { + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; + if (s->csr[0] & CSR0_DBO) { - stl_be_pci_dma(&s->dev, p, desc->status); - stl_be_pci_dma(&s->dev, p + 4, desc->control); - stl_be_pci_dma(&s->dev, p + 8, desc->buf_addr1); - stl_be_pci_dma(&s->dev, p + 12, desc->buf_addr2); + stl_be_pci_dma(&s->dev, p, desc->status, attrs); + stl_be_pci_dma(&s->dev, p + 4, desc->control, attrs); + stl_be_pci_dma(&s->dev, p + 8, desc->buf_addr1, attrs); + stl_be_pci_dma(&s->dev, p + 12, desc->buf_addr2, attrs); } else { - stl_le_pci_dma(&s->dev, p, desc->status); - stl_le_pci_dma(&s->dev, p + 4, desc->control); - stl_le_pci_dma(&s->dev, p + 8, desc->buf_addr1); - stl_le_pci_dma(&s->dev, p + 12, desc->buf_addr2); + stl_le_pci_dma(&s->dev, p, desc->status, attrs); + stl_le_pci_dma(&s->dev, p + 4, desc->control, attrs); + stl_le_pci_dma(&s->dev, p + 8, desc->buf_addr1, attrs); + stl_le_pci_dma(&s->dev, p + 12, desc->buf_addr2, attrs); } } =20 diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index cf8adf39ca1..bcf8de9aa19 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -168,14 +168,16 @@ static void megasas_frame_set_cmd_status(MegasasState= *s, unsigned long frame, uint8_t v) { PCIDevice *pci =3D &s->parent_obj; - stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, cmd_status)= , v); + stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, cmd_status), + v, MEMTXATTRS_UNSPECIFIED); } =20 static void megasas_frame_set_scsi_status(MegasasState *s, unsigned long frame, uint8_t v) { PCIDevice *pci =3D &s->parent_obj; - stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, scsi_status= ), v); + stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, scsi_status= ), + v, MEMTXATTRS_UNSPECIFIED); } =20 static inline const char *mfi_frame_desc(unsigned int cmd) @@ -530,6 +532,7 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *= s, =20 static void megasas_complete_frame(MegasasState *s, uint64_t context) { + const MemTxAttrs attrs =3D MEMTXATTRS_UNSPECIFIED; PCIDevice *pci_dev =3D PCI_DEVICE(s); int tail, queue_offset; =20 @@ -543,10 +546,12 @@ static void megasas_complete_frame(MegasasState *s, u= int64_t context) */ if (megasas_use_queue64(s)) { queue_offset =3D s->reply_queue_head * sizeof(uint64_t); - stq_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, cont= ext); + stq_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, + context, attrs); } else { queue_offset =3D s->reply_queue_head * sizeof(uint32_t); - stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, cont= ext); + stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, + context, attrs); } s->reply_queue_tail =3D ldl_le_pci_dma(pci_dev, s->consumer_pa); trace_megasas_qf_complete(context, s->reply_queue_head, @@ -560,7 +565,7 @@ static void megasas_complete_frame(MegasasState *s, uin= t64_t context) s->reply_queue_head =3D megasas_next_index(s, tail, s->fw_cmds); trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail, s->busy); - stl_le_pci_dma(pci_dev, s->producer_pa, s->reply_queue_head); + stl_le_pci_dma(pci_dev, s->producer_pa, s->reply_queue_head, attrs= ); /* Notify HBA */ if (msix_enabled(pci_dev)) { trace_megasas_msix_raise(0); diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index cd76bd67ab7..59c3e8ba048 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -55,7 +55,8 @@ (m)->rs_pa + offsetof(struct PVSCSIRingsState, field))) #define RS_SET_FIELD(m, field, val) \ (stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \ - (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), va= l)) + (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), va= l, \ + MEMTXATTRS_UNSPECIFIED)) =20 struct PVSCSIClass { PCIDeviceClass parent_class; --=20 2.33.1