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[83.50.185.174]) by smtp.gmail.com with ESMTPSA id t8sm13573464wmq.32.2021.12.18.06.51.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Dec 2021 06:51:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1639839085; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bxXh1e9uR1KdSHTOMds7EyxV50BzcbCDpkVbWnbmGRU=; b=dIN3O3rEqVq/ZBo3l+GCLKYysZBbnRrStm4Sg3F++zgQ9m1ZGqOAB3Mklcs4hB4sJzW38F cJvVm3pFthgtJR/hmd9J9pdTVm2BFF1YB56W0ezmVMGXNHfx/j1YsqsQG7bxc/jx26apuN eCsESX+tUalyTTR1+XGDu+1/0zoRHqk= X-MC-Unique: zQXCaiVuMcC9XvD1Upybrg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bxXh1e9uR1KdSHTOMds7EyxV50BzcbCDpkVbWnbmGRU=; b=r8gyeNKRPi3ELUAKXGyZUfTxoRorxBq7enl0vzoIzeS7XYy8djpJl+14XSLzpxxexj 9oR6a06EnEQh6yhaVL5ZazzXTj6S/9XjyArL4eyxjshzuKiluvLvZE3G6hLOpd55Gg/6 0XcVjFeZpUCmbR5iWvns8LcGTSk+N+xcBG6CKOT3mAtNF9yLxXpKjn/WDK+Ik673YhEf BfoX3Fi2P2bz+rqLKcUdSsMPfsr5wn0VvzQ90bsKfCWvt1PkayC2NhGSy8qNi6xZf1V+ 6KoVivbYQnA7JuDPMufz4ufPVzV25LwpurnYI0V4X4W2FR6ZLu3zw+WYeAT6lU1tC0zN 8AWw== X-Gm-Message-State: AOAM533tT8dEGmlQt7ZwkbQoKyt+gSuDmOrQY8EXS43HLib9MmvW796n 9D2VAaVsOKZmLIs5cTujMuTY+yWMG5a+KhFDyJfDBz/Ab9aJmajRHSzBnhtWf+wdz5EpnsdIomu X1TmBRnPQ+feGSQ== X-Received: by 2002:a05:600c:4e91:: with SMTP id f17mr7024730wmq.195.1639839083482; Sat, 18 Dec 2021 06:51:23 -0800 (PST) X-Google-Smtp-Source: ABdhPJzL6TyP6/rkdxsCrYt4gNZ19Dy2WBm2NXceq2ru8HCXlZbolaZPYlQJ0NQwCf6LLBY7hPuYDA== X-Received: by 2002:a05:600c:4e91:: with SMTP id f17mr7024714wmq.195.1639839083327; Sat, 18 Dec 2021 06:51:23 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , David Hildenbrand , "Michael S. Tsirkin" , qemu-ppc@nongnu.org, Peter Xu , Alexander Bulekov , Qiuhao Li , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Li Qiang , Greg Kurz , Paolo Bonzini , Gerd Hoffmann , David Gibson , Daniel Henrique Barboza , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 2/4] dma: Let ld*_dma() take MemTxAttrs argument Date: Sat, 18 Dec 2021 15:51:09 +0100 Message-Id: <20211218145111.1540114-3-philmd@redhat.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211218145111.1540114-1-philmd@redhat.com> References: <20211218145111.1540114-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1639839089004100001 Let devices specify transaction attributes when calling ld*_dma(). Keep the default MEMTXATTRS_UNSPECIFIED in the few callers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Richard Henderson --- include/hw/pci/pci.h | 3 ++- include/hw/ppc/spapr_vio.h | 3 ++- include/sysemu/dma.h | 11 ++++++----- hw/intc/pnv_xive.c | 7 ++++--- hw/usb/hcd-xhci.c | 6 +++--- 5 files changed, 17 insertions(+), 13 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index d07e9707b48..0613308b1b6 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -854,7 +854,8 @@ static inline MemTxResult pci_dma_write(PCIDevice *dev,= dma_addr_t addr, static inline uint##_bits##_t ld##_l##_pci_dma(PCIDevice *dev, \ dma_addr_t addr) \ { \ - return ld##_l##_dma(pci_get_address_space(dev), addr); \ + return ld##_l##_dma(pci_get_address_space(dev), addr, \ + MEMTXATTRS_UNSPECIFIED); \ } \ static inline void st##_s##_pci_dma(PCIDevice *dev, \ dma_addr_t addr, uint##_bits##_t v= al) \ diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h index e87f8e6f596..d2ec9b0637f 100644 --- a/include/hw/ppc/spapr_vio.h +++ b/include/hw/ppc/spapr_vio.h @@ -126,7 +126,8 @@ static inline int spapr_vio_dma_set(SpaprVioDevice *dev= , uint64_t taddr, (stl_be_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED)) #define vio_stq(_dev, _addr, _val) \ (stq_be_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED)) -#define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr))) +#define vio_ldq(_dev, _addr) \ + (ldq_be_dma(&(_dev)->as, (_addr), MEMTXATTRS_UNSPECIFIED)) =20 int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq); =20 diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h index 2a60d2c5d61..b711d390a4f 100644 --- a/include/sysemu/dma.h +++ b/include/sysemu/dma.h @@ -242,10 +242,11 @@ static inline void dma_memory_unmap(AddressSpace *as, =20 #define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \ static inline uint##_bits##_t ld##_lname##_##_end##_dma(AddressSpace *= as, \ - dma_addr_t add= r) \ + dma_addr_t add= r, \ + MemTxAttrs att= rs) \ { \ uint##_bits##_t val; \ - dma_memory_read(as, addr, &val, (_bits) / 8, MEMTXATTRS_UNSPECIFIE= D); \ + dma_memory_read(as, addr, &val, (_bits) / 8, attrs); \ return _end##_bits##_to_cpu(val); \ } \ static inline void st##_sname##_##_end##_dma(AddressSpace *as, \ @@ -254,14 +255,14 @@ static inline void dma_memory_unmap(AddressSpace *as, MemTxAttrs attrs) \ { \ val =3D cpu_to_##_end##_bits(val); \ - dma_memory_write(as, addr, &val, (_bits) / 8, attrs); \ + dma_memory_write(as, addr, &val, (_bits) / 8, attrs); \ } =20 -static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr) +static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr, MemTxAtt= rs attrs) { uint8_t val; =20 - dma_memory_read(as, addr, &val, 1, MEMTXATTRS_UNSPECIFIED); + dma_memory_read(as, addr, &val, 1, attrs); return val; } =20 diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index ad43483612e..d9249bbc0c1 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -172,7 +172,7 @@ static uint64_t pnv_xive_vst_addr_indirect(PnvXive *xiv= e, uint32_t type, =20 /* Get the page size of the indirect table. */ vsd_addr =3D vsd & VSD_ADDRESS_MASK; - vsd =3D ldq_be_dma(&address_space_memory, vsd_addr); + vsd =3D ldq_be_dma(&address_space_memory, vsd_addr, MEMTXATTRS_UNSPECI= FIED); =20 if (!(vsd & VSD_ADDRESS_MASK)) { #ifdef XIVE_DEBUG @@ -195,7 +195,8 @@ static uint64_t pnv_xive_vst_addr_indirect(PnvXive *xiv= e, uint32_t type, /* Load the VSD we are looking for, if not already done */ if (vsd_idx) { vsd_addr =3D vsd_addr + vsd_idx * XIVE_VSD_SIZE; - vsd =3D ldq_be_dma(&address_space_memory, vsd_addr); + vsd =3D ldq_be_dma(&address_space_memory, vsd_addr, + MEMTXATTRS_UNSPECIFIED); =20 if (!(vsd & VSD_ADDRESS_MASK)) { #ifdef XIVE_DEBUG @@ -542,7 +543,7 @@ static uint64_t pnv_xive_vst_per_subpage(PnvXive *xive,= uint32_t type) =20 /* Get the page size of the indirect table. */ vsd_addr =3D vsd & VSD_ADDRESS_MASK; - vsd =3D ldq_be_dma(&address_space_memory, vsd_addr); + vsd =3D ldq_be_dma(&address_space_memory, vsd_addr, MEMTXATTRS_UNSPECI= FIED); =20 if (!(vsd & VSD_ADDRESS_MASK)) { #ifdef XIVE_DEBUG diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index ed2b9ea456e..d960b814587 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -2062,7 +2062,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, un= signed int slotid, assert(slotid >=3D 1 && slotid <=3D xhci->numslots); =20 dcbaap =3D xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); - poctx =3D ldq_le_dma(xhci->as, dcbaap + 8 * slotid); + poctx =3D ldq_le_dma(xhci->as, dcbaap + 8 * slotid, MEMTXATTRS_UNSPECI= FIED); ictx =3D xhci_mask64(pictx); octx =3D xhci_mask64(poctx); =20 @@ -3437,8 +3437,8 @@ static int usb_xhci_post_load(void *opaque, int versi= on_id) if (!slot->addressed) { continue; } - slot->ctx =3D - xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid)); + slot->ctx =3D xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid, + MEMTXATTRS_UNSPECIFIED)); xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); slot->uport =3D xhci_lookup_uport(xhci, slot_ctx); if (!slot->uport) { --=20 2.33.1