From nobody Mon Feb 9 19:43:49 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.53 as permitted sender) client-ip=209.85.221.53; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f53.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.53 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1639784101; cv=none; d=zohomail.com; s=zohoarc; b=aQFDn/ZiLyaoS2xuK2VBV6kE+1XvcxvNYV0/6rHlW9W0t0iagAxlAFs9FqH2o1KCs4Glv5UzVXkZsWYpRn74zFCSeTTg/5Zq8w2p4Jf3k/nAdn/C/GGYX4mKRUXYJzUKbR+U/EJEESTZn2TAQtzS5wYYtIOPqZFI3skDdROAXuk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1639784101; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:MIME-Version:Message-ID:Sender:Subject:To; bh=WJ9MwYBX4+lyuOeNMHH9h1NX0u1BTkZPB1Qpp/P6bb8=; b=joaCw35oibgeNad7z8CWbOWsRj/z7G9KX5uJiQLyU71xf5n39gE5AzqU//14+jqPkTcqw0PAs/6YbzFB5ck0DKzJRrf+YglEY5/RlP6B7FzUeakKViuI7ylulfPtAVIEM6vPA7TD7O3ZrHoIXOFrV5SO8MxsSyeCpd/srxeAeZg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.53 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) by mx.zohomail.com with SMTPS id 1639784101317547.0038869593512; Fri, 17 Dec 2021 15:35:01 -0800 (PST) Received: by mail-wr1-f53.google.com with SMTP id v11so6807553wrw.10 for ; Fri, 17 Dec 2021 15:35:00 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (174.red-83-50-185.dynamicip.rima-tde.net. [83.50.185.174]) by smtp.gmail.com with ESMTPSA id g11sm2966646wri.73.2021.12.17.15.34.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Dec 2021 15:34:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=WJ9MwYBX4+lyuOeNMHH9h1NX0u1BTkZPB1Qpp/P6bb8=; b=eeWx5WwtmOtVkA+qNCfj+ruMDzyX0Rqq+bDSyy5RRua1pirCiI4brAh+LlPF63R03U 8xTQawHo37cYrM2jED3XuGdRjlGr4A1dtA9jBk4grAGohmEseICrH/Fn1n3vnKE2bg3j ZgAT/wgiSLPgQMtvVZbitg3fm3jaMFYRPU25qxE2vaTnpTSDk6zY7eBVAQcM63mZWSuj hbxncAjHabT/8ErZC9PzHQGNkTDcuq62oSh6LctXQpAmbL5TpFJoqbee+h7ljP7hqn5B WEYRBiGUGsyajNyjLV5XYWAGtLx/anq5hPFmVDVdFGt+4rhmA+Uazb5afFdeeiKCWhj1 r1rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=WJ9MwYBX4+lyuOeNMHH9h1NX0u1BTkZPB1Qpp/P6bb8=; b=Lxetb6GxFWBZC/turkflK5W6dSskj+VX/Q+LERVR0cJNz3ZCZi0TeVp/rpwiYn/u0V 7tBUQ8nMdXA/5ilRX1bfKvVY/ZlWNO4gq0g6kIPCvE7UozE3gBMIGa2K5u97biSGEe/P 143pldLKjyHCLsYCSkzwtP6Z3aolFJdln6LGN7J7MzbXBF2MP6NH1CY2jOEmiOnCoiFI 7RUw2ecb6k2dVoMMEtJi0YB0fUamI+MfX0STyHq81e8OVfyJUTHcigZsEkm+QO9g14ev p/IEcM03POpTUb0slvj5smBEu7kiCwi1PUvtCEu15vwqOtE8gcSXKg5EVW36aWWFK4Aw xSrA== X-Gm-Message-State: AOAM530ob9tSpihXmYcVyPAN6fJc8y43+8g0dm0Wmr5extRSCx+S0cvU TGVILqYlZr4tVI2EaVZ3akg= X-Google-Smtp-Source: ABdhPJxVo607sIzUdoibbyxQgweTvbHcQMpz8ZCkzBOdPAplRS0Z+nMckSzUSJvbQN+cpG3jnnuZnA== X-Received: by 2002:a5d:5303:: with SMTP id e3mr4228971wrv.73.1639784099665; Fri, 17 Dec 2021 15:34:59 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH] target/mips: Align vector registers to 16 bytes Date: Sat, 18 Dec 2021 00:34:56 +0100 Message-Id: <20211217233456.1475527-1-f4bug@amsat.org> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1639784103338100001 Align fpr_t to 16 bytes to be able to use the TCG "Generic" vector operation expansion API from "tcg/tcg-op-gvec.h", otherwise we trigger assertions in check_size_align(). See commits ec8e23e37f8 (s390x) and 11e2bfef799 (i386) for similar justifications. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/mips/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 56b1cbd091d..15b983f7104 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -30,7 +30,7 @@ union fpr_t { uint32_t w[2]; /* binary single fixed-point */ /* FPU/MSA register mapping is not tested on big-endian hosts. */ wr_t wr; /* vector data */ -}; +} QEMU_ALIGNED(16); /* *define FP_ENDIAN_IDX to access the same location * in the fpr_t union regardless of the host endianness --=20 2.33.1