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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 13/33] target/arm: Advance pc for arch single-step exception
Date: Wed, 15 Dec 2021 10:40:29 +0000
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From: Richard Henderson <richard.henderson@linaro.org>
The size of the code covered by a TranslationBlock cannot be 0;
this is checked via assert in tb_gen_code.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-a64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 9c4258ccac2..2986fe13935 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14767,6 +14767,7 @@ static void aarch64_tr_translate_insn(DisasContextB=
ase *dcbase, CPUState *cpu)
assert(s->base.num_insns =3D=3D 1);
gen_swstep_exception(s, 0, 0);
s->base.is_jmp =3D DISAS_NORETURN;
+ s->base.pc_next =3D pc + 4;
return;
}
=20
--=20
2.25.1