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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id m20sm2205300wmq.11.2021.12.11.11.11.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Dec 2021 11:11:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=c1o4mDLZEUBKMimLD4cOggkbAQaeevicaB7Ui64CkcA=; b=cm7LZ2nLSSXFaQG2uEPioagcmhgdRRouvLtD9+Srv+OhsMUGXyvWYCsuAD5jjaZYOO c9R/u0AP/8FneAYZarqNTmA1AaRCFZl0uhR82w+lULBkKPKR8m3DsTOofO/SrpfbisGo 0cdcDy3l5wGov2X6lOOE2gBlGU8XNNjgHMjhLHwY49LG4ZZqGayn6v/baopi92mDdqi8 5FGI+8ugiO+aDPgOr+MXWbsL3sg2zdLU1owTXWOS5XheqyEFGO7brMw5mrZ3h2yL0/bz cXjtUgGgZXNeG274BB72tTzJWO/elOYVZuJuLINgnZzq71qHNUOVmJJlN/XaoY3DXgE0 1Wxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c1o4mDLZEUBKMimLD4cOggkbAQaeevicaB7Ui64CkcA=; b=BP8+sGE9DOcO2RVW9rGjsBxh9bbw/XemB/wvOXNd7Eks9q3TvH23VAe3uS0xA1qGUN FIqc1PsbR5HknYV28TI65/uI9c2eo3b7eZxiM4eNKhENvQOSH/AibU0PlSwji5Fz1Q9W 1hAPfTavaMbcQMSBuyqkQ7F58gjQMjybNvPOdqYRLjemaYi8eY0RKd1SfsVmePC4KOBf 6jF26I5wJUpC97px0sj79gpXvI+wDyu0H6OtSmi5SLRaEmx/J3Va+GAyjqjAdlXmaBPb OIDlLCJJG3hXydfKjdhK6PBvcLVRfsy5UgVWWuKxpz+rDBx9ZhVdo7qj5w1t3vvAjuZq Naug== X-Gm-Message-State: AOAM530uXj185hPQXK1M3YlCQQkL1q2UOJHnfcBpTZM4ctdXBQrQ8gSc iNLPpL5JH/CADq9Pr65oyA2MSw== X-Google-Smtp-Source: ABdhPJzqo5NCKvodjX4ja98EmGIcdRvfqMwdCZvhX6di+SU4DGmHSoRgHzm3dyCrDxHXLtFda+ZwLQ== X-Received: by 2002:a7b:c306:: with SMTP id k6mr25785958wmj.15.1639249906394; Sat, 11 Dec 2021 11:11:46 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 10/26] hw/intc/arm_gicv3_its: Use FIELD macros for DTEs Date: Sat, 11 Dec 2021 19:11:19 +0000 Message-Id: <20211211191135.1764649-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211211191135.1764649-1-peter.maydell@linaro.org> References: <20211211191135.1764649-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2a00:1450:4864:20::335 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Shashi Mallela , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1639250583133100005 Content-Type: text/plain; charset="utf-8" Currently the ITS code that reads and writes DTEs uses open-coded shift-and-mask to assemble the various fields into the 64-bit DTE word. The names of the macros used for mask and shift values are also somewhat inconsistent, and don't follow our usual convention that a MASK macro should specify the bits in their place in the word. Replace all these with use of the FIELD macro. Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- hw/intc/gicv3_internal.h | 7 ++++--- hw/intc/arm_gicv3_its.c | 20 +++++++++----------- 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 5a63e9ed5ce..6a3b145f377 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -393,9 +393,10 @@ FIELD(ITE_H, VPEID, 16, 16) * Valid =3D 1 bit,ITTAddr =3D 44 bits,Size =3D 5 bits */ #define GITS_DTE_SIZE (0x8ULL) -#define GITS_DTE_ITTADDR_SHIFT 6 -#define GITS_DTE_ITTADDR_MASK MAKE_64BIT_MASK(GITS_DTE_ITTADDR_SHI= FT, \ - ITTADDR_LENGTH) + +FIELD(DTE, VALID, 0, 1) +FIELD(DTE, SIZE, 1, 5) +FIELD(DTE, ITTADDR, 6, 44) =20 /* * 8 bytes Collection Table Entry size diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 6f21c56fba2..7a217b00f89 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -114,7 +114,7 @@ static bool update_ite(GICv3ITSState *s, uint32_t event= id, uint64_t dte, uint64_t itt_addr; MemTxResult res =3D MEMTX_OK; =20 - itt_addr =3D (dte & GITS_DTE_ITTADDR_MASK) >> GITS_DTE_ITTADDR_SHIFT; + itt_addr =3D FIELD_EX64(dte, DTE, ITTADDR); itt_addr <<=3D ITTADDR_SHIFT; /* 256 byte aligned */ =20 address_space_stq_le(as, itt_addr + (eventid * (sizeof(uint64_t) + @@ -141,7 +141,7 @@ static bool get_ite(GICv3ITSState *s, uint32_t eventid,= uint64_t dte, bool status =3D false; IteEntry ite =3D {}; =20 - itt_addr =3D (dte & GITS_DTE_ITTADDR_MASK) >> GITS_DTE_ITTADDR_SHIFT; + itt_addr =3D FIELD_EX64(dte, DTE, ITTADDR); itt_addr <<=3D ITTADDR_SHIFT; /* 256 byte aligned */ =20 ite.itel =3D address_space_ldq_le(as, itt_addr + @@ -255,10 +255,10 @@ static bool process_its_cmd(GICv3ITSState *s, uint64_= t value, uint32_t offset, if (res !=3D MEMTX_OK) { return result; } - dte_valid =3D dte & TABLE_ENTRY_VALID_MASK; + dte_valid =3D FIELD_EX64(dte, DTE, VALID); =20 if (dte_valid) { - max_eventid =3D (1UL << (((dte >> 1U) & SIZE_MASK) + 1)); + max_eventid =3D 1UL << (FIELD_EX64(dte, DTE, SIZE) + 1); =20 ite_valid =3D get_ite(s, eventid, dte, &icid, &pIntid, &res); =20 @@ -375,10 +375,8 @@ static bool process_mapti(GICv3ITSState *s, uint64_t v= alue, uint32_t offset, if (res !=3D MEMTX_OK) { return result; } - dte_valid =3D dte & TABLE_ENTRY_VALID_MASK; - - max_eventid =3D (1UL << (((dte >> 1U) & SIZE_MASK) + 1)); - + dte_valid =3D FIELD_EX64(dte, DTE, VALID); + max_eventid =3D 1UL << (FIELD_EX64(dte, DTE, SIZE) + 1); max_Intid =3D (1ULL << (GICD_TYPER_IDBITS + 1)) - 1; =20 if ((devid > s->dt.max_ids) || (icid > s->ct.max_ids) @@ -529,9 +527,9 @@ static bool update_dte(GICv3ITSState *s, uint32_t devid= , bool valid, if (s->dt.valid) { if (valid) { /* add mapping entry to device table */ - dte =3D (valid & TABLE_ENTRY_VALID_MASK) | - ((size & SIZE_MASK) << 1U) | - (itt_addr << GITS_DTE_ITTADDR_SHIFT); + dte =3D FIELD_DP64(dte, DTE, VALID, 1); + dte =3D FIELD_DP64(dte, DTE, SIZE, size); + dte =3D FIELD_DP64(dte, DTE, ITTADDR, itt_addr); } } else { return true; --=20 2.25.1