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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id f4sm2087955pfg.34.2021.12.09.23.59.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Dec 2021 23:59:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=G/bxD72SIoO6o9ENO+P7JZeFz7QdNgXm1K2JM1+CVUY=; b=NiK6wIEhCOM9lJc4u72plYM8aRe4qdEgfz76lrIsu88YqZOyAYStSfnqrPQ3BZ916C FPeUdB9qqsmUoX9YX8G5z6Ra8LCg5ul30o2yfVeRhtGWQRPqP3YiEdLYHYsk3EA0dx91 ldjo5WxQiqoLn/ZI9N6DBhyWBmoCfluJI6fKnh/srsbjlXTOW0Gw3L4rR4QBC1xPkScA 4cl94wI59ZX0W2saja8b5z18cs6j1jW9jYyY10RcgSSshO16Pz1itQ+8fzDai3j6FoJU 4NgzefHxb84SEREIm1k6d0MGKXMKcd+BETSKP54D18r4Yr+135bd4bkzyUClb29ni7LY Fm0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=G/bxD72SIoO6o9ENO+P7JZeFz7QdNgXm1K2JM1+CVUY=; b=3Nv2VeFzzGNiy+6lskuhy/BFT3/0qEjfxJbJKg+03ZSJPkA3z0/CEO0nCMcLa4kWdk jFYrqllfV34r5dIwOIXM9YCSIJMgv5MKOWJ1LlhpN1V9a55pcwrMybbG1zoofwIwvOEQ SGTUFz2MQ3nBt62wL17NsGLNd7gnlss31ZoqL0RAmn39Moo0JOi+beBR5Uyfilfb4nWw 44aoVo6i+mwsha10UVfJXh0xZwcB3OF7OJRcvZHeNJAEoVZNKCLMCDbsvT9vE4kHSN99 +JEqjNVdHfgtideaLXeb6Kkx8HoTPEmSakKUZnwJyLveXG1kE+fs7RwmVTSfkm226g93 LJeg== X-Gm-Message-State: AOAM5309us8XhoFeYaTCw1Rfugd/Db9yeZa4YEgcn3IrXGOIFxYP1msm rTXJ+VinbSZiTrKOROr4Qa1bBHd2xn2/TPvk X-Google-Smtp-Source: ABdhPJxtoH1eN/nXI7t2+8Yecs81oqy/5A7iOwHLFsEVYaUpzyo4DDhC668TN5Nocqo8zUoHD/+Bag== X-Received: by 2002:a17:902:f551:b0:143:759c:6a30 with SMTP id h17-20020a170902f55100b00143759c6a30mr74550666plf.0.1639123143088; Thu, 09 Dec 2021 23:59:03 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v11 35/77] target/riscv: rvv-1.0: register gather instructions Date: Fri, 10 Dec 2021 15:56:21 +0800 Message-Id: <20211210075704.23951-36-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211210075704.23951-1-frank.chang@sifive.com> References: <20211210075704.23951-1-frank.chang@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: permerror (zohomail.com: Error in processing SPF Record) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1639125143526100003 Content-Type: text/plain; charset="utf-8" From: Frank Chang * Add vrgatherei16.vv instruction. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/helper.h | 4 ++++ target/riscv/insn32.decode | 1 + target/riscv/insn_trans/trans_rvv.c.inc | 27 ++++++++++++++++++++++--- target/riscv/vector_helper.c | 23 ++++++++++++--------- 4 files changed, 43 insertions(+), 12 deletions(-) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 7646567eb2..bd0768d048 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -1059,6 +1059,10 @@ DEF_HELPER_6(vrgather_vv_b, void, ptr, ptr, ptr, ptr= , env, i32) DEF_HELPER_6(vrgather_vv_h, void, ptr, ptr, ptr, ptr, env, i32) DEF_HELPER_6(vrgather_vv_w, void, ptr, ptr, ptr, ptr, env, i32) DEF_HELPER_6(vrgather_vv_d, void, ptr, ptr, ptr, ptr, env, i32) +DEF_HELPER_6(vrgatherei16_vv_b, void, ptr, ptr, ptr, ptr, env, i32) +DEF_HELPER_6(vrgatherei16_vv_h, void, ptr, ptr, ptr, ptr, env, i32) +DEF_HELPER_6(vrgatherei16_vv_w, void, ptr, ptr, ptr, ptr, env, i32) +DEF_HELPER_6(vrgatherei16_vv_d, void, ptr, ptr, ptr, ptr, env, i32) DEF_HELPER_6(vrgather_vx_b, void, ptr, ptr, tl, ptr, env, i32) DEF_HELPER_6(vrgather_vx_h, void, ptr, ptr, tl, ptr, env, i32) DEF_HELPER_6(vrgather_vx_w, void, ptr, ptr, tl, ptr, env, i32) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index ab274dcde1..4653a9679e 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -645,6 +645,7 @@ vslidedown_vx 001111 . ..... ..... 100 ..... 1010111 = @r_vm vslidedown_vi 001111 . ..... ..... 011 ..... 1010111 @r_vm vslide1down_vx 001111 . ..... ..... 110 ..... 1010111 @r_vm vrgather_vv 001100 . ..... ..... 000 ..... 1010111 @r_vm +vrgatherei16_vv 001110 . ..... ..... 000 ..... 1010111 @r_vm vrgather_vx 001100 . ..... ..... 100 ..... 1010111 @r_vm vrgather_vi 001100 . ..... ..... 011 ..... 1010111 @r_vm vcompress_vm 010111 - ..... ..... 010 ..... 1010111 @r diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index 4207cc4e6b..322fc5c4aa 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -3090,7 +3090,25 @@ static bool vrgather_vv_check(DisasContext *s, arg_r= mrr *a) require_vm(a->vm, a->rd); } =20 +static bool vrgatherei16_vv_check(DisasContext *s, arg_rmrr *a) +{ + int8_t emul =3D MO_16 - s->sew + s->lmul; + return require_rvv(s) && + vext_check_isa_ill(s) && + (emul >=3D -3 && emul <=3D 3) && + require_align(a->rd, s->lmul) && + require_align(a->rs1, emul) && + require_align(a->rs2, s->lmul) && + (a->rd !=3D a->rs2 && a->rd !=3D a->rs1) && + !is_overlapped(a->rd, 1 << MAX(s->lmul, 0), + a->rs1, 1 << MAX(emul, 0)) && + !is_overlapped(a->rd, 1 << MAX(s->lmul, 0), + a->rs2, 1 << MAX(s->lmul, 0)) && + require_vm(a->vm, a->rd); +} + GEN_OPIVV_TRANS(vrgather_vv, vrgather_vv_check) +GEN_OPIVV_TRANS(vrgatherei16_vv, vrgatherei16_vv_check) =20 static bool vrgather_vx_check(DisasContext *s, arg_rmrr *a) { @@ -3110,7 +3128,8 @@ static bool trans_vrgather_vx(DisasContext *s, arg_rm= rr *a) } =20 if (a->vm && s->vl_eq_vlmax) { - int vlmax =3D s->vlen; + int scale =3D s->lmul - (s->sew + 3); + int vlmax =3D scale < 0 ? s->vlen >> -scale : s->vlen << scale; TCGv_i64 dest =3D tcg_temp_new_i64(); =20 if (a->rs1 =3D=3D 0) { @@ -3141,8 +3160,10 @@ static bool trans_vrgather_vi(DisasContext *s, arg_r= mrr *a) } =20 if (a->vm && s->vl_eq_vlmax) { - if (a->rs1 >=3D s->vlen) { - tcg_gen_gvec_dup_imm(SEW64, vreg_ofs(s, a->rd), + int scale =3D s->lmul - (s->sew + 3); + int vlmax =3D scale < 0 ? s->vlen >> -scale : s->vlen << scale; + if (a->rs1 >=3D vlmax) { + tcg_gen_gvec_dup_imm(MO_64, vreg_ofs(s, a->rd), MAXSZ(s), MAXSZ(s), 0); } else { tcg_gen_gvec_dup_mem(s->sew, vreg_ofs(s, a->rd), diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index b0dc971a86..86d03d8e39 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -4460,11 +4460,11 @@ GEN_VEXT_VSLIDE1DOWN_VX(vslide1down_vx_w, uint32_t,= H4) GEN_VEXT_VSLIDE1DOWN_VX(vslide1down_vx_d, uint64_t, H8) =20 /* Vector Register Gather Instruction */ -#define GEN_VEXT_VRGATHER_VV(NAME, ETYPE, H) \ +#define GEN_VEXT_VRGATHER_VV(NAME, TS1, TS2, HS1, HS2) \ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ CPURISCVState *env, uint32_t desc) \ { \ - uint32_t vlmax =3D vext_max_elems(desc, ctzl(sizeof(ETYPE))); = \ + uint32_t vlmax =3D vext_max_elems(desc, ctzl(sizeof(TS1))); = \ uint32_t vm =3D vext_vm(desc); = \ uint32_t vl =3D env->vl; = \ uint64_t index; \ @@ -4474,20 +4474,25 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, vo= id *vs2, \ if (!vm && !vext_elem_mask(v0, i)) { \ continue; \ } \ - index =3D *((ETYPE *)vs1 + H(i)); = \ + index =3D *((TS1 *)vs1 + HS1(i)); = \ if (index >=3D vlmax) { = \ - *((ETYPE *)vd + H(i)) =3D 0; = \ + *((TS2 *)vd + HS2(i)) =3D 0; = \ } else { \ - *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(index)); = \ + *((TS2 *)vd + HS2(i)) =3D *((TS2 *)vs2 + HS2(index)); = \ } \ } \ } =20 /* vd[i] =3D (vs1[i] >=3D VLMAX) ? 0 : vs2[vs1[i]]; */ -GEN_VEXT_VRGATHER_VV(vrgather_vv_b, uint8_t, H1) -GEN_VEXT_VRGATHER_VV(vrgather_vv_h, uint16_t, H2) -GEN_VEXT_VRGATHER_VV(vrgather_vv_w, uint32_t, H4) -GEN_VEXT_VRGATHER_VV(vrgather_vv_d, uint64_t, H8) +GEN_VEXT_VRGATHER_VV(vrgather_vv_b, uint8_t, uint8_t, H1, H1) +GEN_VEXT_VRGATHER_VV(vrgather_vv_h, uint16_t, uint16_t, H2, H2) +GEN_VEXT_VRGATHER_VV(vrgather_vv_w, uint32_t, uint32_t, H4, H4) +GEN_VEXT_VRGATHER_VV(vrgather_vv_d, uint64_t, uint64_t, H8, H8) + +GEN_VEXT_VRGATHER_VV(vrgatherei16_vv_b, uint16_t, uint8_t, H2, H1) +GEN_VEXT_VRGATHER_VV(vrgatherei16_vv_h, uint16_t, uint16_t, H2, H2) +GEN_VEXT_VRGATHER_VV(vrgatherei16_vv_w, uint16_t, uint32_t, H2, H4) +GEN_VEXT_VRGATHER_VV(vrgatherei16_vv_d, uint16_t, uint64_t, H2, H8) =20 #define GEN_VEXT_VRGATHER_VX(NAME, ETYPE, H) \ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \ --=20 2.31.1