From nobody Mon Feb 9 18:45:29 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1638156760101867.7979918876974; Sun, 28 Nov 2021 19:32:40 -0800 (PST) Received: from localhost ([::1]:57890 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mrXPC-00007G-VM for importer@patchew.org; Sun, 28 Nov 2021 22:32:39 -0500 Received: from eggs.gnu.org ([209.51.188.92]:45106) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mrX0g-0008Oh-92 for qemu-devel@nongnu.org; Sun, 28 Nov 2021 22:07:18 -0500 Received: from [2607:f8b0:4864:20::1033] (port=38405 helo=mail-pj1-x1033.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mrX0e-0000cs-7V for qemu-devel@nongnu.org; Sun, 28 Nov 2021 22:07:17 -0500 Received: by mail-pj1-x1033.google.com with SMTP id p18-20020a17090ad31200b001a78bb52876so14337217pju.3 for ; Sun, 28 Nov 2021 19:07:15 -0800 (PST) Received: from frankchang-ThinkPad-T490.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id oj11sm17904040pjb.46.2021.11.28.19.07.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Nov 2021 19:07:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3de1QWSxsLbVEtrXoIF2Dgw1CuI6VK1mnDrbwoO2Ag4=; b=KomlzGbHfBrID+ipFQDEwI3a2etktQaw9OW+FH2JKe4F6AfISFtqPgWmxfZgXCDjqd yIFnGiygMiKAolvGvPx+309D1GcXVRgspj9bfefFXhGHUJp7CfFd+WxM76vhuqXkbnMe /A/NfHSwmDn9BMuYtBUuT7GlB9l4LpCIqdTRUZ0IV2dTEx/4CG3BRCe6QC6QhXY7vDyW HvN8wtgUcmIA2ZI1PaNSgSVqbtgbbif45dkmKV4nZFlBGaKTshtETtrE2xRB247J5Ugw QXbjdJhMRHDf8I3T31Y/sF3dlOCvjs+UEyClfyxEj8D9EVWUSv48cLdCbfEf6VPJg0SG J8Ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3de1QWSxsLbVEtrXoIF2Dgw1CuI6VK1mnDrbwoO2Ag4=; b=lHoTcD37JrXdV19Kb3/Whgn5d2VZsyle6oFT5YtKUcDt1vxfWdW7Ljy5VNEXvd9r47 SDHs8sgHtrisJtj9ZKc/H1RN8qx26flMKpaZYIoyrjJvnlawEJoc5aaHLL29OyFYLT9q UTIyvf1SWCscV2fI9a3RLibIBfeC4AHSbAd0awxXWlPMEG3e64UYF+D5D3l4LrDPWoIr ZRw/e7zei+TeC0fuMrgf8bdSPqugXXssjfGQ9UX0c2JnqzwVdEazV3vLgHK+w6K7GX1N z6TCx0nigJe4gzqnCZJmX+Y7ePv74Qa9Whj9Wf+ND89VB4siXIiNw6DTzRycLTbL/6oA erNg== X-Gm-Message-State: AOAM533DYX9ePcL6H4+ZmzJmBsywypnk/3oxUa/XpnMVU/k4JzXPHiGc YUXSi/uPRbfEg+drO9hU6jSLXhMc6YXUw21s X-Google-Smtp-Source: ABdhPJwrreOYsyNRFSEWYw8Rd31FLg9H8dXlAd1+Ar11enQ1ivA66r4n6b4tc8ep1G2xR+HdOD5pNA== X-Received: by 2002:a17:902:7c02:b0:143:9d6a:8e42 with SMTP id x2-20020a1709027c0200b001439d6a8e42mr56584644pll.80.1638155234815; Sun, 28 Nov 2021 19:07:14 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v10 43/77] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow Date: Mon, 29 Nov 2021 11:03:03 +0800 Message-Id: <20211129030340.429689-44-frank.chang@sifive.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211129030340.429689-1-frank.chang@sifive.com> References: <20211129030340.429689-1-frank.chang@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1638156761806100001 Content-Type: text/plain; charset="utf-8" From: Frank Chang * Only do carry-in or borrow-in if is masked (vm=3D0). * Remove clear function from helper functions as the tail elements are unchanged in RVV 1.0. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn32.decode | 20 ++++++++++---------- target/riscv/insn_trans/trans_rvv.c.inc | 2 +- target/riscv/vector_helper.c | 21 ++++++--------------- 3 files changed, 17 insertions(+), 26 deletions(-) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index f83c8daf24e..9c4089d7a7b 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -378,16 +378,16 @@ vwsubu_wv 110110 . ..... ..... 010 ..... 101011= 1 @r_vm vwsubu_wx 110110 . ..... ..... 110 ..... 1010111 @r_vm vwsub_wv 110111 . ..... ..... 010 ..... 1010111 @r_vm vwsub_wx 110111 . ..... ..... 110 ..... 1010111 @r_vm -vadc_vvm 010000 1 ..... ..... 000 ..... 1010111 @r_vm_1 -vadc_vxm 010000 1 ..... ..... 100 ..... 1010111 @r_vm_1 -vadc_vim 010000 1 ..... ..... 011 ..... 1010111 @r_vm_1 -vmadc_vvm 010001 1 ..... ..... 000 ..... 1010111 @r_vm_1 -vmadc_vxm 010001 1 ..... ..... 100 ..... 1010111 @r_vm_1 -vmadc_vim 010001 1 ..... ..... 011 ..... 1010111 @r_vm_1 -vsbc_vvm 010010 1 ..... ..... 000 ..... 1010111 @r_vm_1 -vsbc_vxm 010010 1 ..... ..... 100 ..... 1010111 @r_vm_1 -vmsbc_vvm 010011 1 ..... ..... 000 ..... 1010111 @r_vm_1 -vmsbc_vxm 010011 1 ..... ..... 100 ..... 1010111 @r_vm_1 +vadc_vvm 010000 0 ..... ..... 000 ..... 1010111 @r_vm_1 +vadc_vxm 010000 0 ..... ..... 100 ..... 1010111 @r_vm_1 +vadc_vim 010000 0 ..... ..... 011 ..... 1010111 @r_vm_1 +vmadc_vvm 010001 . ..... ..... 000 ..... 1010111 @r_vm +vmadc_vxm 010001 . ..... ..... 100 ..... 1010111 @r_vm +vmadc_vim 010001 . ..... ..... 011 ..... 1010111 @r_vm +vsbc_vvm 010010 0 ..... ..... 000 ..... 1010111 @r_vm_1 +vsbc_vxm 010010 0 ..... ..... 100 ..... 1010111 @r_vm_1 +vmsbc_vvm 010011 . ..... ..... 000 ..... 1010111 @r_vm +vmsbc_vxm 010011 . ..... ..... 100 ..... 1010111 @r_vm vand_vv 001001 . ..... ..... 000 ..... 1010111 @r_vm vand_vx 001001 . ..... ..... 100 ..... 1010111 @r_vm vand_vi 001001 . ..... ..... 011 ..... 1010111 @r_vm diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index 48942129135..357615a11c3 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -1547,7 +1547,7 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a= ) \ =20 /* * For vadc and vsbc, an illegal instruction exception is raised if the - * destination vector register is v0 and LMUL > 1. (Section 12.3) + * destination vector register is v0 and LMUL > 1. (Section 12.4) */ static bool opivv_vadc_check(DisasContext *s, arg_rmrr *a) { diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 6891f28116f..54405d898b9 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -944,7 +944,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *= vs2, \ for (i =3D 0; i < vl; i++) { \ ETYPE s1 =3D *((ETYPE *)vs1 + H(i)); \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ - uint8_t carry =3D vext_elem_mask(v0, i); \ + ETYPE carry =3D vext_elem_mask(v0, i); \ \ *((ETYPE *)vd + H(i)) =3D DO_OP(s2, s1, carry); \ } \ @@ -969,7 +969,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, = void *vs2, \ \ for (i =3D 0; i < vl; i++) { = \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); = \ - uint8_t carry =3D vext_elem_mask(v0, i); = \ + ETYPE carry =3D vext_elem_mask(v0, i); = \ \ *((ETYPE *)vd + H(i)) =3D DO_OP(s2, (ETYPE)(target_long)s1, carry)= ;\ } \ @@ -994,20 +994,15 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void= *vs2, \ CPURISCVState *env, uint32_t desc) \ { \ uint32_t vl =3D env->vl; \ - uint32_t vlmax =3D vext_max_elems(desc, \ - ctzl(sizeof(ETYPE))); \ + uint32_t vm =3D vext_vm(desc); \ uint32_t i; \ \ for (i =3D 0; i < vl; i++) { \ ETYPE s1 =3D *((ETYPE *)vs1 + H(i)); \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ - uint8_t carry =3D vext_elem_mask(v0, i); \ - \ + ETYPE carry =3D !vm && vext_elem_mask(v0, i); \ vext_set_elem_mask(vd, i, DO_OP(s2, s1, carry)); \ } \ - for (; i < vlmax; i++) { \ - vext_set_elem_mask(vd, i, 0); \ - } \ } =20 GEN_VEXT_VMADC_VVM(vmadc_vvm_b, uint8_t, H1, DO_MADC) @@ -1025,19 +1020,15 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong = s1, \ void *vs2, CPURISCVState *env, uint32_t desc) \ { \ uint32_t vl =3D env->vl; \ - uint32_t vlmax =3D vext_max_elems(desc, ctzl(sizeof(ETYPE))); \ + uint32_t vm =3D vext_vm(desc); \ uint32_t i; \ \ for (i =3D 0; i < vl; i++) { \ ETYPE s2 =3D *((ETYPE *)vs2 + H(i)); \ - uint8_t carry =3D vext_elem_mask(v0, i); \ - \ + ETYPE carry =3D !vm && vext_elem_mask(v0, i); \ vext_set_elem_mask(vd, i, \ DO_OP(s2, (ETYPE)(target_long)s1, carry)); \ } \ - for (; i < vlmax; i++) { \ - vext_set_elem_mask(vd, i, 0); \ - } \ } =20 GEN_VEXT_VMADC_VXM(vmadc_vxm_b, uint8_t, H1, DO_MADC) --=20 2.25.1