From nobody Tue Feb 10 23:13:59 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1637259840518662.7158120393004; Thu, 18 Nov 2021 10:24:00 -0800 (PST) Received: from localhost ([::1]:58334 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mnm4l-0007Gd-7d for importer@patchew.org; Thu, 18 Nov 2021 13:23:59 -0500 Received: from eggs.gnu.org ([209.51.188.92]:55516) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mnlzn-0002FO-3H for qemu-devel@nongnu.org; Thu, 18 Nov 2021 13:18:52 -0500 Received: from [2001:41c9:1:41f::167] (port=45160 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mnlzl-0006SQ-PP for qemu-devel@nongnu.org; Thu, 18 Nov 2021 13:18:50 -0500 Received: from [2a00:23c4:8b9e:9b00:2535:46c:7466:70fe] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mnlza-0001qH-H5; Thu, 18 Nov 2021 18:18:42 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Thu, 18 Nov 2021 18:18:34 +0000 Message-Id: <20211118181835.18497-2-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211118181835.18497-1-mark.cave-ayland@ilande.co.uk> References: <20211118181835.18497-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9e:9b00:2535:46c:7466:70fe X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH for-6.2 1/2] escc: always set STATUS_TXEMPTY in R_STATUS on device reset X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) X-Host-Lookup-Failed: Reverse DNS lookup failed for 2001:41c9:1:41f::167 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1637259842589100001 Content-Type: text/plain; charset="utf-8" The "Transmit Interrupts and Transmit Buffer Empty Bit" section of the ESCC datasheet states the following about the STATUS_TXEMPTY bit: "After a hardw= are reset (including a hardware reset by software), or a channel reset, this bit is set to 1". Update escc_reset() to set the STATUS_TXEMPTY bit in the R_STATUS register on device reset as described which fixes a regression whereby the Sun PROM checks this bit early on startup and gets stuck in an infinite loop if it is not set. Signed-off-by: Mark Cave-Ayland --- hw/char/escc.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/hw/char/escc.c b/hw/char/escc.c index 0fce4f6324..a7d9050c83 100644 --- a/hw/char/escc.c +++ b/hw/char/escc.c @@ -354,6 +354,17 @@ static void escc_reset(DeviceState *d) cs->rregs[j] =3D 0; cs->wregs[j] =3D 0; } + + /* + * ...but there is an exception. The "Transmit Interrupts and Tran= smit + * Buffer Empty Bit" section on page 50 of the ESCC datasheet says= of + * the STATUS_TXEMPTY bit in R_STATUS: "After a hardware reset + * (including a hardware reset by software), or a channel reset, t= his + * bit is set to 1". The Sun PROM checks this bit early on startup= and + * gets stuck in an infinite loop if it is not set. + */ + cs->rregs[R_STATUS] |=3D STATUS_TXEMPTY; + escc_reset_chn(cs); } } --=20 2.20.1