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[83.57.168.62]) by smtp.gmail.com with ESMTPSA id n32sm915830wms.42.2021.11.02.06.45.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Nov 2021 06:45:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UPgr2/raxy90/7F3aXd2gpTt47Yic566Ru6PdSvILyI=; b=cntFLM9MCfKJtCX3xVHrA8VfWxeSiVhFfZPch7sfIS9/qVPinFRQJA2h/u7jWPAMXW VE+YvzLCS/L/KydvYTY07/Kw6QinHNbyC72bZiDJfbzsxqyYmlL0bqHGiDTAu6MPH9xx JGs2isGDlRZj4jwwzbbuqKefzuY2krF+82UfRIyzV9uSayy1Wu3JIiv0E71JRYxOSzHT 8lnDdwo+ldpAj2hZW4HyKYFKbRsfmc+h3f1fMywBTRGhkBLjzYGC7EG4DTprWJm2z8sZ 1azWHaUC+Qi+d3pVFJiGQ8HJGoQJIDmhnHCyCKdFeBAeSYApy7PScdQrGOOpxlUMNesI 6KBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=UPgr2/raxy90/7F3aXd2gpTt47Yic566Ru6PdSvILyI=; b=nXGiXH20jXSyeqmwOPMSq1rRsCqwdPaZR8Utqt+D1w18YxFkNgCJLUnvphJt6CwC7Z 0nOrgMHW4VXAJj+5tkPfDdELwMKx1uYs+zjsMxDdtnNMNDSpz2SxK7HeX/JyCo06P4Mf U4ioU9Y8rtLD8zX4Vz9o2x0PAjZanmslxkblxK3fb6BGzvVzE30bgiXstB+4bSOJYmy6 4O6x7OqX4XAMbW9V61qZg0R2vIX1Lu1LrZYa+cvDljOwtcaqzt3RX2kGJnGpnkdg6hSK D7U/0PcLsWo90j4KAszuEp5TbwqcChK8iB7kYNpgPqJPbQWjF9Rz8f5Obke3sux8EtOx /srg== X-Gm-Message-State: AOAM531TQd3EIruGfb74sbq4yfcMe1lAFgkHanrjL45Xms7cDIhQ6ALS OJ3bBeNE8VBmHfaH/8cHIRI= X-Google-Smtp-Source: ABdhPJyBJyBnU8S/20ugPI9BTfzIE/jr8mYPqPQrEBxaBEjgiCg68I0ImSkLVBcCSTxO5KrxyjOtKg== X-Received: by 2002:adf:f904:: with SMTP id b4mr47730038wrr.403.1635860758855; Tue, 02 Nov 2021 06:45:58 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Aleksandar Rikalo , Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PULL 41/41] Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too" Date: Tue, 2 Nov 2021 14:42:40 +0100 Message-Id: <20211102134240.3036524-42-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211102134240.3036524-1-f4bug@amsat.org> References: <20211102134240.3036524-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1635860762250100001 Per the "P32 Porting Guide" (rev 1.2) [1], chapter 2: p32 ABI Overview ---------------- The Application Binary Interface, or ABI, is the set of rules that all binaries must follow in order to run on a nanoMIPS system. This includes, for example, object file format, instruction set, data layout, subroutine calling convention, and system call numbers. The ABI is one part of the mechanism that maintains binary compatibility across all nanoMIPS platforms. p32 improves on o32 to provide an ABI that is efficient in both code density and performance. p32 is required for the nanoMIPS architecture. So far QEMU only support the MIPS o32 / n32 / n64 ABIs. The p32 ABI is not implemented, therefore we can not run any nanoMIPS binary. Revert commit f72541f3a59 ("elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too"). See also the "ELF ABI Supplement" [2]. [1] http://codescape.mips.com/components/toolchain/nanomips/2019.03-01/docs= /MIPS_nanoMIPS_p32_ABI_Porting_Guide_01_02_DN00184.pdf [2] http://codescape.mips.com/components/toolchain/nanomips/2019.03-01/docs= /MIPS_nanoMIPS_ABI_supplement_01_03_DN00179.pdf Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20211101114800.2692157-1-f4bug@amsat.org> --- linux-user/elfload.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index f9b82616920..5da8c02d082 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -925,8 +925,6 @@ static void elf_core_copy_regs(target_elf_gregset_t *re= gs, const CPUPPCState *en #endif #define ELF_ARCH EM_MIPS =20 -#define elf_check_arch(x) ((x) =3D=3D EM_MIPS || (x) =3D=3D EM_NANOMIPS) - #ifdef TARGET_ABI_MIPSN32 #define elf_check_abi(x) ((x) & EF_MIPS_ABI2) #else --=20 2.31.1