From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761475648751.3629047847206; Mon, 1 Nov 2021 03:11:15 -0700 (PDT) Received: from localhost ([::1]:42258 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUHa-0006Vj-Lz for importer@patchew.org; Mon, 01 Nov 2021 06:11:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57070) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8g-0001YV-7R; Mon, 01 Nov 2021 06:02:02 -0400 Received: from out28-75.mail.aliyun.com ([115.124.28.75]:42138) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8a-0001TY-FO; Mon, 01 Nov 2021 06:02:01 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:46 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.1119813|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_alarm|0.0450819-0.000207404-0.954711; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047192; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 01/13] target/riscv: Sign extend pc for different ol Date: Mon, 1 Nov 2021 18:01:31 +0800 Message-Id: <20211101100143.44356-2-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.75; envelope-from=zhiwei_liu@c-sky.com; helo=out28-75.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761477536100001 Content-Type: text/plain; charset="utf-8" When pc is written, it is sign-extended to fill the widest supported XLEN. Signed-off-by: LIU Zhiwei --- target/riscv/translate.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 1d57bc97b5..7d78a3561e 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -150,16 +150,31 @@ static void gen_check_nanbox_s(TCGv_i64 out, TCGv_i64= in) tcg_gen_movcond_i64(TCG_COND_GEU, out, in, t_max, in, t_nan); } =20 +static void gen_set_pc(DisasContext *ctx, target_ulong dest) +{ + TCGv t =3D tcg_constant_tl(dest); + switch (get_ol(ctx)) { + case MXL_RV32: + tcg_gen_ext32s_tl(cpu_pc, t); + break; + case MXL_RV64: + tcg_gen_mov_tl(cpu_pc, t); + break; + default: + g_assert_not_reached(); + } +} + static void generate_exception(DisasContext *ctx, int excp) { - tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); + gen_set_pc(ctx, ctx->base.pc_next); gen_helper_raise_exception(cpu_env, tcg_constant_i32(excp)); ctx->base.is_jmp =3D DISAS_NORETURN; } =20 static void generate_exception_mtval(DisasContext *ctx, int excp) { - tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); + gen_set_pc(ctx, ctx->base.pc_next); tcg_gen_st_tl(cpu_pc, cpu_env, offsetof(CPURISCVState, badaddr)); gen_helper_raise_exception(cpu_env, tcg_constant_i32(excp)); ctx->base.is_jmp =3D DISAS_NORETURN; @@ -179,10 +194,10 @@ static void gen_goto_tb(DisasContext *ctx, int n, tar= get_ulong dest) { if (translator_use_goto_tb(&ctx->base, dest)) { tcg_gen_goto_tb(n); - tcg_gen_movi_tl(cpu_pc, dest); + gen_set_pc(ctx, dest); tcg_gen_exit_tb(ctx->base.tb, n); } else { - tcg_gen_movi_tl(cpu_pc, dest); + gen_set_pc(ctx, dest); tcg_gen_lookup_and_goto_ptr(); } } --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761896108164.58610798809696; Mon, 1 Nov 2021 03:18:16 -0700 (PDT) Received: from localhost ([::1]:36626 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUON-0005UH-0L for importer@patchew.org; Mon, 01 Nov 2021 06:18:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57000) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8c-0001Ko-OW; Mon, 01 Nov 2021 06:01:58 -0400 Received: from out28-194.mail.aliyun.com ([115.124.28.194]:42176) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8Z-0001TZ-Ov; Mon, 01 Nov 2021 06:01:58 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:46 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07471776|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_alarm|0.0814185-0.000652516-0.917929; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047203; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 02/13] target/riscv: Extend pc for runtime pc write Date: Mon, 1 Nov 2021 18:01:32 +0800 Message-Id: <20211101100143.44356-3-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.194; envelope-from=zhiwei_liu@c-sky.com; helo=out28-194.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761897680100001 Content-Type: text/plain; charset="utf-8" In some cases, we must restore the guest PC to the address of the start of the TB, such as when the instruction counter hit zero. So extend pc register according to current xlen for these cases. Signed-off-by: LIU Zhiwei --- target/riscv/cpu.c | 20 +++++++++++++++++--- target/riscv/cpu.h | 2 ++ target/riscv/cpu_helper.c | 2 +- 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 7d53125dbc..7eefd4f6a6 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -319,7 +319,12 @@ static void riscv_cpu_set_pc(CPUState *cs, vaddr value) { RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; - env->pc =3D value; + + if (cpu_get_xl(env) =3D=3D MXL_RV32) { + env->pc =3D (int32_t)value; + } else { + env->pc =3D value; + } } =20 static void riscv_cpu_synchronize_from_tb(CPUState *cs, @@ -327,7 +332,12 @@ static void riscv_cpu_synchronize_from_tb(CPUState *cs, { RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; - env->pc =3D tb->pc; + + if (cpu_get_xl(env) =3D=3D MXL_RV32) { + env->pc =3D (int32_t)tb->pc; + } else { + env->pc =3D tb->pc; + } } =20 static bool riscv_cpu_has_work(CPUState *cs) @@ -348,7 +358,11 @@ static bool riscv_cpu_has_work(CPUState *cs) void restore_state_to_opc(CPURISCVState *env, TranslationBlock *tb, target_ulong *data) { - env->pc =3D data[0]; + if (cpu_get_xl(env) =3D=3D MXL_RV32) { + env->pc =3D (int32_t)data[0]; + } else { + env->pc =3D data[0]; + } } =20 static void riscv_cpu_reset(DeviceState *dev) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0760c0af93..8befff0166 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -420,6 +420,8 @@ static inline RISCVMXL riscv_cpu_mxl(CPURISCVState *env) } #endif =20 +RISCVMXL cpu_get_xl(CPURISCVState *env); + /* * A simplification for VLMAX * =3D (1 << LMUL) * VLEN / (8 * (1 << SEW)) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index f30ff672f8..7d0aee6769 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -35,7 +35,7 @@ int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch) #endif } =20 -static RISCVMXL cpu_get_xl(CPURISCVState *env) +RISCVMXL cpu_get_xl(CPURISCVState *env) { #if defined(TARGET_RISCV32) return MXL_RV32; --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761349231972.6586846997648; Mon, 1 Nov 2021 03:09:09 -0700 (PDT) Received: from localhost ([::1]:60264 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUFX-0007y4-QZ for importer@patchew.org; Mon, 01 Nov 2021 06:09:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56998) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8c-0001JJ-O0; Mon, 01 Nov 2021 06:01:58 -0400 Received: from out28-125.mail.aliyun.com ([115.124.28.125]:33464) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8Z-0001Tc-KW; Mon, 01 Nov 2021 06:01:58 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:47 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.1974241|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.0477632-0.0024249-0.949812; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047202; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 03/13] target/riscv: Ignore the pc bits above XLEN Date: Mon, 1 Nov 2021 18:01:33 +0800 Message-Id: <20211101100143.44356-4-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.125; envelope-from=zhiwei_liu@c-sky.com; helo=out28-125.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761351751100001 Content-Type: text/plain; charset="utf-8" The read from PC for translation is in cpu_get_tb_cpu_state, before transla= tion. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/cpu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 7d0aee6769..eb425d74d2 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -71,7 +71,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulon= g *pc, { uint32_t flags =3D 0; =20 - *pc =3D env->pc; + *pc =3D cpu_get_xl(env) =3D=3D MXL_RV32 ? env->pc & UINT32_MAX : env->= pc; *cs_base =3D 0; =20 if (riscv_has_ext(env, RVV)) { --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761942300443.84416045714795; Mon, 1 Nov 2021 03:19:02 -0700 (PDT) Received: from localhost ([::1]:39550 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUP7-0007bk-Ab for importer@patchew.org; Mon, 01 Nov 2021 06:19:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57036) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8e-0001Qd-A3; Mon, 01 Nov 2021 06:02:00 -0400 Received: from out28-171.mail.aliyun.com ([115.124.28.171]:58698) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8a-0001Td-Aq; Mon, 01 Nov 2021 06:01:59 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:47 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07453473|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.0231685-0.000144035-0.976687; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047213; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 04/13] target/riscv: Use gdb xml according to max mxlen Date: Mon, 1 Nov 2021 18:01:34 +0800 Message-Id: <20211101100143.44356-5-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.171; envelope-from=zhiwei_liu@c-sky.com; helo=out28-171.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761942735100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/gdbstub.c | 73 +++++++++++++++++++++++++++++++----------- 1 file changed, 54 insertions(+), 19 deletions(-) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 23429179e2..15abbbdb54 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -24,11 +24,25 @@ int riscv_cpu_gdb_read_register(CPUState *cs, GByteArra= y *mem_buf, int n) { RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; + target_ulong tmp; =20 if (n < 32) { - return gdb_get_regl(mem_buf, env->gpr[n]); + tmp =3D env->gpr[n]; } else if (n =3D=3D 32) { - return gdb_get_regl(mem_buf, env->pc); + tmp =3D env->pc; + } else { + return 0; + } + + switch (env->misa_mxl_max) { + case MXL_RV32: + gdb_get_reg32(mem_buf, tmp); + break; + case MXL_RV64: + gdb_get_reg64(mem_buf, tmp); + break; + default: + g_assert_not_reached(); } return 0; } @@ -37,18 +51,32 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t = *mem_buf, int n) { RISCVCPU *cpu =3D RISCV_CPU(cs); CPURISCVState *env =3D &cpu->env; - - if (n =3D=3D 0) { - /* discard writes to x0 */ - return sizeof(target_ulong); - } else if (n < 32) { - env->gpr[n] =3D ldtul_p(mem_buf); - return sizeof(target_ulong); + int length =3D 0; + target_ulong tmp; + + switch (env->misa_mxl_max) { + case MXL_RV32: + tmp =3D (uint32_t)ldl_p(mem_buf); + length =3D 4; + break; + case MXL_RV64: + if (cpu_get_xl(env) < MXL_RV64) { + tmp =3D (int32_t)ldq_p(mem_buf); + } else { + tmp =3D ldq_p(mem_buf); + } + length =3D 8; + break; + default: + g_assert_not_reached(); + } + if (n > 0 && n < 32) { + env->gpr[n] =3D tmp; } else if (n =3D=3D 32) { - env->pc =3D ldtul_p(mem_buf); - return sizeof(target_ulong); + env->pc =3D tmp; } - return 0; + + return length; } =20 static int riscv_gdb_get_fpu(CPURISCVState *env, GByteArray *buf, int n) @@ -198,13 +226,20 @@ void riscv_cpu_register_gdb_regs_for_features(CPUStat= e *cs) gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu, 36, "riscv-32bit-fpu.xml", 0); } -#if defined(TARGET_RISCV32) - gdb_register_coprocessor(cs, riscv_gdb_get_virtual, riscv_gdb_set_virt= ual, - 1, "riscv-32bit-virtual.xml", 0); -#elif defined(TARGET_RISCV64) - gdb_register_coprocessor(cs, riscv_gdb_get_virtual, riscv_gdb_set_virt= ual, - 1, "riscv-64bit-virtual.xml", 0); -#endif + switch (env->misa_mxl_max) { + case MXL_RV32: + gdb_register_coprocessor(cs, riscv_gdb_get_virtual, + riscv_gdb_set_virtual, + 1, "riscv-32bit-virtual.xml", 0); + break; + case MXL_RV64: + gdb_register_coprocessor(cs, riscv_gdb_get_virtual, + riscv_gdb_set_virtual, + 1, "riscv-64bit-virtual.xml", 0); + break; + default: + g_assert_not_reached(); + } =20 gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr, riscv_gen_dynamic_csr_xml(cs, cs->gdb_num_reg= s), --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761730326349.2286175827842; Mon, 1 Nov 2021 03:15:30 -0700 (PDT) Received: from localhost ([::1]:58082 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhULh-0000fT-Cn for importer@patchew.org; Mon, 01 Nov 2021 06:15:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57066) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8f-0001XP-Sf; Mon, 01 Nov 2021 06:02:01 -0400 Received: from out28-148.mail.aliyun.com ([115.124.28.148]:45944) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8Z-0001Tj-QQ; Mon, 01 Nov 2021 06:02:01 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:47 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07436282|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.00882658-4.93081e-06-0.991168; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047209; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 05/13] target/riscv: Calculate address according to ol Date: Mon, 1 Nov 2021 18:01:35 +0800 Message-Id: <20211101100143.44356-6-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.148; envelope-from=zhiwei_liu@c-sky.com; helo=out28-148.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761732631100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: LIU Zhiwei --- target/riscv/insn_trans/trans_rvd.c.inc | 20 ++++++-------------- target/riscv/insn_trans/trans_rvf.c.inc | 21 ++++++++------------- target/riscv/insn_trans/trans_rvi.c.inc | 21 ++++++++++----------- 3 files changed, 24 insertions(+), 38 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvd.c.inc b/target/riscv/insn_tr= ans/trans_rvd.c.inc index 64fb0046f7..70317691c9 100644 --- a/target/riscv/insn_trans/trans_rvd.c.inc +++ b/target/riscv/insn_trans/trans_rvd.c.inc @@ -20,17 +20,13 @@ =20 static bool trans_fld(DisasContext *ctx, arg_fld *a) { - TCGv addr; + TCGv src1 =3D get_gpr(ctx, a->rs1, EXT_NONE); + TCGv addr =3D temp_new(ctx); =20 REQUIRE_FPU; REQUIRE_EXT(ctx, RVD); =20 - addr =3D get_gpr(ctx, a->rs1, EXT_NONE); - if (a->imm) { - TCGv temp =3D temp_new(ctx); - tcg_gen_addi_tl(temp, addr, a->imm); - addr =3D temp; - } + tcg_gen_addi_tl(addr, src1, a->imm); addr =3D gen_pm_adjust_address(ctx, addr); =20 tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], addr, ctx->mem_idx, MO_TEQ); @@ -41,17 +37,13 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a) =20 static bool trans_fsd(DisasContext *ctx, arg_fsd *a) { - TCGv addr; + TCGv src1 =3D get_gpr(ctx, a->rs1, EXT_NONE); + TCGv addr =3D temp_new(ctx); =20 REQUIRE_FPU; REQUIRE_EXT(ctx, RVD); =20 - addr =3D get_gpr(ctx, a->rs1, EXT_NONE); - if (a->imm) { - TCGv temp =3D temp_new(ctx); - tcg_gen_addi_tl(temp, addr, a->imm); - addr =3D temp; - } + tcg_gen_addi_tl(addr, src1, a->imm); addr =3D gen_pm_adjust_address(ctx, addr); =20 tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], addr, ctx->mem_idx, MO_TEQ); diff --git a/target/riscv/insn_trans/trans_rvf.c.inc b/target/riscv/insn_tr= ans/trans_rvf.c.inc index b5459249c4..08fa83df7e 100644 --- a/target/riscv/insn_trans/trans_rvf.c.inc +++ b/target/riscv/insn_trans/trans_rvf.c.inc @@ -26,16 +26,15 @@ static bool trans_flw(DisasContext *ctx, arg_flw *a) { TCGv_i64 dest; - TCGv addr; + TCGv src1 =3D get_gpr(ctx, a->rs1, EXT_NONE); + TCGv addr =3D temp_new(ctx); =20 REQUIRE_FPU; REQUIRE_EXT(ctx, RVF); =20 - addr =3D get_gpr(ctx, a->rs1, EXT_NONE); - if (a->imm) { - TCGv temp =3D temp_new(ctx); - tcg_gen_addi_tl(temp, addr, a->imm); - addr =3D temp; + tcg_gen_addi_tl(addr, src1, a->imm); + if (ctx->ol =3D=3D MXL_RV32) { + tcg_gen_ext32u_tl(addr, addr); } addr =3D gen_pm_adjust_address(ctx, addr); =20 @@ -49,17 +48,13 @@ static bool trans_flw(DisasContext *ctx, arg_flw *a) =20 static bool trans_fsw(DisasContext *ctx, arg_fsw *a) { - TCGv addr; + TCGv src1 =3D get_gpr(ctx, a->rs1, EXT_NONE); + TCGv addr =3D temp_new(ctx); =20 REQUIRE_FPU; REQUIRE_EXT(ctx, RVF); =20 - addr =3D get_gpr(ctx, a->rs1, EXT_NONE); - if (a->imm) { - TCGv temp =3D tcg_temp_new(); - tcg_gen_addi_tl(temp, addr, a->imm); - addr =3D temp; - } + tcg_gen_addi_tl(addr, src1, a->imm); addr =3D gen_pm_adjust_address(ctx, addr); =20 tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], addr, ctx->mem_idx, MO_TEUL); diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_tr= ans/trans_rvi.c.inc index e51dbc41c5..bd9d50bb94 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -137,12 +137,12 @@ static bool trans_bgeu(DisasContext *ctx, arg_bgeu *a) static bool gen_load(DisasContext *ctx, arg_lb *a, MemOp memop) { TCGv dest =3D dest_gpr(ctx, a->rd); - TCGv addr =3D get_gpr(ctx, a->rs1, EXT_NONE); + TCGv src1 =3D get_gpr(ctx, a->rs1, EXT_NONE); + TCGv addr =3D temp_new(ctx); =20 - if (a->imm) { - TCGv temp =3D temp_new(ctx); - tcg_gen_addi_tl(temp, addr, a->imm); - addr =3D temp; + tcg_gen_addi_tl(addr, src1, a->imm); + if (ctx->ol =3D=3D MXL_RV32) { + tcg_gen_ext32u_tl(addr, addr); } addr =3D gen_pm_adjust_address(ctx, addr); =20 @@ -178,16 +178,15 @@ static bool trans_lhu(DisasContext *ctx, arg_lhu *a) =20 static bool gen_store(DisasContext *ctx, arg_sb *a, MemOp memop) { - TCGv addr =3D get_gpr(ctx, a->rs1, EXT_NONE); + TCGv addr =3D temp_new(ctx); + TCGv src1 =3D get_gpr(ctx, a->rs1, EXT_NONE); TCGv data =3D get_gpr(ctx, a->rs2, EXT_NONE); =20 - if (a->imm) { - TCGv temp =3D temp_new(ctx); - tcg_gen_addi_tl(temp, addr, a->imm); - addr =3D temp; + tcg_gen_addi_tl(addr, src1, a->imm); + if (ctx->ol =3D=3D MXL_RV32) { + tcg_gen_ext32u_tl(addr, addr); } addr =3D gen_pm_adjust_address(ctx, addr); - tcg_gen_qemu_st_tl(data, addr, ctx->mem_idx, memop); return true; } --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 163576175039592.64119724397062; Mon, 1 Nov 2021 03:15:50 -0700 (PDT) Received: from localhost ([::1]:59040 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUM1-0001Ml-7B for importer@patchew.org; Mon, 01 Nov 2021 06:15:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57116) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8j-0001eC-MA; Mon, 01 Nov 2021 06:02:05 -0400 Received: from out28-147.mail.aliyun.com ([115.124.28.147]:51849) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8a-0001Tw-Jh; Mon, 01 Nov 2021 06:02:04 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:48 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07437038|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_alarm|0.27308-0.000193277-0.726727; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047198; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 06/13] target/riscv: Adjust vsetvl according to ol Date: Mon, 1 Nov 2021 18:01:36 +0800 Message-Id: <20211101100143.44356-7-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.147; envelope-from=zhiwei_liu@c-sky.com; helo=out28-147.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761752140100003 Content-Type: text/plain; charset="utf-8" Signed-off-by: LIU Zhiwei --- target/riscv/cpu.h | 2 ++ target/riscv/helper.h | 2 +- target/riscv/insn_trans/trans_rvv.c.inc | 4 ++-- target/riscv/vector_helper.c | 19 +++++++++++++++---- 4 files changed, 20 insertions(+), 7 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 8befff0166..7163ac1f4c 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -107,6 +107,8 @@ FIELD(VTYPE, VSEW, 2, 3) FIELD(VTYPE, VEDIV, 5, 2) FIELD(VTYPE, RESERVED, 7, sizeof(target_ulong) * 8 - 9) FIELD(VTYPE, VILL, sizeof(target_ulong) * 8 - 1, 1) +FIELD(VTYPE, RESERVED_OLEN32, 7, 23) +FIELD(VTYPE, VILL_OLEN32, 31, 1) =20 struct CPURISCVState { target_ulong gpr[32]; diff --git a/target/riscv/helper.h b/target/riscv/helper.h index c7a5376227..e198d43981 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -82,7 +82,7 @@ DEF_HELPER_2(hyp_hlvx_wu, tl, env, tl) #endif =20 /* Vector functions */ -DEF_HELPER_3(vsetvl, tl, env, tl, tl) +DEF_HELPER_4(vsetvl, tl, env, tl, tl, tl) DEF_HELPER_5(vlb_v_b, void, ptr, ptr, tl, env, i32) DEF_HELPER_5(vlb_v_b_mask, void, ptr, ptr, tl, env, i32) DEF_HELPER_5(vlb_v_h, void, ptr, ptr, tl, env, i32) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index 17ee3babef..01da065710 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -37,7 +37,7 @@ static bool trans_vsetvl(DisasContext *ctx, arg_vsetvl *a) } else { s1 =3D get_gpr(ctx, a->rs1, EXT_ZERO); } - gen_helper_vsetvl(dst, cpu_env, s1, s2); + gen_helper_vsetvl(dst, cpu_env, s1, s2, tcg_constant_tl(get_olen(ctx))= ); gen_set_gpr(ctx, a->rd, dst); =20 tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn); @@ -64,7 +64,7 @@ static bool trans_vsetvli(DisasContext *ctx, arg_vsetvli = *a) } else { s1 =3D get_gpr(ctx, a->rs1, EXT_ZERO); } - gen_helper_vsetvl(dst, cpu_env, s1, s2); + gen_helper_vsetvl(dst, cpu_env, s1, s2, tcg_constant_tl(get_olen(ctx))= ); gen_set_gpr(ctx, a->rd, dst); =20 gen_goto_tb(ctx, 0, ctx->pc_succ_insn); diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 12c31aa4b4..09e76229bc 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -27,18 +27,29 @@ #include =20 target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1, - target_ulong s2) + target_ulong s2, target_ulong olen) { int vlmax, vl; RISCVCPU *cpu =3D env_archcpu(env); uint16_t sew =3D 8 << FIELD_EX64(s2, VTYPE, VSEW); uint8_t ediv =3D FIELD_EX64(s2, VTYPE, VEDIV); - bool vill =3D FIELD_EX64(s2, VTYPE, VILL); - target_ulong reserved =3D FIELD_EX64(s2, VTYPE, RESERVED); + bool vill; + target_ulong reserved; =20 + if (olen < TARGET_LONG_BITS) { + vill =3D FIELD_EX64(s2, VTYPE, VILL_OLEN32); + reserved =3D FIELD_EX64(s2, VTYPE, RESERVED_OLEN32); + } else { + vill =3D FIELD_EX64(s2, VTYPE, VILL); + reserved =3D FIELD_EX64(s2, VTYPE, RESERVED); + } if ((sew > cpu->cfg.elen) || vill || (ediv !=3D 0) || (reserved !=3D 0= )) { /* only set vill bit. */ - env->vtype =3D FIELD_DP64(0, VTYPE, VILL, 1); + if (olen < TARGET_LONG_BITS) { + env->vtype =3D FIELD_DP64(0, VTYPE, VILL_OLEN32, 1); + } else { + env->vtype =3D FIELD_DP64(0, VTYPE, VILL, 1); + } env->vl =3D 0; env->vstart =3D 0; return 0; --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 163576218377370.47311309653287; Mon, 1 Nov 2021 03:23:03 -0700 (PDT) Received: from localhost ([::1]:52914 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUT0-0000NM-ON for importer@patchew.org; Mon, 01 Nov 2021 06:23:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57120) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8j-0001gc-IU; Mon, 01 Nov 2021 06:02:05 -0400 Received: from out28-221.mail.aliyun.com ([115.124.28.221]:46897) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8a-0001U4-Gx; Mon, 01 Nov 2021 06:02:05 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:49 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.2336314|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.00577056-3.25356e-05-0.994197; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047207; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 07/13] target/riscv: Ajdust vector atomic check with ol Date: Mon, 1 Nov 2021 18:01:37 +0800 Message-Id: <20211101100143.44356-8-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.221; envelope-from=zhiwei_liu@c-sky.com; helo=out28-221.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635762186144100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: LIU Zhiwei --- target/riscv/insn_trans/trans_rvv.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index 01da065710..ed042f7bb9 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -739,7 +739,7 @@ static bool amo_check(DisasContext *s, arg_rwdvm* a) (!a->wd || vext_check_overlap_mask(s, a->rd, a->vm, false)) && vext_check_reg(s, a->rd, false) && vext_check_reg(s, a->rs2, false) && - ((1 << s->sew) <=3D sizeof(target_ulong)) && + ((1 << s->sew) <=3D (get_olen(s) / 8)) && ((1 << s->sew) >=3D 4)); } =20 --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761935490978.7090065770587; Mon, 1 Nov 2021 03:18:55 -0700 (PDT) Received: from localhost ([::1]:38892 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUP0-00078J-6U for importer@patchew.org; Mon, 01 Nov 2021 06:18:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57104) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8h-0001bF-B5; Mon, 01 Nov 2021 06:02:03 -0400 Received: from out28-50.mail.aliyun.com ([115.124.28.50]:41527) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8a-0001UA-Jw; Mon, 01 Nov 2021 06:02:03 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:49 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.1829344|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.0508009-0.000453744-0.948745; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047190; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 08/13] target/riscv: Fix check range for first fault only Date: Mon, 1 Nov 2021 18:01:38 +0800 Message-Id: <20211101100143.44356-9-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.50; envelope-from=zhiwei_liu@c-sky.com; helo=out28-50.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761936469100001 Content-Type: text/plain; charset="utf-8" Only check the range that has passed the address translation. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/vector_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 09e76229bc..535420ee66 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -638,12 +638,12 @@ vext_ldff(void *vd, void *v0, target_ulong base, cpu_mmu_index(env, false)); if (host) { #ifdef CONFIG_USER_ONLY - if (page_check_range(addr, nf * msz, PAGE_READ) < 0) { + if (page_check_range(addr, offset, PAGE_READ) < 0) { vl =3D i; goto ProbeSuccess; } #else - probe_pages(env, addr, nf * msz, ra, MMU_DATA_LOAD); + probe_pages(env, addr, offset, ra, MMU_DATA_LOAD); #endif } else { vl =3D i; --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761623101286.2199205033804; Mon, 1 Nov 2021 03:13:43 -0700 (PDT) Received: from localhost ([::1]:50380 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUJy-0003lT-3X for importer@patchew.org; Mon, 01 Nov 2021 06:13:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57114) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8j-0001do-GT; Mon, 01 Nov 2021 06:02:05 -0400 Received: from out28-221.mail.aliyun.com ([115.124.28.221]:42975) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8a-0001UQ-Hg; Mon, 01 Nov 2021 06:02:04 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:49 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07436282|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.00259318-2.13049e-05-0.997386; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047199; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 09/13] target/riscv: Adjust vector address with ol Date: Mon, 1 Nov 2021 18:01:39 +0800 Message-Id: <20211101100143.44356-10-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.221; envelope-from=zhiwei_liu@c-sky.com; helo=out28-221.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761625187100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: LIU Zhiwei --- target/riscv/insn_trans/trans_rvv.c.inc | 8 ++++ target/riscv/internals.h | 1 + target/riscv/vector_helper.c | 54 +++++++++++++++++-------- 3 files changed, 46 insertions(+), 17 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index ed042f7bb9..5cd9b802df 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -233,6 +233,7 @@ static bool ld_us_op(DisasContext *s, arg_r2nfvm *a, ui= nt8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, NF, a->nf); + data =3D FIELD_DP32(data, VDATA, OL, s->ol); return ldst_us_trans(a->rd, a->rs1, data, fn, s); } =20 @@ -286,6 +287,7 @@ static bool st_us_op(DisasContext *s, arg_r2nfvm *a, ui= nt8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, NF, a->nf); + data =3D FIELD_DP32(data, VDATA, OL, s->ol); return ldst_us_trans(a->rd, a->rs1, data, fn, s); } =20 @@ -365,6 +367,7 @@ static bool ld_stride_op(DisasContext *s, arg_rnfvm *a,= uint8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, NF, a->nf); + data =3D FIELD_DP32(data, VDATA, OL, s->ol); return ldst_stride_trans(a->rd, a->rs1, a->rs2, data, fn, s); } =20 @@ -404,6 +407,7 @@ static bool st_stride_op(DisasContext *s, arg_rnfvm *a,= uint8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, NF, a->nf); + data =3D FIELD_DP32(data, VDATA, OL, s->ol); fn =3D fns[seq][s->sew]; if (fn =3D=3D NULL) { return false; @@ -490,6 +494,7 @@ static bool ld_index_op(DisasContext *s, arg_rnfvm *a, = uint8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, NF, a->nf); + data =3D FIELD_DP32(data, VDATA, OL, s->ol); return ldst_index_trans(a->rd, a->rs1, a->rs2, data, fn, s); } =20 @@ -542,6 +547,7 @@ static bool st_index_op(DisasContext *s, arg_rnfvm *a, = uint8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, NF, a->nf); + data =3D FIELD_DP32(data, VDATA, OL, s->ol); return ldst_index_trans(a->rd, a->rs1, a->rs2, data, fn, s); } =20 @@ -617,6 +623,7 @@ static bool ldff_op(DisasContext *s, arg_r2nfvm *a, uin= t8_t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, NF, a->nf); + data =3D FIELD_DP32(data, VDATA, OL, s->ol); return ldff_trans(a->rd, a->rs1, data, fn, s); } =20 @@ -724,6 +731,7 @@ static bool amo_op(DisasContext *s, arg_rwdvm *a, uint8= _t seq) data =3D FIELD_DP32(data, VDATA, VM, a->vm); data =3D FIELD_DP32(data, VDATA, LMUL, s->lmul); data =3D FIELD_DP32(data, VDATA, WD, a->wd); + data =3D FIELD_DP32(data, VDATA, OL, s->ol); return amo_trans(a->rd, a->rs1, a->rs2, data, fn, s); } /* diff --git a/target/riscv/internals.h b/target/riscv/internals.h index b15ad394bb..f74b8291e4 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -27,6 +27,7 @@ FIELD(VDATA, VM, 8, 1) FIELD(VDATA, LMUL, 9, 2) FIELD(VDATA, NF, 11, 4) FIELD(VDATA, WD, 11, 1) +FIELD(VDATA, OL, 15, 2) =20 /* float point classify helpers */ target_ulong fclass_h(uint64_t frs1); diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 535420ee66..451688c328 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -112,6 +112,11 @@ static uint32_t vext_wd(uint32_t desc) return (simd_data(desc) >> 11) & 0x1; } =20 +static inline uint32_t vext_ol(uint32_t desc) +{ + return FIELD_EX32(simd_data(desc), VDATA, OL); +} + /* * Get vector group length in bytes. Its range is [64, 2048]. * @@ -123,6 +128,14 @@ static inline uint32_t vext_maxsz(uint32_t desc) return simd_maxsz(desc) << vext_lmul(desc); } =20 +static inline target_ulong adjust_addr(target_ulong addr, uint32_t olen) +{ + if (olen < TARGET_LONG_BITS) { + addr &=3D UINT32_MAX; + } + return addr; +} + /* * This function checks watchpoint before real load operation. * @@ -135,17 +148,17 @@ static inline uint32_t vext_maxsz(uint32_t desc) */ static void probe_pages(CPURISCVState *env, target_ulong addr, target_ulong len, uintptr_t ra, - MMUAccessType access_type) + MMUAccessType access_type, uint32_t olen) { target_ulong pagelen =3D -(addr | TARGET_PAGE_MASK); target_ulong curlen =3D MIN(pagelen, len); =20 - probe_access(env, addr, curlen, access_type, + probe_access(env, adjust_addr(addr, olen), curlen, access_type, cpu_mmu_index(env, false), ra); if (len > curlen) { addr +=3D curlen; curlen =3D len - curlen; - probe_access(env, addr, curlen, access_type, + probe_access(env, adjust_addr(addr, olen), curlen, access_type, cpu_mmu_index(env, false), ra); } } @@ -290,13 +303,14 @@ vext_ldst_stride(void *vd, void *v0, target_ulong bas= e, uint32_t nf =3D vext_nf(desc); uint32_t mlen =3D vext_mlen(desc); uint32_t vlmax =3D vext_maxsz(desc) / esz; + uint32_t olen =3D 16 << vext_ol(desc); =20 /* probe every access*/ for (i =3D 0; i < env->vl; i++) { if (!vm && !vext_elem_mask(v0, mlen, i)) { continue; } - probe_pages(env, base + stride * i, nf * msz, ra, access_type); + probe_pages(env, base + stride * i, nf * msz, ra, access_type, ole= n); } /* do real access */ for (i =3D 0; i < env->vl; i++) { @@ -306,7 +320,7 @@ vext_ldst_stride(void *vd, void *v0, target_ulong base, } while (k < nf) { target_ulong addr =3D base + stride * i + k * msz; - ldst_elem(env, addr, i + k * vlmax, vd, ra); + ldst_elem(env, adjust_addr(addr, olen), i + k * vlmax, vd, ra); k++; } } @@ -391,15 +405,16 @@ vext_ldst_us(void *vd, target_ulong base, CPURISCVSta= te *env, uint32_t desc, uint32_t i, k; uint32_t nf =3D vext_nf(desc); uint32_t vlmax =3D vext_maxsz(desc) / esz; + uint32_t olen =3D 16 << vext_ol(desc); =20 /* probe every access */ - probe_pages(env, base, env->vl * nf * msz, ra, access_type); + probe_pages(env, base, env->vl * nf * msz, ra, access_type, olen); /* load bytes from guest memory */ for (i =3D 0; i < env->vl; i++) { k =3D 0; while (k < nf) { target_ulong addr =3D base + (i * nf + k) * msz; - ldst_elem(env, addr, i + k * vlmax, vd, ra); + ldst_elem(env, adjust_addr(addr, olen), i + k * vlmax, vd, ra); k++; } } @@ -519,6 +534,7 @@ vext_ldst_index(void *vd, void *v0, target_ulong base, uint32_t vm =3D vext_vm(desc); uint32_t mlen =3D vext_mlen(desc); uint32_t vlmax =3D vext_maxsz(desc) / esz; + uint32_t olen =3D 16 << vext_ol(desc); =20 /* probe every access*/ for (i =3D 0; i < env->vl; i++) { @@ -526,7 +542,7 @@ vext_ldst_index(void *vd, void *v0, target_ulong base, continue; } probe_pages(env, get_index_addr(base, i, vs2), nf * msz, ra, - access_type); + access_type, olen); } /* load bytes from guest memory */ for (i =3D 0; i < env->vl; i++) { @@ -536,7 +552,7 @@ vext_ldst_index(void *vd, void *v0, target_ulong base, } while (k < nf) { abi_ptr addr =3D get_index_addr(base, i, vs2) + k * msz; - ldst_elem(env, addr, i + k * vlmax, vd, ra); + ldst_elem(env, adjust_addr(addr, olen), i + k * vlmax, vd, ra); k++; } } @@ -619,6 +635,7 @@ vext_ldff(void *vd, void *v0, target_ulong base, uint32_t nf =3D vext_nf(desc); uint32_t vm =3D vext_vm(desc); uint32_t vlmax =3D vext_maxsz(desc) / esz; + uint32_t olen =3D 16 << vext_ol(desc); target_ulong addr, offset, remain; =20 /* probe every access*/ @@ -626,9 +643,9 @@ vext_ldff(void *vd, void *v0, target_ulong base, if (!vm && !vext_elem_mask(v0, mlen, i)) { continue; } - addr =3D base + nf * i * msz; + addr =3D adjust_addr(base + nf * i * msz, olen); if (i =3D=3D 0) { - probe_pages(env, addr, nf * msz, ra, MMU_DATA_LOAD); + probe_pages(env, addr, nf * msz, ra, MMU_DATA_LOAD, olen); } else { /* if it triggers an exception, no need to check watchpoint */ remain =3D nf * msz; @@ -643,7 +660,7 @@ vext_ldff(void *vd, void *v0, target_ulong base, goto ProbeSuccess; } #else - probe_pages(env, addr, offset, ra, MMU_DATA_LOAD); + probe_pages(env, addr, offset, ra, MMU_DATA_LOAD, olen= ); #endif } else { vl =3D i; @@ -653,7 +670,7 @@ vext_ldff(void *vd, void *v0, target_ulong base, break; } remain -=3D offset; - addr +=3D offset; + addr =3D adjust_addr(addr + offset, olen); } } } @@ -669,7 +686,7 @@ ProbeSuccess: } while (k < nf) { target_ulong addr =3D base + (i * nf + k) * msz; - ldst_elem(env, addr, i + k * vlmax, vd, ra); + ldst_elem(env, adjust_addr(addr, olen), i + k * vlmax, vd, ra); k++; } } @@ -795,20 +812,23 @@ vext_amo_noatomic(void *vs3, void *v0, target_ulong b= ase, uint32_t vm =3D vext_vm(desc); uint32_t mlen =3D vext_mlen(desc); uint32_t vlmax =3D vext_maxsz(desc) / esz; + uint32_t olen =3D 16 << vext_ol(desc); =20 for (i =3D 0; i < env->vl; i++) { if (!vm && !vext_elem_mask(v0, mlen, i)) { continue; } - probe_pages(env, get_index_addr(base, i, vs2), msz, ra, MMU_DATA_L= OAD); - probe_pages(env, get_index_addr(base, i, vs2), msz, ra, MMU_DATA_S= TORE); + probe_pages(env, get_index_addr(base, i, vs2), msz, ra, + MMU_DATA_LOAD, olen); + probe_pages(env, get_index_addr(base, i, vs2), msz, ra, + MMU_DATA_STORE, olen); } for (i =3D 0; i < env->vl; i++) { if (!vm && !vext_elem_mask(v0, mlen, i)) { continue; } addr =3D get_index_addr(base, i, vs2); - noatomic_op(vs3, addr, wd, i, env, ra); + noatomic_op(vs3, adjust_addr(addr, olen), wd, i, env, ra); } clear_elem(vs3, env->vl, env->vl * esz, vlmax * esz); } --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761465366764.2355957827838; Mon, 1 Nov 2021 03:11:05 -0700 (PDT) Received: from localhost ([::1]:41086 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUHQ-0005jW-CF for importer@patchew.org; Mon, 01 Nov 2021 06:11:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57064) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8f-0001VC-BP; Mon, 01 Nov 2021 06:02:01 -0400 Received: from out28-3.mail.aliyun.com ([115.124.28.3]:48695) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8a-0001V0-1V; Mon, 01 Nov 2021 06:02:00 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:50 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.0815934|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_alarm|0.118387-4.71021e-05-0.881566; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047192; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 10/13] target/riscv: Adjust scalar reg in vector with ol Date: Mon, 1 Nov 2021 18:01:40 +0800 Message-Id: <20211101100143.44356-11-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.3; envelope-from=zhiwei_liu@c-sky.com; helo=out28-3.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761466950100001 Content-Type: text/plain; charset="utf-8" When sew <=3D 32bits, not need to extend scalar reg. When sew > 32bits, if xlen is less that sew, we should sign extend the scalar register, except explicitly specified by the spec. Signed-off-by: LIU Zhiwei --- target/riscv/insn_trans/trans_rvv.c.inc | 5 +++-- target/riscv/vector_helper.c | 6 ++++-- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr= ans/trans_rvv.c.inc index 5cd9b802df..947a58d7ca 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -853,7 +853,7 @@ static bool opivx_trans(uint32_t vd, uint32_t rs1, uint= 32_t vs2, uint32_t vm, dest =3D tcg_temp_new_ptr(); mask =3D tcg_temp_new_ptr(); src2 =3D tcg_temp_new_ptr(); - src1 =3D get_gpr(s, rs1, EXT_NONE); + src1 =3D get_gpr(s, rs1, EXT_SIGN); =20 data =3D FIELD_DP32(data, VDATA, MLEN, s->mlen); data =3D FIELD_DP32(data, VDATA, VM, vm); @@ -2677,6 +2677,7 @@ static bool trans_vmv_s_x(DisasContext *s, arg_vmv_s_= x *a) /* This instruction ignores LMUL and vector register groups */ int maxsz =3D s->vlen >> 3; TCGv_i64 t1; + TCGv src1 =3D get_gpr(s, a->rs1, EXT_ZERO); TCGLabel *over =3D gen_new_label(); =20 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over); @@ -2686,7 +2687,7 @@ static bool trans_vmv_s_x(DisasContext *s, arg_vmv_s_= x *a) } =20 t1 =3D tcg_temp_new_i64(); - tcg_gen_extu_tl_i64(t1, cpu_gpr[a->rs1]); + tcg_gen_extu_tl_i64(t1, src1); vec_element_storei(s, a->rd, 0, t1); tcg_temp_free_i64(t1); done: diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 451688c328..5bdbbf7c71 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -4763,6 +4763,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t mlen =3D vext_mlen(desc); = \ uint32_t vlmax =3D env_archcpu(env)->cfg.vlen / mlen; = \ uint32_t vm =3D vext_vm(desc); = \ + uint32_t olen =3D 16 << vext_ol(desc); = \ uint32_t vl =3D env->vl; = \ uint32_t i; \ \ @@ -4771,7 +4772,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ continue; \ } \ if (i =3D=3D 0) { = \ - *((ETYPE *)vd + H(i)) =3D s1; = \ + *((ETYPE *)vd + H(i)) =3D adjust_addr(s1, olen); = \ } else { \ *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(i - 1)); = \ } \ @@ -4792,6 +4793,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ uint32_t mlen =3D vext_mlen(desc); = \ uint32_t vlmax =3D env_archcpu(env)->cfg.vlen / mlen; = \ uint32_t vm =3D vext_vm(desc); = \ + uint32_t olen =3D 16 << vext_ol(desc); = \ uint32_t vl =3D env->vl; = \ uint32_t i; \ \ @@ -4800,7 +4802,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1= , void *vs2, \ continue; \ } \ if (i =3D=3D vl - 1) { = \ - *((ETYPE *)vd + H(i)) =3D s1; = \ + *((ETYPE *)vd + H(i)) =3D adjust_addr(s1, olen); = \ } else { \ *((ETYPE *)vd + H(i)) =3D *((ETYPE *)vs2 + H(i + 1)); = \ } \ --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635762028181695.0249751107027; Mon, 1 Nov 2021 03:20:28 -0700 (PDT) Received: from localhost ([::1]:45018 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUQV-0002ux-8p for importer@patchew.org; Mon, 01 Nov 2021 06:20:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57040) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8e-0001R4-F5; Mon, 01 Nov 2021 06:02:00 -0400 Received: from out28-193.mail.aliyun.com ([115.124.28.193]:37902) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8Z-0001Uk-Qe; Mon, 01 Nov 2021 06:02:00 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:50 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07518584|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_alarm|0.0612003-0.000265942-0.938534; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047203; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 11/13] target/riscv: Switch context in exception return Date: Mon, 1 Nov 2021 18:01:41 +0800 Message-Id: <20211101100143.44356-12-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.193; envelope-from=zhiwei_liu@c-sky.com; helo=out28-193.mail.aliyun.com X-Spam_score_int: 0 X-Spam_score: -0.0 X-Spam_bar: / X-Spam_report: (-0.0 / 5.0 requ) RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635762028644100001 Content-Type: text/plain; charset="utf-8" After excpetion return, we should give a xlen view of context in new priveledge, including the general registers, pc, and CSRs. Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 1 + .../riscv/insn_trans/trans_privileged.c.inc | 2 ++ target/riscv/op_helper.c | 26 +++++++++++++++++++ 3 files changed, 29 insertions(+) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index e198d43981..9b379d7232 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -71,6 +71,7 @@ DEF_HELPER_2(sret, tl, env, tl) DEF_HELPER_2(mret, tl, env, tl) DEF_HELPER_1(wfi, void, env) DEF_HELPER_1(tlb_flush, void, env) +DEF_HELPER_1(switch_context_xl, void, env) #endif =20 /* Hypervisor functions */ diff --git a/target/riscv/insn_trans/trans_privileged.c.inc b/target/riscv/= insn_trans/trans_privileged.c.inc index 75c6ef80a6..6e39632f83 100644 --- a/target/riscv/insn_trans/trans_privileged.c.inc +++ b/target/riscv/insn_trans/trans_privileged.c.inc @@ -78,6 +78,7 @@ static bool trans_sret(DisasContext *ctx, arg_sret *a) =20 if (has_ext(ctx, RVS)) { gen_helper_sret(cpu_pc, cpu_env, cpu_pc); + gen_helper_switch_context_xl(cpu_env); tcg_gen_exit_tb(NULL, 0); /* no chaining */ ctx->base.is_jmp =3D DISAS_NORETURN; } else { @@ -94,6 +95,7 @@ static bool trans_mret(DisasContext *ctx, arg_mret *a) #ifndef CONFIG_USER_ONLY tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); gen_helper_mret(cpu_pc, cpu_env, cpu_pc); + gen_helper_switch_context_xl(cpu_env); tcg_gen_exit_tb(NULL, 0); /* no chaining */ ctx->base.is_jmp =3D DISAS_NORETURN; return true; diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index ee7c24efe7..20cf8ad883 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -70,6 +70,32 @@ target_ulong helper_csrrw(CPURISCVState *env, int csr, } =20 #ifndef CONFIG_USER_ONLY +void helper_switch_context_xl(CPURISCVState *env) +{ + RISCVMXL xl =3D cpu_get_xl(env); + if (xl =3D=3D env->misa_mxl_max) { + return; + } + assert(xl < env->misa_mxl_max); + switch (xl) { + case MXL_RV32: + for (int i =3D 1; i < 32; i++) { + env->gpr[i] =3D (int32_t)env->gpr[i]; + } + env->pc =3D (int32_t)env->pc; + /* + * For the read-only bits of the previous-width CSR, the bits at t= he + * same positions in the temporary register are set to zeros. + */ + if ((env->priv =3D=3D PRV_U) && (env->misa_ext & RVV)) { + env->vl =3D 0; + env->vtype =3D 0; + } + break; + default: + break; + } +} =20 target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb) { --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635762064825362.4359651343366; Mon, 1 Nov 2021 03:21:04 -0700 (PDT) Received: from localhost ([::1]:47076 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUR5-0004VF-QJ for importer@patchew.org; Mon, 01 Nov 2021 06:21:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57118) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8i-0001em-Ry; Mon, 01 Nov 2021 06:02:04 -0400 Received: from out28-221.mail.aliyun.com ([115.124.28.221]:51224) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8b-0001VG-Eb; Mon, 01 Nov 2021 06:02:04 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:50 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07459467|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_alarm|0.0131972-0.000673861-0.986129; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047213; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 12/13] target/riscv: Don't save pc when exception return Date: Mon, 1 Nov 2021 18:01:42 +0800 Message-Id: <20211101100143.44356-13-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.221; envelope-from=zhiwei_liu@c-sky.com; helo=out28-221.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635762065323100001 Content-Type: text/plain; charset="utf-8" As pc will be written by the xepc in exception return, just ignore pc in translation. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/helper.h | 4 ++-- target/riscv/insn_trans/trans_privileged.c.inc | 7 ++----- target/riscv/op_helper.c | 4 ++-- 3 files changed, 6 insertions(+), 9 deletions(-) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 9b379d7232..34c57a6083 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -67,8 +67,8 @@ DEF_HELPER_2(csrr, tl, env, int) DEF_HELPER_3(csrw, void, env, int, tl) DEF_HELPER_4(csrrw, tl, env, int, tl, tl) #ifndef CONFIG_USER_ONLY -DEF_HELPER_2(sret, tl, env, tl) -DEF_HELPER_2(mret, tl, env, tl) +DEF_HELPER_1(sret, tl, env) +DEF_HELPER_1(mret, tl, env) DEF_HELPER_1(wfi, void, env) DEF_HELPER_1(tlb_flush, void, env) DEF_HELPER_1(switch_context_xl, void, env) diff --git a/target/riscv/insn_trans/trans_privileged.c.inc b/target/riscv/= insn_trans/trans_privileged.c.inc index 6e39632f83..cf6dc98888 100644 --- a/target/riscv/insn_trans/trans_privileged.c.inc +++ b/target/riscv/insn_trans/trans_privileged.c.inc @@ -74,10 +74,8 @@ static bool trans_uret(DisasContext *ctx, arg_uret *a) static bool trans_sret(DisasContext *ctx, arg_sret *a) { #ifndef CONFIG_USER_ONLY - tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); - if (has_ext(ctx, RVS)) { - gen_helper_sret(cpu_pc, cpu_env, cpu_pc); + gen_helper_sret(cpu_pc, cpu_env); gen_helper_switch_context_xl(cpu_env); tcg_gen_exit_tb(NULL, 0); /* no chaining */ ctx->base.is_jmp =3D DISAS_NORETURN; @@ -93,8 +91,7 @@ static bool trans_sret(DisasContext *ctx, arg_sret *a) static bool trans_mret(DisasContext *ctx, arg_mret *a) { #ifndef CONFIG_USER_ONLY - tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); - gen_helper_mret(cpu_pc, cpu_env, cpu_pc); + gen_helper_mret(cpu_pc, cpu_env); gen_helper_switch_context_xl(cpu_env); tcg_gen_exit_tb(NULL, 0); /* no chaining */ ctx->base.is_jmp =3D DISAS_NORETURN; diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 20cf8ad883..3ce2767ccf 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -97,7 +97,7 @@ void helper_switch_context_xl(CPURISCVState *env) } } =20 -target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb) +target_ulong helper_sret(CPURISCVState *env) { uint64_t mstatus; target_ulong prev_priv, prev_virt; @@ -158,7 +158,7 @@ target_ulong helper_sret(CPURISCVState *env, target_ulo= ng cpu_pc_deb) return retpc; } =20 -target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb) +target_ulong helper_mret(CPURISCVState *env) { if (!(env->priv >=3D PRV_M)) { riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); --=20 2.25.1 From nobody Mon Feb 9 16:36:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1635761946591339.5876259032693; Mon, 1 Nov 2021 03:19:06 -0700 (PDT) Received: from localhost ([::1]:39946 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mhUPB-0007rV-JY for importer@patchew.org; Mon, 01 Nov 2021 06:19:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57122) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8l-0001md-2t; Mon, 01 Nov 2021 06:02:07 -0400 Received: from out28-171.mail.aliyun.com ([115.124.28.171]:59615) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mhU8b-0001VJ-Aq; Mon, 01 Nov 2021 06:02:06 -0400 Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.LlcGtUT_1635760905) by smtp.aliyun-inc.com(10.147.43.230); Mon, 01 Nov 2021 18:01:51 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.2718527|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_alarm|0.0413834-0.000279369-0.958337; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047209; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.LlcGtUT_1635760905; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 13/13] target/riscv: Enable uxl field write Date: Mon, 1 Nov 2021 18:01:43 +0800 Message-Id: <20211101100143.44356-14-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101100143.44356-1-zhiwei_liu@c-sky.com> References: <20211101100143.44356-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.171; envelope-from=zhiwei_liu@c-sky.com; helo=out28-171.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1635761946925100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: LIU Zhiwei --- target/riscv/csr.c | 6 ++++-- target/riscv/insn_trans/trans_rvi.c.inc | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 9f41954894..471c10acf6 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -543,14 +543,16 @@ static RISCVException write_mstatus(CPURISCVState *en= v, int csrno, * add them to mstatush. For now, we just don't support it. */ mask |=3D MSTATUS_MPV | MSTATUS_GVA; + if ((val ^ mstatus) & MSTATUS64_UXL) { + mask |=3D MSTATUS64_UXL; + } } =20 mstatus =3D (mstatus & ~mask) | (val & mask); =20 if (riscv_cpu_mxl(env) =3D=3D MXL_RV64) { - /* SXL and UXL fields are for now read only */ + /* SXL fields are for now read only */ mstatus =3D set_field(mstatus, MSTATUS64_SXL, MXL_RV64); - mstatus =3D set_field(mstatus, MSTATUS64_UXL, MXL_RV64); } env->mstatus =3D mstatus; =20 diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_tr= ans/trans_rvi.c.inc index bd9d50bb94..880026f13d 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -475,7 +475,7 @@ static bool do_csrrw(DisasContext *ctx, int rd, int rc,= TCGv src, TCGv mask) =20 static bool trans_csrrw(DisasContext *ctx, arg_csrrw *a) { - TCGv src =3D get_gpr(ctx, a->rs1, EXT_NONE); + TCGv src =3D get_gpr(ctx, a->rs1, EXT_ZERO); =20 /* * If rd =3D=3D 0, the insn shall not read the csr, nor cause any of t= he --=20 2.25.1