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[174.21.75.75]) by smtp.gmail.com with ESMTPSA id k14sm9584798pji.45.2021.10.30.10.20.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Oct 2021 10:20:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RjnbfjA/SuXJ4jF6cq76qF1xRJpDxH7O+xJW5W8IXoI=; b=kDp7EotzZACyF3SS+FYFA1VutgNiis3RGFwomzqFtaYPOrybNEE9ztKj08ZL01GaCQ fL0f1vreOznnNz9pbKRu6Hqdh9qVqaaIbjNi8+A9of3+GhRQopO0v2rmDAfL7bt2A/hr 0FgD4JmbLqBaK2ohLNAksus14gt5jnyMxEpYuReEeesCQhCQ/kp8g4mKxsUhQs1YqlQD JW1ucClD7XPFvx1hxr3LMZ7bETqbItSayDSVyWMgH4kXpCb/nPA0uihApPnFgiRIzYqw G4pXu24RRnDbPhJ09kt7DOMoDvf4iC2QcKPx5ikc5YOAR6JEVzYKv1a+7XoiVOoViGrk P78Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RjnbfjA/SuXJ4jF6cq76qF1xRJpDxH7O+xJW5W8IXoI=; b=vo62B0YbJcU5EM5TYgiqTbsYifIc8z2mNI7L3ovUztd3LMlftO045UkIGpY4x5dqCm TLwDbnAzXfkBrJhJAIYaUhuVhoCu/GjGf6IyEmfX/6zKQh+otb/vVPI1pjc96wvC9Klk 2LUxNz3C41zZo9gRNDZU8wA7Xy2bmTXNfAYLguaQ+7aTrBrUoIIePpvGstrxRPhC97DC KQ7DAR1mdm8k0VY4DlcpRHxuCTIK1YXk6mBVuStIwZVprNv0SWOx8L8zirLmIr191uPh 7tHJGGnVsREu1UUFdv3KUdn+ZIwXmS8PBKkEqalzObOtsLcn6DXu9BYEs/Rrn8RR1SIh 6b2g== X-Gm-Message-State: AOAM531hbOBxB4d6ul81ygHbXgg0DD7y+T7gw9TEyUThWjDyZ2dgWoBm QS+fKp0K4CLxvdEu5zWCoS8uqHTzXEcRjQ== X-Google-Smtp-Source: ABdhPJx/6mqiUr12ygcIyfQxZ78u1wTwz9rB3pP8RI5iP0wmLKZRG9J8evf3PUO+Qn3Sm7viLE72Sg== X-Received: by 2002:a05:6a00:230e:b0:44c:4f2d:9b00 with SMTP id h14-20020a056a00230e00b0044c4f2d9b00mr18461349pfh.24.1635614424408; Sat, 30 Oct 2021 10:20:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v6 52/66] target/s390x: Implement s390x_cpu_record_sigbus Date: Sat, 30 Oct 2021 10:16:21 -0700 Message-Id: <20211030171635.1689530-53-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211030171635.1689530-1-richard.henderson@linaro.org> References: <20211030171635.1689530-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu, imp@bsdimp.com, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1635617161342100001 For s390x, the only unaligned accesses that are signaled are atomic, and we don't actually want to raise SIGBUS for those, but instead raise a SPECIFICATION error, which the kernel will report as SIGILL. Split out a do_unaligned_access function to share between the user-only s390x_cpu_record_sigbus and the sysemu s390x_do_unaligned_access. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/s390x/s390x-internal.h | 8 +++++--- target/s390x/cpu.c | 1 + target/s390x/tcg/excp_helper.c | 27 ++++++++++++++++++++------- 3 files changed, 26 insertions(+), 10 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 163aa4f94a..1a178aed41 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -270,18 +270,20 @@ ObjectClass *s390_cpu_class_by_name(const char *name); void s390x_cpu_debug_excp_handler(CPUState *cs); void s390_cpu_do_interrupt(CPUState *cpu); bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req); -void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, - MMUAccessType access_type, int mmu_idx, - uintptr_t retaddr) QEMU_NORETURN; =20 #ifdef CONFIG_USER_ONLY void s390_cpu_record_sigsegv(CPUState *cs, vaddr address, MMUAccessType access_type, bool maperr, uintptr_t retaddr); +void s390_cpu_record_sigbus(CPUState *cs, vaddr address, + MMUAccessType access_type, uintptr_t retaddr); #else bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); +void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, + MMUAccessType access_type, int mmu_idx, + uintptr_t retaddr) QEMU_NORETURN; #endif =20 =20 diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 593dda75c4..ccdbaf84d5 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -269,6 +269,7 @@ static const struct TCGCPUOps s390_tcg_ops =3D { =20 #ifdef CONFIG_USER_ONLY .record_sigsegv =3D s390_cpu_record_sigsegv, + .record_sigbus =3D s390_cpu_record_sigbus, #else .tlb_fill =3D s390_cpu_tlb_fill, .cpu_exec_interrupt =3D s390_cpu_exec_interrupt, diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index b923d080fc..4e7648f301 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -82,6 +82,19 @@ void HELPER(data_exception)(CPUS390XState *env, uint32_t= dxc) tcg_s390_data_exception(env, dxc, GETPC()); } =20 +/* + * Unaligned accesses are only diagnosed with MO_ALIGN. At the moment, + * this is only for the atomic operations, for which we want to raise a + * specification exception. + */ +static void QEMU_NORETURN do_unaligned_access(CPUState *cs, uintptr_t reta= ddr) +{ + S390CPU *cpu =3D S390_CPU(cs); + CPUS390XState *env =3D &cpu->env; + + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); +} + #if defined(CONFIG_USER_ONLY) =20 void s390_cpu_do_interrupt(CPUState *cs) @@ -106,6 +119,12 @@ void s390_cpu_record_sigsegv(CPUState *cs, vaddr addre= ss, cpu_loop_exit_restore(cs, retaddr); } =20 +void s390_cpu_record_sigbus(CPUState *cs, vaddr address, + MMUAccessType access_type, uintptr_t retaddr) +{ + do_unaligned_access(cs, retaddr); +} + #else /* !CONFIG_USER_ONLY */ =20 static inline uint64_t cpu_mmu_idx_to_asc(int mmu_idx) @@ -593,17 +612,11 @@ void s390x_cpu_debug_excp_handler(CPUState *cs) } } =20 -/* Unaligned accesses are only diagnosed with MO_ALIGN. At the moment, - this is only for the atomic operations, for which we want to raise a - specification exception. */ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { - S390CPU *cpu =3D S390_CPU(cs); - CPUS390XState *env =3D &cpu->env; - - tcg_s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); + do_unaligned_access(cs, retaddr); } =20 static void QEMU_NORETURN monitor_event(CPUS390XState *env, --=20 2.25.1