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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 04/56] host-utils: add 128-bit quotient support to
divu128/divs128
Date: Wed, 27 Oct 2021 19:40:39 -0700
Message-Id: <20211028024131.1492790-5-richard.henderson@linaro.org>
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From: Luis Pires <luis.pires@eldorado.org.br>
These will be used to implement new decimal floating point
instructions from Power ISA 3.1.
The remainder is now returned directly by divu128/divs128,
freeing up phigh to receive the high 64 bits of the quotient.
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211025191154.350831-4-luis.pires@eldorado.org.br>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/clock.h | 6 +-
include/qemu/host-utils.h | 20 ++++--
target/ppc/int_helper.c | 9 +--
util/host-utils.c | 133 +++++++++++++++++++++++++-------------
4 files changed, 108 insertions(+), 60 deletions(-)
diff --git a/include/hw/clock.h b/include/hw/clock.h
index 7443e6c4ab..5c927cee7f 100644
--- a/include/hw/clock.h
+++ b/include/hw/clock.h
@@ -323,11 +323,7 @@ static inline uint64_t clock_ns_to_ticks(const Clock *=
clk, uint64_t ns)
if (clk->period =3D=3D 0) {
return 0;
}
- /*
- * BUG: when CONFIG_INT128 is not defined, the current implementation =
of
- * divu128 does not return a valid truncated quotient, so the result w=
ill
- * be wrong.
- */
+
divu128(&lo, &hi, clk->period);
return lo;
}
diff --git a/include/qemu/host-utils.h b/include/qemu/host-utils.h
index 08a17e16e5..a3a7ced78d 100644
--- a/include/qemu/host-utils.h
+++ b/include/qemu/host-utils.h
@@ -56,26 +56,32 @@ static inline uint64_t muldiv64(uint64_t a, uint32_t b,=
uint32_t c)
return (__int128_t)a * b / c;
}
=20
-static inline void divu128(uint64_t *plow, uint64_t *phigh, uint64_t divis=
or)
+static inline uint64_t divu128(uint64_t *plow, uint64_t *phigh,
+ uint64_t divisor)
{
__uint128_t dividend =3D ((__uint128_t)*phigh << 64) | *plow;
__uint128_t result =3D dividend / divisor;
+
*plow =3D result;
- *phigh =3D dividend % divisor;
+ *phigh =3D result >> 64;
+ return dividend % divisor;
}
=20
-static inline void divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
+static inline int64_t divs128(uint64_t *plow, int64_t *phigh,
+ int64_t divisor)
{
- __int128_t dividend =3D ((__int128_t)*phigh << 64) | (uint64_t)*plow;
+ __int128_t dividend =3D ((__int128_t)*phigh << 64) | *plow;
__int128_t result =3D dividend / divisor;
+
*plow =3D result;
- *phigh =3D dividend % divisor;
+ *phigh =3D result >> 64;
+ return dividend % divisor;
}
#else
void muls64(uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b);
void mulu64(uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b);
-void divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor);
-void divs128(int64_t *plow, int64_t *phigh, int64_t divisor);
+uint64_t divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor);
+int64_t divs128(uint64_t *plow, int64_t *phigh, int64_t divisor);
=20
static inline uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c)
{
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 510faf24cf..eeb7781a9e 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -120,7 +120,7 @@ uint64_t helper_divdeu(CPUPPCState *env, uint64_t ra, u=
int64_t rb, uint32_t oe)
=20
uint64_t helper_divde(CPUPPCState *env, uint64_t rau, uint64_t rbu, uint32=
_t oe)
{
- int64_t rt =3D 0;
+ uint64_t rt =3D 0;
int64_t ra =3D (int64_t)rau;
int64_t rb =3D (int64_t)rbu;
int overflow =3D 0;
@@ -2506,6 +2506,7 @@ uint32_t helper_bcdcfsq(ppc_avr_t *r, ppc_avr_t *b, u=
int32_t ps)
int cr;
uint64_t lo_value;
uint64_t hi_value;
+ uint64_t rem;
ppc_avr_t ret =3D { .u64 =3D { 0, 0 } };
=20
if (b->VsrSD(0) < 0) {
@@ -2541,10 +2542,10 @@ uint32_t helper_bcdcfsq(ppc_avr_t *r, ppc_avr_t *b,=
uint32_t ps)
* In that case, we leave r unchanged.
*/
} else {
- divu128(&lo_value, &hi_value, 1000000000000000ULL);
+ rem =3D divu128(&lo_value, &hi_value, 1000000000000000ULL);
=20
- for (i =3D 1; i < 16; hi_value /=3D 10, i++) {
- bcd_put_digit(&ret, hi_value % 10, i);
+ for (i =3D 1; i < 16; rem /=3D 10, i++) {
+ bcd_put_digit(&ret, rem % 10, i);
}
=20
for (; i < 32; lo_value /=3D 10, i++) {
diff --git a/util/host-utils.c b/util/host-utils.c
index 701a371843..bcc772b8ec 100644
--- a/util/host-utils.c
+++ b/util/host-utils.c
@@ -87,72 +87,117 @@ void muls64 (uint64_t *plow, uint64_t *phigh, int64_t =
a, int64_t b)
}
=20
/*
- * Unsigned 128-by-64 division. Returns quotient via plow and
- * remainder via phigh.
- * The result must fit in 64 bits (plow) - otherwise, the result
- * is undefined.
- * This function will cause a division by zero if passed a zero divisor.
+ * Unsigned 128-by-64 division.
+ * Returns the remainder.
+ * Returns quotient via plow and phigh.
+ * Also returns the remainder via the function return value.
*/
-void divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor)
+uint64_t divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor)
{
uint64_t dhi =3D *phigh;
uint64_t dlo =3D *plow;
- unsigned i;
- uint64_t carry =3D 0;
+ uint64_t rem, dhighest;
+ int sh;
=20
if (divisor =3D=3D 0 || dhi =3D=3D 0) {
*plow =3D dlo / divisor;
- *phigh =3D dlo % divisor;
+ *phigh =3D 0;
+ return dlo % divisor;
} else {
+ sh =3D clz64(divisor);
=20
- for (i =3D 0; i < 64; i++) {
- carry =3D dhi >> 63;
- dhi =3D (dhi << 1) | (dlo >> 63);
- if (carry || (dhi >=3D divisor)) {
- dhi -=3D divisor;
- carry =3D 1;
- } else {
- carry =3D 0;
+ if (dhi < divisor) {
+ if (sh !=3D 0) {
+ /* normalize the divisor, shifting the dividend accordingl=
y */
+ divisor <<=3D sh;
+ dhi =3D (dhi << sh) | (dlo >> (64 - sh));
+ dlo <<=3D sh;
}
- dlo =3D (dlo << 1) | carry;
+
+ *phigh =3D 0;
+ *plow =3D udiv_qrnnd(&rem, dhi, dlo, divisor);
+ } else {
+ if (sh !=3D 0) {
+ /* normalize the divisor, shifting the dividend accordingl=
y */
+ divisor <<=3D sh;
+ dhighest =3D dhi >> (64 - sh);
+ dhi =3D (dhi << sh) | (dlo >> (64 - sh));
+ dlo <<=3D sh;
+
+ *phigh =3D udiv_qrnnd(&dhi, dhighest, dhi, divisor);
+ } else {
+ /**
+ * dhi >=3D divisor
+ * Since the MSB of divisor is set (sh =3D=3D 0),
+ * (dhi - divisor) < divisor
+ *
+ * Thus, the high part of the quotient is 1, and we can
+ * calculate the low part with a single call to udiv_qrnnd
+ * after subtracting divisor from dhi
+ */
+ dhi -=3D divisor;
+ *phigh =3D 1;
+ }
+
+ *plow =3D udiv_qrnnd(&rem, dhi, dlo, divisor);
}
=20
- *plow =3D dlo;
- *phigh =3D dhi;
+ /*
+ * since the dividend/divisor might have been normalized,
+ * the remainder might also have to be shifted back
+ */
+ return rem >> sh;
}
}
=20
/*
- * Signed 128-by-64 division. Returns quotient via plow and
- * remainder via phigh.
- * The result must fit in 64 bits (plow) - otherwise, the result
- * is undefined.
- * This function will cause a division by zero if passed a zero divisor.
+ * Signed 128-by-64 division.
+ * Returns quotient via plow and phigh.
+ * Also returns the remainder via the function return value.
*/
-void divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
+int64_t divs128(uint64_t *plow, int64_t *phigh, int64_t divisor)
{
- int sgn_dvdnd =3D *phigh < 0;
- int sgn_divsr =3D divisor < 0;
+ bool neg_quotient =3D false, neg_remainder =3D false;
+ uint64_t unsig_hi =3D *phigh, unsig_lo =3D *plow;
+ uint64_t rem;
=20
- if (sgn_dvdnd) {
- *plow =3D ~(*plow);
- *phigh =3D ~(*phigh);
- if (*plow =3D=3D (int64_t)-1) {
+ if (*phigh < 0) {
+ neg_quotient =3D !neg_quotient;
+ neg_remainder =3D !neg_remainder;
+
+ if (unsig_lo =3D=3D 0) {
+ unsig_hi =3D -unsig_hi;
+ } else {
+ unsig_hi =3D ~unsig_hi;
+ unsig_lo =3D -unsig_lo;
+ }
+ }
+
+ if (divisor < 0) {
+ neg_quotient =3D !neg_quotient;
+
+ divisor =3D -divisor;
+ }
+
+ rem =3D divu128(&unsig_lo, &unsig_hi, (uint64_t)divisor);
+
+ if (neg_quotient) {
+ if (unsig_lo =3D=3D 0) {
+ *phigh =3D -unsig_hi;
*plow =3D 0;
- (*phigh)++;
- } else {
- (*plow)++;
- }
+ } else {
+ *phigh =3D ~unsig_hi;
+ *plow =3D -unsig_lo;
+ }
+ } else {
+ *phigh =3D unsig_hi;
+ *plow =3D unsig_lo;
}
=20
- if (sgn_divsr) {
- divisor =3D 0 - divisor;
- }
-
- divu128((uint64_t *)plow, (uint64_t *)phigh, (uint64_t)divisor);
-
- if (sgn_dvdnd ^ sgn_divsr) {
- *plow =3D 0 - *plow;
+ if (neg_remainder) {
+ return -rem;
+ } else {
+ return rem;
}
}
#endif
--=20
2.25.1