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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 26/56] tcg/optimize: Split out fold_addsub2_i32
Date: Wed, 27 Oct 2021 19:41:01 -0700
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Cc: Luis Pires <luis.pires@eldorado.org.br>,
=?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <f4bug@amsat.org>
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Add two additional helpers, fold_add2_i32 and fold_sub2_i32
which will not be simple wrappers forever.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/optimize.c | 70 +++++++++++++++++++++++++++++++-------------------
1 file changed, 44 insertions(+), 26 deletions(-)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 805522f99d..9d1d045363 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -704,6 +704,39 @@ static bool fold_add(OptContext *ctx, TCGOp *op)
return fold_const2(ctx, op);
}
=20
+static bool fold_addsub2_i32(OptContext *ctx, TCGOp *op, bool add)
+{
+ if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) &&
+ arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
+ uint32_t al =3D arg_info(op->args[2])->val;
+ uint32_t ah =3D arg_info(op->args[3])->val;
+ uint32_t bl =3D arg_info(op->args[4])->val;
+ uint32_t bh =3D arg_info(op->args[5])->val;
+ uint64_t a =3D ((uint64_t)ah << 32) | al;
+ uint64_t b =3D ((uint64_t)bh << 32) | bl;
+ TCGArg rl, rh;
+ TCGOp *op2 =3D tcg_op_insert_before(ctx->tcg, op, INDEX_op_mov_i32=
);
+
+ if (add) {
+ a +=3D b;
+ } else {
+ a -=3D b;
+ }
+
+ rl =3D op->args[0];
+ rh =3D op->args[1];
+ tcg_opt_gen_movi(ctx, op, rl, (int32_t)a);
+ tcg_opt_gen_movi(ctx, op2, rh, (int32_t)(a >> 32));
+ return true;
+ }
+ return false;
+}
+
+static bool fold_add2_i32(OptContext *ctx, TCGOp *op)
+{
+ return fold_addsub2_i32(ctx, op, true);
+}
+
static bool fold_and(OptContext *ctx, TCGOp *op)
{
return fold_const2(ctx, op);
@@ -1056,6 +1089,11 @@ static bool fold_sub(OptContext *ctx, TCGOp *op)
return fold_const2(ctx, op);
}
=20
+static bool fold_sub2_i32(OptContext *ctx, TCGOp *op)
+{
+ return fold_addsub2_i32(ctx, op, false);
+}
+
static bool fold_xor(OptContext *ctx, TCGOp *op)
{
return fold_const2(ctx, op);
@@ -1701,32 +1739,6 @@ void tcg_optimize(TCGContext *s)
}
break;
=20
- case INDEX_op_add2_i32:
- case INDEX_op_sub2_i32:
- if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
- && arg_is_const(op->args[4]) && arg_is_const(op->args[5]))=
{
- uint32_t al =3D arg_info(op->args[2])->val;
- uint32_t ah =3D arg_info(op->args[3])->val;
- uint32_t bl =3D arg_info(op->args[4])->val;
- uint32_t bh =3D arg_info(op->args[5])->val;
- uint64_t a =3D ((uint64_t)ah << 32) | al;
- uint64_t b =3D ((uint64_t)bh << 32) | bl;
- TCGArg rl, rh;
- TCGOp *op2 =3D tcg_op_insert_before(s, op, INDEX_op_mov_i3=
2);
-
- if (opc =3D=3D INDEX_op_add2_i32) {
- a +=3D b;
- } else {
- a -=3D b;
- }
-
- rl =3D op->args[0];
- rh =3D op->args[1];
- tcg_opt_gen_movi(&ctx, op, rl, (int32_t)a);
- tcg_opt_gen_movi(&ctx, op2, rh, (int32_t)(a >> 32));
- continue;
- }
- break;
=20
default:
break;
@@ -1737,6 +1749,9 @@ void tcg_optimize(TCGContext *s)
CASE_OP_32_64_VEC(add):
done =3D fold_add(&ctx, op);
break;
+ case INDEX_op_add2_i32:
+ done =3D fold_add2_i32(&ctx, op);
+ break;
CASE_OP_32_64_VEC(and):
done =3D fold_and(&ctx, op);
break;
@@ -1833,6 +1848,9 @@ void tcg_optimize(TCGContext *s)
CASE_OP_32_64_VEC(sub):
done =3D fold_sub(&ctx, op);
break;
+ case INDEX_op_sub2_i32:
+ done =3D fold_sub2_i32(&ctx, op);
+ break;
CASE_OP_32_64_VEC(xor):
done =3D fold_xor(&ctx, op);
break;
--=20
2.25.1