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[83.57.168.62]) by smtp.gmail.com with ESMTPSA id z6sm1676990wmp.1.2021.10.26.11.09.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Oct 2021 11:09:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=6CSLYgRhQjvLCdk922IFAeRHe+vBdRQ4LaRqWHB0w8Y=; b=ALZjHamvVo7BP/jc5WEDZg2L7lO/3Dnri63+i9i9b8bfEJ4WGQ31/bW2hB6oxzAr7R n15UHq5Kn85x94UV2BRJEHho4qkORqHEEM8r/sUNsWuP2Du9VBXsmBAehOMaFhI7X+io 9lLPe25vVol6JwELzNTGHtrmNDAmRWSuLMXlt264mT5sJmhKRztDiiq2oP2SSBK3Lmv9 JjO45dFy4pgmxkCaIC+rit4cMx/NihpzCY0OxfopSI9BEzyeVC58WshOim4q2Nl85n7l egcCr1/pk874teUu/O0R8augDMMAoMzIKh0Lz5NnIseLe2YFfqefs17PNrCYAlLCMmU/ DGfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=6CSLYgRhQjvLCdk922IFAeRHe+vBdRQ4LaRqWHB0w8Y=; b=eiIVIaf8cGRMIagn0B2D+R4EEDyRVMkOjwBISnjQsM8ZkvLP7xhRoJQTn/W5aItxNt WIpicPSblv7Kr93mKL8WCm+R50ZIgbWfLMoFJaWoT1GVnE3d8x56PjX6868OwUOn+HDk jzRgYvhjur4h9vfIXXTdGzWGlNifWeroukLEGLH0Qu9oySegxNo/MMxefODt4duJ5gIO 9XPwLdAf0yhhFuNlstVQjIbcfdSJvbB+lucJl0I3G/X3WDMzDKe0+JFFcz5XsIKVCGW1 gF2EeP+0YOWmUhCjsI6C9vdCL/bNBCVhJAUF6P+Xrex7ESoyvbOCiM2INzoHHyW0VVee AgTg== X-Gm-Message-State: AOAM532vlch02kvcAdrt0Ov186i6r4wDVu691U3vIiNT5SwwT/y69tDb nZEzmrRdzlv2z5GaVckGyb0= X-Google-Smtp-Source: ABdhPJxLP6DbDIi3mVcgPiRnoet/OgAgSi/sO4qYC81Wn1KeL4Pzp5uUfCE0+6EGiXCPECWW4rOI7g== X-Received: by 2002:adf:9c11:: with SMTP id f17mr34498175wrc.147.1635271763092; Tue, 26 Oct 2021 11:09:23 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Huacai Chen Subject: [PATCH v2] target/mips: Fix Loongson-3A4000 MSAIR config register Date: Tue, 26 Oct 2021 20:09:20 +0200 Message-Id: <20211026180920.1085516-1-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1635271766915100001 When using the Loongson-3A4000 CPU, the MSAIR is returned with a zero value (because unimplemented). Checking on real hardware, this value appears incorrect: $ cat /proc/cpuinfo system type : generic-loongson-machine machine : loongson,generic cpu model : Loongson-3 V0.4 FPU V0.1 model name : Loongson-3A R4 (Loongson-3A4000) @ 1800MHz isa : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r= 1 mips64r2 ASEs implemented : vz msa loongson-mmi loongson-cam loongson-ext l= oongson-ext2 ... Checking the CFCMSA opcode result with gdb we get 0x60140: Breakpoint 1, 0x00000001200037c4 in main () 1: x/i $pc =3D> 0x1200037c4 : cfcmsa v0,msa_ir (gdb) si 0x00000001200037c8 in main () (gdb) i r v0 v0: 0x60140 MSAIR bits 17 and 18 are "reserved" per the spec revision 1.12, so mask them out, and set MSAIR=3D0x0140 for the Loongson-3A4000 CPU model added in commit af868995e1b. Cc: Huacai Chen Reviewed-by: Jiaxun Yang Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- v2: Mask out bits 17/18 --- target/mips/cpu-defs.c.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index cbc45fcb0e8..ee8b322a564 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -886,6 +886,7 @@ const mips_def_t mips_defs[] =3D (0x1 << FCR0_D) | (0x1 << FCR0_S), .CP1_fcr31 =3D 0, .CP1_fcr31_rw_bitmask =3D 0xFF83FFFF, + .MSAIR =3D (0x01 << MSAIR_ProcID) | (0x40 << MSAIR_Rev), .SEGBITS =3D 48, .PABITS =3D 48, .insn_flags =3D CPU_MIPS64R2 | INSN_LOONGSON3A | --=20 2.31.1