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[83.57.168.62]) by smtp.gmail.com with ESMTPSA id t11sm11509355wrz.65.2021.10.23.14.48.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Oct 2021 14:48:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PaHjQTT6bAAmhFELO4JrHHj9/5ukp2x4qgAluVj1msY=; b=d4tusU++8M3s+/L4hYgW+Wvj0NdENZG8iFierInblO1toh8ASjvilhBlQJBzMZ7X/5 zFYIPkgohr+8EzKynY5qh7/Tm3viFwCmnpfjjh36G5KvrklTZrlZ1eihBEHToFReJ/4I yxGbTxmgx0BduxONuYLtyry08EeON/0Qh+Un2cRrEnR8bwmU/S8159tt25XUVbZ3X0eY 4aM++ShpIvdYt2R1GkMI8imX4BiblSXL3lpt/tqMQV2zYzGjHXLTykwKmxj9FgvSvNJW TkD5cGxr31DvXnzOpm3ctJRy814kVsqD9rp5CPizWN/jf73gtZzbCQkMbcOtnK626fe+ JIcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=PaHjQTT6bAAmhFELO4JrHHj9/5ukp2x4qgAluVj1msY=; b=GAiMGWEpfstlhdlXWZQDen5X/ssnfcX9VVGhObwpRHA7NUS1LvFbfx5qHqgf2AIUPS eGsLhDLTmGnqxuc8pVbUQ310Q8H70SGaVJnpEamIdKUXHsSaeTda/WY9sCdp6HWmJ8bH ybUnNbsOm2168VF2tKtXtUImV8pn5RvpVU7xnjOpGgd9tXi6L8DnWve6SczKoig0Tvo7 P7NchLuaHfTdZWp+Nk+Bj/76vad9W8XSvxYrxmLmTvBFGPXhL38pr+Y/HEjulI60YMPI ccEkOAaCZlkM+tSd9s2m7QdU6l6Gf85V+kVMolK0IUknuwLSaFrb4dosdfE3WIqjBQ6U ztYQ== X-Gm-Message-State: AOAM531Udr7k+9mPdGIJn/Bk+4o4TgZaazNIOPhLgaxZqSjaghwLVhIU myzn6lOS6haZkfTYiFJI2Rw= X-Google-Smtp-Source: ABdhPJzAOpPyHnayxM4LueypYP5M9j4k1tmYItr/BpO44Aq+o2h13h72UOOsdLWrfo02i06BheHWrA== X-Received: by 2002:adf:a30c:: with SMTP id c12mr10711111wrb.366.1635025704829; Sat, 23 Oct 2021 14:48:24 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Luis Pires , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH 04/33] tests/tcg/mips: Run MSA opcodes tests on user-mode emulation Date: Sat, 23 Oct 2021 23:47:34 +0200 Message-Id: <20211023214803.522078-5-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211023214803.522078-1-f4bug@amsat.org> References: <20211023214803.522078-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1635025708053100001 The following commits added various user-mode tests for various MSA instructions: - 0fdd986a6c8 ("Add tests for MSA integer add instructions") - 1be82d89011 ("Add tests for MSA integer average instructions") - 1d336c87a3c ("Add tests for MSA bit set instructions") - 1e6bea794c8 ("Add tests for MSA integer max/min instructions") - 2a367db039f ("Add tests for MSA pack instructions") - 3d9569b8550 ("Add tests for MSA move instructions") - 4b302ce90db ("Add tests for MSA integer multiply instructions") - 520e210c0aa ("Add tests for MSA integer compare instructions") - 53e116fed6d ("Add tests for MSA integer subtract instructions") - 666952ea7c1 ("Add tests for MSA bit move instructions") - 72f463bc080 ("Add tests for MSA integer divide instructions") - 8598f5fac1c ("Add tests for MSA FP max/min instructions") - 99d423e576a ("Add tests for MSA shift instructions") - a8f91dd9fd0 ("Add tests for MSA integer dot product instructions") - b62592ab655 ("Add tests for MSA bit counting instructions") - ba632924450 ("Add tests for MSA logic instructions") - fc76f486677 ("Add tests for MSA interleave instructions") Cover them in the buildsys machinery so they are run automatically when calling 'make check-tcg'. Start running them on the mips64el target. Cc: Alex Benn=C3=A9e Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- tests/tcg/mips/ase-msa.mak | 30 ++++++++++++++++++++++++++++++ MAINTAINERS | 1 + tests/tcg/mips/Makefile.target | 5 +++++ tests/tcg/mips64/Makefile.target | 9 +++++++++ tests/tcg/mips64el/Makefile.target | 12 ++++++++++++ tests/tcg/mipsel/Makefile.target | 9 +++++++++ 6 files changed, 66 insertions(+) create mode 100644 tests/tcg/mips/ase-msa.mak create mode 100644 tests/tcg/mips64/Makefile.target create mode 100644 tests/tcg/mips64el/Makefile.target create mode 100644 tests/tcg/mipsel/Makefile.target diff --git a/tests/tcg/mips/ase-msa.mak b/tests/tcg/mips/ase-msa.mak new file mode 100644 index 00000000000..be1ba967a5b --- /dev/null +++ b/tests/tcg/mips/ase-msa.mak @@ -0,0 +1,30 @@ +# -*- Mode: makefile -*- +# +# MIPS MSA specific TCG tests +# +# Copyright (c) 2021 Philippe Mathieu-Daud=C3=A9 +# +# SPDX-License-Identifier: GPL-2.0-or-later + +MSA_DIR =3D $(SRC_PATH)/tests/tcg/mips/user/ase/msa + +MSA_TEST_CLASS =3D bit-count bit-move bit-set fixed-multiply \ + float-max-min int-add int-average int-compare int-divide \ + int-dot-product interleave int-max-min int-modulo \ + int-multiply int-subtract logic move pack shift + +MSA_TEST_SRCS =3D $(foreach class,$(MSA_TEST_CLASS),$(wildcard $(MSA_DIR)/= $(class)/*.c)) + +MSA_TESTS =3D $(patsubst %.c,%,$(notdir $(MSA_TEST_SRCS))) + +$(MSA_TESTS): CFLAGS+=3D-mmsa $(MSA_CFLAGS) +$(MSA_TESTS): %: $(foreach CLASS,$(MSA_TEST_CLASS),$(wildcard $(MSA_DIR)/$= (CLASS)/%.c)) + $(CC) -static $(CFLAGS) -o $@ \ + $(foreach CLASS,$(MSA_TEST_CLASS),$(wildcard $(MSA_DIR)/$(CLASS)/$@.c)) + +$(foreach test,$(MSA_TESTS),run-$(test)): QEMU_OPTS +=3D -cpu $(MSA_CPU) + +# FIXME: These tests fail when using plugins +ifneq ($(CONFIG_PLUGIN),y) +TESTS +=3D $(MSA_TESTS) +endif diff --git a/MAINTAINERS b/MAINTAINERS index 4e77d03651b..53c6c549b80 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3111,6 +3111,7 @@ R: Jiaxun Yang R: Aleksandar Rikalo S: Odd Fixes F: tcg/mips/ +F: tests/tcg/mips* =20 PPC TCG target M: Richard Henderson diff --git a/tests/tcg/mips/Makefile.target b/tests/tcg/mips/Makefile.target index 1a994d5525e..191fe179119 100644 --- a/tests/tcg/mips/Makefile.target +++ b/tests/tcg/mips/Makefile.target @@ -17,3 +17,8 @@ TESTS +=3D $(MIPS_TESTS) hello-mips: CFLAGS+=3D-mno-abicalls -fno-PIC -mabi=3D32 hello-mips: LDFLAGS+=3D-nostdlib endif + +# FIXME enable MSA tests +#MSA_CFLAGS=3D-march=3Dmips64r5 -mnan=3D2008 +#MSA_CPU=3DP5600 +#include $(SRC_PATH)/tests/tcg/mips/ase-msa.mak diff --git a/tests/tcg/mips64/Makefile.target b/tests/tcg/mips64/Makefile.t= arget new file mode 100644 index 00000000000..d876b92f219 --- /dev/null +++ b/tests/tcg/mips64/Makefile.target @@ -0,0 +1,9 @@ +# -*- Mode: makefile -*- +# +# mips64el specific TCG tests +# +# Copyright (c) 2021 Philippe Mathieu-Daud=C3=A9 +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# 64-bit MSA is tested on little-endian target diff --git a/tests/tcg/mips64el/Makefile.target b/tests/tcg/mips64el/Makefi= le.target new file mode 100644 index 00000000000..87c0d6dce18 --- /dev/null +++ b/tests/tcg/mips64el/Makefile.target @@ -0,0 +1,12 @@ +# -*- Mode: makefile -*- +# +# mips64el specific TCG tests +# +# Copyright (c) 2021 Philippe Mathieu-Daud=C3=A9 +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# MSA +MSA_CFLAGS=3D-march=3Dmips64r5 -mnan=3Dlegacy +MSA_CPU=3DLoongson-3A4000 +include $(SRC_PATH)/tests/tcg/mips/ase-msa.mak diff --git a/tests/tcg/mipsel/Makefile.target b/tests/tcg/mipsel/Makefile.t= arget new file mode 100644 index 00000000000..c8acacb4497 --- /dev/null +++ b/tests/tcg/mipsel/Makefile.target @@ -0,0 +1,9 @@ +# -*- Mode: makefile -*- +# +# mipsel specific TCG tests +# +# Copyright (c) 2021 Philippe Mathieu-Daud=C3=A9 +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# 32-bit MSA is tested on big-endian target --=20 2.31.1