From nobody Mon May 6 10:55:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1634737468009180.49863064250292; Wed, 20 Oct 2021 06:44:28 -0700 (PDT) Received: from localhost ([::1]:39664 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdBtK-0006xd-UP for importer@patchew.org; Wed, 20 Oct 2021 09:44:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37644) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBr9-00040a-V8 for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:11 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:56406 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBr7-0002d8-5w for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:11 -0400 Received: from [2a00:23c4:8b9d:f500:9396:df17:737c:b32c] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mdBqm-00011V-Cp; Wed, 20 Oct 2021 14:41:52 +0100 From: Mark Cave-Ayland To: laurent@vivier.eu, qemu-devel@nongnu.org Date: Wed, 20 Oct 2021 14:41:24 +0100 Message-Id: <20211020134131.4392-2-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> References: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9d:f500:9396:df17:737c:b32c X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 1/8] mac_via: update comment for VIA1B_vMystery bit X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1634737469171100005 Content-Type: text/plain; charset="utf-8" According to both Linux and NetBSD, port B bit 6 is used on the Quadra 800 = to configure the GLUE logic in A/UX mode. Whilst the name VIA1B_vMystery isn't particularly descriptive, the patch leaves this to ensure that the constants in mac_via.c remain in sync with Linux's mac_via.h. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/misc/mac_via.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index 993bac017d..7a53a8b4c0 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -130,6 +130,10 @@ * On SE/30, vertical sync interrupt enable. * 0=3Denabled. This vSync interrupt shows = up * as a slot $E interrupt. + * On Quadra 800 this bit toggles A/UX mode= which + * configures the glue logic to deliver som= e IRQs + * at different levels compared to a classic + * Mac. */ #define VIA1B_vADBS2 0x20 /* ADB state input bit 1 (unused on IIfx) */ #define VIA1B_vADBS1 0x10 /* ADB state input bit 0 (unused on IIfx) */ --=20 2.20.1 From nobody Mon May 6 10:55:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1634737670392704.3226390903059; Wed, 20 Oct 2021 06:47:50 -0700 (PDT) Received: from localhost ([::1]:48156 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdBwb-0004fR-8u for importer@patchew.org; Wed, 20 Oct 2021 09:47:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37678) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrF-00049I-4W for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:17 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:56412 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrA-0002gI-9v for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:16 -0400 Received: from [2a00:23c4:8b9d:f500:9396:df17:737c:b32c] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mdBqq-00011V-UE; Wed, 20 Oct 2021 14:41:56 +0100 From: Mark Cave-Ayland To: laurent@vivier.eu, qemu-devel@nongnu.org Date: Wed, 20 Oct 2021 14:41:25 +0100 Message-Id: <20211020134131.4392-3-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> References: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9d:f500:9396:df17:737c:b32c X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 2/8] q800: move VIA1 IRQ from level 1 to level 6 X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1634737672579100001 Content-Type: text/plain; charset="utf-8" On a Quadra 800 machine Linux sets via_alt_mapping to 1 and clears port B b= it 6 to ensure that the VIA1 IRQ is delivered at level 6 rather than level 1. Even = though QEMU doesn't yet emulate this behaviour, Linux still installs the VIA1 leve= l 1 IRQ handler regardless of the value of via_alt_mapping which is why the kernel = has been able to boot until now. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index fd4855047e..15f3067811 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -284,7 +284,7 @@ static void q800_init(MachineState *machine) sysbus =3D SYS_BUS_DEVICE(via1_dev); sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 1, VIA_BASE); - sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 0)); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 5)); =20 adb_bus =3D qdev_get_child_bus(via1_dev, "adb.0"); dev =3D qdev_new(TYPE_ADB_KEYBOARD); --=20 2.20.1 From nobody Mon May 6 10:55:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1634737478716330.71400951815406; Wed, 20 Oct 2021 06:44:38 -0700 (PDT) Received: from localhost ([::1]:40444 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdBtV-0007as-Ks for importer@patchew.org; Wed, 20 Oct 2021 09:44:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37702) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrH-0004GB-Cz for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:19 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:56418 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrE-0002iW-9Y for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:19 -0400 Received: from [2a00:23c4:8b9d:f500:9396:df17:737c:b32c] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mdBqu-00011V-QX; Wed, 20 Oct 2021 14:42:00 +0100 From: Mark Cave-Ayland To: laurent@vivier.eu, qemu-devel@nongnu.org Date: Wed, 20 Oct 2021 14:41:26 +0100 Message-Id: <20211020134131.4392-4-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> References: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9d:f500:9396:df17:737c:b32c X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 3/8] q800: use GLUE IRQ numbers instead of IRQ level for GLUE IRQs X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1634737480781100002 Content-Type: text/plain; charset="utf-8" In order to allow dynamic routing of IRQs to different IRQ levels on the CPU depending upon port B bit 6, use GLUE IRQ numbers and map them to the the corresponding CPU IRQ level accordingly. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 15f3067811..81c335bf16 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -102,11 +102,34 @@ struct GLUEState { uint8_t ipr; }; =20 +#define GLUE_IRQ_IN_VIA1 0 +#define GLUE_IRQ_IN_VIA2 1 +#define GLUE_IRQ_IN_SONIC 2 +#define GLUE_IRQ_IN_ESCC 3 + static void GLUE_set_irq(void *opaque, int irq, int level) { GLUEState *s =3D opaque; int i; =20 + switch (irq) { + case GLUE_IRQ_IN_VIA1: + irq =3D 5; + break; + + case GLUE_IRQ_IN_VIA2: + irq =3D 1; + break; + + case GLUE_IRQ_IN_SONIC: + irq =3D 2; + break; + + case GLUE_IRQ_IN_ESCC: + irq =3D 3; + break; + } + if (level) { s->ipr |=3D 1 << irq; } else { @@ -284,7 +307,7 @@ static void q800_init(MachineState *machine) sysbus =3D SYS_BUS_DEVICE(via1_dev); sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 1, VIA_BASE); - sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 5)); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_VIA1)= ); =20 adb_bus =3D qdev_get_child_bus(via1_dev, "adb.0"); dev =3D qdev_new(TYPE_ADB_KEYBOARD); @@ -297,7 +320,7 @@ static void q800_init(MachineState *machine) sysbus =3D SYS_BUS_DEVICE(via2_dev); sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 1, VIA_BASE + VIA_SIZE); - sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 1)); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_VIA2)= ); =20 /* MACSONIC */ =20 @@ -330,7 +353,7 @@ static void q800_init(MachineState *machine) sysbus =3D SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 0, SONIC_BASE); - sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); + sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_SONIC= )); =20 memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom", SONIC_PROM_SIZE, &error_fatal); @@ -366,7 +389,8 @@ static void q800_init(MachineState *machine) qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); - qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3= )); + qdev_connect_gpio_out(DEVICE(escc_orgate), 0, + qdev_get_gpio_in(glue, GLUE_IRQ_IN_ESCC)); sysbus_mmio_map(sysbus, 0, SCC_BASE); =20 /* SCSI */ --=20 2.20.1 From nobody Mon May 6 10:55:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1634737837352287.925179362128; Wed, 20 Oct 2021 06:50:37 -0700 (PDT) Received: from localhost ([::1]:55078 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdBzI-0000uD-CC for importer@patchew.org; Wed, 20 Oct 2021 09:50:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37744) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrL-0004Pr-0p for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:23 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:56426 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrI-0002lI-DC for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:22 -0400 Received: from [2a00:23c4:8b9d:f500:9396:df17:737c:b32c] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mdBqz-00011V-4u; Wed, 20 Oct 2021 14:42:05 +0100 From: Mark Cave-Ayland To: laurent@vivier.eu, qemu-devel@nongnu.org Date: Wed, 20 Oct 2021 14:41:27 +0100 Message-Id: <20211020134131.4392-5-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> References: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9d:f500:9396:df17:737c:b32c X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 4/8] mac_via: add GPIO for A/UX mode X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1634737837974100001 Content-Type: text/plain; charset="utf-8" Add a new auxmode GPIO that is updated when port B bit 6 is changed indicat= ing whether the hardware is configured for A/UX mode. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/misc/mac_via.c | 19 +++++++++++++++++++ hw/misc/trace-events | 1 + include/hw/misc/mac_via.h | 1 + 3 files changed, 21 insertions(+) diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c index 7a53a8b4c0..b378e6b305 100644 --- a/hw/misc/mac_via.c +++ b/hw/misc/mac_via.c @@ -880,6 +880,21 @@ static void via1_adb_update(MOS6522Q800VIA1State *v1s) } } =20 +static void via1_auxmode_update(MOS6522Q800VIA1State *v1s) +{ + MOS6522State *s =3D MOS6522(v1s); + int oldirq, irq; + + oldirq =3D (v1s->last_b & VIA1B_vMystery) ? 1 : 0; + irq =3D (s->b & VIA1B_vMystery) ? 1 : 0; + + /* Check to see if the A/UX mode bit has changed */ + if (irq !=3D oldirq) { + trace_via1_auxmode(irq); + qemu_set_irq(v1s->auxmode_irq, irq); + } +} + static uint64_t mos6522_q800_via1_read(void *opaque, hwaddr addr, unsigned= size) { MOS6522Q800VIA1State *s =3D MOS6522_Q800_VIA1(opaque); @@ -902,6 +917,7 @@ static void mos6522_q800_via1_write(void *opaque, hwadd= r addr, uint64_t val, case VIA_REG_B: via1_rtc_update(v1s); via1_adb_update(v1s); + via1_auxmode_update(v1s); =20 v1s->last_b =3D ms->b; break; @@ -1046,6 +1062,9 @@ static void mos6522_q800_via1_init(Object *obj) TYPE_ADB_BUS, DEVICE(v1s), "adb.0"); =20 qdev_init_gpio_in(DEVICE(obj), via1_irq_request, VIA1_IRQ_NB); + + /* A/UX mode */ + qdev_init_gpio_out(DEVICE(obj), &v1s->auxmode_irq, 1); } =20 static const VMStateDescription vmstate_q800_via1 =3D { diff --git a/hw/misc/trace-events b/hw/misc/trace-events index ede413965b..2da96d167a 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -228,6 +228,7 @@ via1_rtc_cmd_pram_sect_write(int sector, int offset, in= t addr, int value) "secto via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state= %s data=3D0x%02x vADBInt=3D%s" via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int= status, int index, int size) "state %s data=3D0x%02x vADBInt=3D%s status= =3D0x%x index=3D%d size=3D%d" via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, in= t size) "data=3D0x%02x vADBInt=3D%s status=3D0x%x index=3D%d size=3D%d" +via1_auxmode(int mode) "setting auxmode to %d" =20 # grlib_ahb_apb_pnp.c grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03= "PRIx64" data:0x%08x" diff --git a/include/hw/misc/mac_via.h b/include/hw/misc/mac_via.h index 4506abe5d0..b445565866 100644 --- a/include/hw/misc/mac_via.h +++ b/include/hw/misc/mac_via.h @@ -43,6 +43,7 @@ struct MOS6522Q800VIA1State { MemoryRegion via_mem; =20 qemu_irq irqs[VIA1_IRQ_NB]; + qemu_irq auxmode_irq; uint8_t last_b; =20 /* RTC */ --=20 2.20.1 From nobody Mon May 6 10:55:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1634737677371896.6710885002491; Wed, 20 Oct 2021 06:47:57 -0700 (PDT) Received: from localhost ([::1]:48658 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdBwi-0004zy-D3 for importer@patchew.org; Wed, 20 Oct 2021 09:47:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37734) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrK-0004PG-Bo for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:22 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:56430 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrI-0002lQ-On for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:22 -0400 Received: from [2a00:23c4:8b9d:f500:9396:df17:737c:b32c] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mdBr3-00011V-4N; Wed, 20 Oct 2021 14:42:05 +0100 From: Mark Cave-Ayland To: laurent@vivier.eu, qemu-devel@nongnu.org Date: Wed, 20 Oct 2021 14:41:28 +0100 Message-Id: <20211020134131.4392-6-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> References: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9d:f500:9396:df17:737c:b32c X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 5/8] q800: wire up auxmode GPIO to GLUE X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1634737679305100001 Content-Type: text/plain; charset="utf-8" This enables the GLUE logic to change its CPU level IRQ routing depending u= pon whether the hardware has been configured for A/UX mode. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 81c335bf16..0093872d89 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -100,6 +100,7 @@ struct GLUEState { SysBusDevice parent_obj; M68kCPU *cpu; uint8_t ipr; + uint8_t auxmode; }; =20 #define GLUE_IRQ_IN_VIA1 0 @@ -145,11 +146,19 @@ static void GLUE_set_irq(void *opaque, int irq, int l= evel) m68k_set_irq_level(s->cpu, 0, 0); } =20 +static void glue_auxmode_set_irq(void *opaque, int irq, int level) +{ + GLUEState *s =3D GLUE(opaque); + + s->auxmode =3D level; +} + static void glue_reset(DeviceState *dev) { GLUEState *s =3D GLUE(dev); =20 s->ipr =3D 0; + s->auxmode =3D 0; } =20 static const VMStateDescription vmstate_glue =3D { @@ -158,6 +167,7 @@ static const VMStateDescription vmstate_glue =3D { .minimum_version_id =3D 0, .fields =3D (VMStateField[]) { VMSTATE_UINT8(ipr, GLUEState), + VMSTATE_UINT8(auxmode, GLUEState), VMSTATE_END_OF_LIST(), }, }; @@ -178,6 +188,7 @@ static void glue_init(Object *obj) DeviceState *dev =3D DEVICE(obj); =20 qdev_init_gpio_in(dev, GLUE_set_irq, 8); + qdev_init_gpio_in_named(dev, glue_auxmode_set_irq, "auxmode", 1); } =20 static void glue_class_init(ObjectClass *klass, void *data) @@ -308,6 +319,9 @@ static void q800_init(MachineState *machine) sysbus_realize_and_unref(sysbus, &error_fatal); sysbus_mmio_map(sysbus, 1, VIA_BASE); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_VIA1)= ); + /* A/UX mode */ + qdev_connect_gpio_out(via1_dev, 0, + qdev_get_gpio_in_named(glue, "auxmode", 0)); =20 adb_bus =3D qdev_get_child_bus(via1_dev, "adb.0"); dev =3D qdev_new(TYPE_ADB_KEYBOARD); --=20 2.20.1 From nobody Mon May 6 10:55:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1634737662956659.4524424186403; Wed, 20 Oct 2021 06:47:42 -0700 (PDT) Received: from localhost ([::1]:47704 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdBwT-0004Lg-U9 for importer@patchew.org; Wed, 20 Oct 2021 09:47:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37748) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrL-0004Qm-RW for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:24 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:56436 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrJ-0002lq-AT for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:23 -0400 Received: from [2a00:23c4:8b9d:f500:9396:df17:737c:b32c] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mdBr3-00011V-Eh; Wed, 20 Oct 2021 14:42:05 +0100 From: Mark Cave-Ayland To: laurent@vivier.eu, qemu-devel@nongnu.org Date: Wed, 20 Oct 2021 14:41:29 +0100 Message-Id: <20211020134131.4392-7-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> References: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9d:f500:9396:df17:737c:b32c X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 6/8] q800: route SONIC on-board Ethernet IRQ via nubus IRQ 9 in classic mode X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1634737663692100001 Content-Type: text/plain; charset="utf-8" When the hardware is operating in classic mode the SONIC on-board Ethernet = IRQ is routed to nubus IRQ 9 instead of directly to the CPU at level 3. This does = not affect the framebuffer which although it exists in slot 9, has its own dedicated IRQ on the Quadra 800 hardware. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 57 ++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 41 insertions(+), 16 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 0093872d89..7a8de089f4 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -101,6 +101,7 @@ struct GLUEState { M68kCPU *cpu; uint8_t ipr; uint8_t auxmode; + qemu_irq irqs[1]; }; =20 #define GLUE_IRQ_IN_VIA1 0 @@ -108,27 +109,40 @@ struct GLUEState { #define GLUE_IRQ_IN_SONIC 2 #define GLUE_IRQ_IN_ESCC 3 =20 +#define GLUE_IRQ_NUBUS_9 0 + static void GLUE_set_irq(void *opaque, int irq, int level) { GLUEState *s =3D opaque; int i; =20 - switch (irq) { - case GLUE_IRQ_IN_VIA1: - irq =3D 5; - break; - - case GLUE_IRQ_IN_VIA2: - irq =3D 1; - break; - - case GLUE_IRQ_IN_SONIC: - irq =3D 2; - break; - - case GLUE_IRQ_IN_ESCC: - irq =3D 3; - break; + if (s->auxmode) { + /* Classic mode */ + switch (irq) { + case GLUE_IRQ_IN_SONIC: + /* Route to VIA2 instead */ + qemu_set_irq(s->irqs[GLUE_IRQ_NUBUS_9], level); + return; + } + } else { + /* A/UX mode */ + switch (irq) { + case GLUE_IRQ_IN_VIA1: + irq =3D 5; + break; + + case GLUE_IRQ_IN_VIA2: + irq =3D 1; + break; + + case GLUE_IRQ_IN_SONIC: + irq =3D 2; + break; + + case GLUE_IRQ_IN_ESCC: + irq =3D 3; + break; + } } =20 if (level) { @@ -186,9 +200,12 @@ static Property glue_properties[] =3D { static void glue_init(Object *obj) { DeviceState *dev =3D DEVICE(obj); + GLUEState *s =3D GLUE(dev); =20 qdev_init_gpio_in(dev, GLUE_set_irq, 8); qdev_init_gpio_in_named(dev, glue_auxmode_set_irq, "auxmode", 1); + + qdev_init_gpio_out(dev, s->irqs, 1); } =20 static void glue_class_init(ObjectClass *klass, void *data) @@ -454,6 +471,14 @@ static void q800_init(MachineState *machine) VIA2_NUBUS_IRQ_9 + i)= ); } =20 + /* + * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unu= sed + * IRQ via GLUE for use by SONIC Ethernet in classic mode + */ + qdev_connect_gpio_out(glue, GLUE_IRQ_NUBUS_9, + qdev_get_gpio_in_named(via2_dev, "nubus-irq", + VIA2_NUBUS_IRQ_9)); + nubus =3D &NUBUS_BRIDGE(dev)->bus; =20 /* framebuffer in nubus slot #9 */ --=20 2.20.1 From nobody Mon May 6 10:55:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1634737789587170.79194616009852; Wed, 20 Oct 2021 06:49:49 -0700 (PDT) Received: from localhost ([::1]:54232 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdByV-0000MF-St for importer@patchew.org; Wed, 20 Oct 2021 09:49:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37788) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrS-0004XS-Rb for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:32 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:56442 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrN-0002op-O7 for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:30 -0400 Received: from [2a00:23c4:8b9d:f500:9396:df17:737c:b32c] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mdBr3-00011V-Qv; Wed, 20 Oct 2021 14:42:09 +0100 From: Mark Cave-Ayland To: laurent@vivier.eu, qemu-devel@nongnu.org Date: Wed, 20 Oct 2021 14:41:30 +0100 Message-Id: <20211020134131.4392-8-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> References: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9d:f500:9396:df17:737c:b32c X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 7/8] q800: wire up remaining IRQs in classic mode X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1634737794670100001 Content-Type: text/plain; charset="utf-8" Explicitly wire up the remaining IRQs in classic mode to enable the use of g_assert_not_reached() in the default case to detect any unexpected IRQs. Add a comment explaining the IRQ routing differences in A/UX mode based upon the comments in NetBSD (also noting that at least A/UX 3.0.1 still uses classic mode). Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/m68k/q800.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 7a8de089f4..83fde39298 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -111,6 +111,37 @@ struct GLUEState { =20 #define GLUE_IRQ_NUBUS_9 0 =20 +/* + * The GLUE logic on the Quadra 800 supports 2 different IRQ routing modes + * controlled from the VIA1 auxmode GPIO (port B bit 6) which are document= ed + * in NetBSD as follows: + * + * A/UX mode (Linux, NetBSD, auxmode GPIO low) + * + * Level 0: Spurious: ignored + * Level 1: Software + * Level 2: VIA2 (except ethernet, sound) + * Level 3: Ethernet + * Level 4: Serial (SCC) + * Level 5: Sound + * Level 6: VIA1 + * Level 7: NMIs: parity errors, RESET button, YANCC error + * + * Classic mode (default: used by MacOS, A/UX 3.0.1, auxmode GPIO high) + * + * Level 0: Spurious: ignored + * Level 1: VIA1 (clock, ADB) + * Level 2: VIA2 (NuBus, SCSI) + * Level 3: + * Level 4: Serial (SCC) + * Level 5: + * Level 6: + * Level 7: Non-maskable: parity errors, RESET button + * + * Note that despite references to A/UX mode in Linux and NetBSD, at least + * A/UX 3.0.1 still uses Classic mode. + */ + static void GLUE_set_irq(void *opaque, int irq, int level) { GLUEState *s =3D opaque; @@ -119,10 +150,25 @@ static void GLUE_set_irq(void *opaque, int irq, int l= evel) if (s->auxmode) { /* Classic mode */ switch (irq) { + case GLUE_IRQ_IN_VIA1: + irq =3D 0; + break; + + case GLUE_IRQ_IN_VIA2: + irq =3D 1; + break; + case GLUE_IRQ_IN_SONIC: /* Route to VIA2 instead */ qemu_set_irq(s->irqs[GLUE_IRQ_NUBUS_9], level); return; + + case GLUE_IRQ_IN_ESCC: + irq =3D 3; + break; + + default: + g_assert_not_reached(); } } else { /* A/UX mode */ @@ -142,6 +188,9 @@ static void GLUE_set_irq(void *opaque, int irq, int lev= el) case GLUE_IRQ_IN_ESCC: irq =3D 3; break; + + default: + g_assert_not_reached(); } } =20 --=20 2.20.1 From nobody Mon May 6 10:55:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1634737487494320.8039251165278; Wed, 20 Oct 2021 06:44:47 -0700 (PDT) Received: from localhost ([::1]:41138 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdBte-000835-B7 for importer@patchew.org; Wed, 20 Oct 2021 09:44:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37786) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrS-0004XR-ON for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:32 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:56446 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mdBrR-0002sF-3b for qemu-devel@nongnu.org; Wed, 20 Oct 2021 09:42:30 -0400 Received: from [2a00:23c4:8b9d:f500:9396:df17:737c:b32c] (helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mdBr7-00011V-NL; Wed, 20 Oct 2021 14:42:13 +0100 From: Mark Cave-Ayland To: laurent@vivier.eu, qemu-devel@nongnu.org Date: Wed, 20 Oct 2021 14:41:31 +0100 Message-Id: <20211020134131.4392-9-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> References: <20211020134131.4392-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a00:23c4:8b9d:f500:9396:df17:737c:b32c X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 8/8] q800: add NMI handler X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1634737489417100001 Content-Type: text/plain; charset="utf-8" This allows the programmer's switch to be triggered via the monitor for deb= ugging purposes. Since the CPU level 7 interrupt is level-triggered, use a timer t= o hold the NMI active for 100ms before releasing it again. Signed-off-by: Mark Cave-Ayland Reviewied-by: Laurent Vivier --- hw/m68k/q800.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 83fde39298..a081051a8d 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -28,6 +28,7 @@ #include "cpu.h" #include "hw/boards.h" #include "hw/or-irq.h" +#include "hw/nmi.h" #include "elf.h" #include "hw/loader.h" #include "ui/console.h" @@ -102,12 +103,14 @@ struct GLUEState { uint8_t ipr; uint8_t auxmode; qemu_irq irqs[1]; + QEMUTimer *nmi_release; }; =20 #define GLUE_IRQ_IN_VIA1 0 #define GLUE_IRQ_IN_VIA2 1 #define GLUE_IRQ_IN_SONIC 2 #define GLUE_IRQ_IN_ESCC 3 +#define GLUE_IRQ_IN_NMI 4 =20 #define GLUE_IRQ_NUBUS_9 0 =20 @@ -167,6 +170,10 @@ static void GLUE_set_irq(void *opaque, int irq, int le= vel) irq =3D 3; break; =20 + case GLUE_IRQ_IN_NMI: + irq =3D 6; + break; + default: g_assert_not_reached(); } @@ -189,6 +196,10 @@ static void GLUE_set_irq(void *opaque, int irq, int le= vel) irq =3D 3; break; =20 + case GLUE_IRQ_IN_NMI: + irq =3D 6; + break; + default: g_assert_not_reached(); } @@ -216,12 +227,30 @@ static void glue_auxmode_set_irq(void *opaque, int ir= q, int level) s->auxmode =3D level; } =20 +static void glue_nmi(NMIState *n, int cpu_index, Error **errp) +{ + GLUEState *s =3D GLUE(n); + + /* Hold NMI active for 100ms */ + GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 1); + timer_mod(s->nmi_release, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 100); +} + +static void glue_nmi_release(void *opaque) +{ + GLUEState *s =3D GLUE(opaque); + + GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 0); +} + static void glue_reset(DeviceState *dev) { GLUEState *s =3D GLUE(dev); =20 s->ipr =3D 0; s->auxmode =3D 0; + + timer_del(s->nmi_release); } =20 static const VMStateDescription vmstate_glue =3D { @@ -231,6 +260,7 @@ static const VMStateDescription vmstate_glue =3D { .fields =3D (VMStateField[]) { VMSTATE_UINT8(ipr, GLUEState), VMSTATE_UINT8(auxmode, GLUEState), + VMSTATE_TIMER_PTR(nmi_release, GLUEState), VMSTATE_END_OF_LIST(), }, }; @@ -246,6 +276,13 @@ static Property glue_properties[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 +static void glue_finalize(Object *obj) +{ + GLUEState *s =3D GLUE(obj); + + timer_free(s->nmi_release); +} + static void glue_init(Object *obj) { DeviceState *dev =3D DEVICE(obj); @@ -255,15 +292,20 @@ static void glue_init(Object *obj) qdev_init_gpio_in_named(dev, glue_auxmode_set_irq, "auxmode", 1); =20 qdev_init_gpio_out(dev, s->irqs, 1); + + /* NMI release timer */ + s->nmi_release =3D timer_new_ms(QEMU_CLOCK_VIRTUAL, glue_nmi_release, = s); } =20 static void glue_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); + NMIClass *nc =3D NMI_CLASS(klass); =20 dc->vmsd =3D &vmstate_glue; dc->reset =3D glue_reset; device_class_set_props(dc, glue_properties); + nc->nmi_monitor_handler =3D glue_nmi; } =20 static const TypeInfo glue_info =3D { @@ -271,7 +313,12 @@ static const TypeInfo glue_info =3D { .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(GLUEState), .instance_init =3D glue_init, + .instance_finalize =3D glue_finalize, .class_init =3D glue_class_init, + .interfaces =3D (InterfaceInfo[]) { + { TYPE_NMI }, + { } + }, }; =20 static void main_cpu_reset(void *opaque) --=20 2.20.1