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bh=LtgaWTNCxYusSVudl8YK3y8rrMGnzU3z6GSYqB4oUq0=; b=HaEIUYgb96K1jx/V9VH8Wd6Derk1D4f8aw2iRDy8lZqAkiDp9Vle9XPf8k0Ab+afvA6vHQ z0p5GkKBr8+LBrpKQpl/hUtV844dij70DDOmZp3/Gg6YWfwTkG8etwCHPvoh0/WAUE/cOA C3JAHRFF8dHs+EDdZZwzKcYE2lhYXBY= X-MC-Unique: FbrhdxwaO1K2IgtPfklLUg-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, imammedo@redhat.com, mst@redhat.com, philmd@redhat.com, peter.maydell@linaro.org, shannon.zhaosl@gmail.com, shameerali.kolothum.thodi@huawei.com, ardb@kernel.org, jean-philippe@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, drjones@redhat.com Subject: [PATCH v3 1/3] tests/acpi: Get prepared for IORT E.b revision upgrade Date: Thu, 14 Oct 2021 13:56:41 +0200 Message-Id: <20211014115643.756977-2-eric.auger@redhat.com> In-Reply-To: <20211014115643.756977-1-eric.auger@redhat.com> References: <20211014115643.756977-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=eric.auger@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.049, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gshan@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1634212714066100001 Content-Type: text/plain; charset="utf-8" Ignore IORT till reference blob for E.b spec revision gets added. Signed-off-by: Eric Auger Reviewed-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios= -tables-test-allowed-diff.h index dfb8523c8bf..9a5a923d6b8 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/IORT", --=20 2.26.3 From nobody Thu May 9 14:10:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1634212791; cv=none; d=zohomail.com; s=zohoarc; b=Ah7j2zcGoGpD2MaTtX2+/2u8mslEqesXvpfbu1KFjniBOnZLd3ENQiMOa4BY9jVPsCbuG8USTVJ6/U27Sy6tPeLfWdYSLCjdzToLa74aC2QF60DtnvJyper2bL8e1D7I1eEsC/2QwANrQFs0I4eSlm+C13Mh9hPZqmJO6FclMlo= ARC-Message-Signature: i=1; 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Thu, 14 Oct 2021 11:57:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1634212641; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VRtl7hsCOPdKbLBV8sxGp/OqYOvYsdKEPq56xWBsmTM=; b=f4HumreA5ryRcJ+hwgaSBQHe/hHWgIreghyGCOnGvfOIN63HwrkFmfeSKd77JGMb3hR9+f Ijl4NkvoQVCBLXvC17VuC5pBUeCFeRdvJrzSIwTrcGhEkrt19PYzFmM3ZzTTVemPa2bc+u VeCzmDXnro0ygJ8p+EFL5/4uFZ8S4lQ= X-MC-Unique: XYESvK9pM7OQ1vbaQ0AKUg-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, imammedo@redhat.com, mst@redhat.com, philmd@redhat.com, peter.maydell@linaro.org, shannon.zhaosl@gmail.com, shameerali.kolothum.thodi@huawei.com, ardb@kernel.org, jean-philippe@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, drjones@redhat.com Subject: [PATCH v3 2/3] hw/arm/virt-acpi-build: IORT upgrade up to revision E.b Date: Thu, 14 Oct 2021 13:56:42 +0200 Message-Id: <20211014115643.756977-3-eric.auger@redhat.com> In-Reply-To: <20211014115643.756977-1-eric.auger@redhat.com> References: <20211014115643.756977-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 Authentication-Results: relay.mimecast.com; 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charset="utf-8" Upgrade the IORT table from B to E.b specification revision (ARM DEN 0049E.b). The SMMUv3 and root complex node have additional fields. Also unique IORT node identifiers are introduced: they are generated in sequential order. They are not cross-referenced though. Signed-off-by: Eric Auger Reviewed-by: Jean-Philippe Brucker Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin --- v2 -> v3: - added Jean and Igor's R-b - added comment about node IDs in the commit msg (Igor) --- hw/arm/virt-acpi-build.c | 48 ++++++++++++++++++++++++---------------- 1 file changed, 29 insertions(+), 19 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index dd17a48c00e..d3bb4cba3ed 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -241,19 +241,20 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachine= State *vms) #endif =20 #define ID_MAPPING_ENTRY_SIZE 20 -#define SMMU_V3_ENTRY_SIZE 60 -#define ROOT_COMPLEX_ENTRY_SIZE 32 +#define SMMU_V3_ENTRY_SIZE 68 +#define ROOT_COMPLEX_ENTRY_SIZE 36 #define IORT_NODE_OFFSET 48 =20 static void build_iort_id_mapping(GArray *table_data, uint32_t input_base, uint32_t id_count, uint32_t out_ref) { - /* Identity RID mapping covering the whole input RID range */ + /* Table 4 ID mapping format */ build_append_int_noprefix(table_data, input_base, 4); /* Input base */ build_append_int_noprefix(table_data, id_count, 4); /* Number of IDs */ build_append_int_noprefix(table_data, input_base, 4); /* Output base */ build_append_int_noprefix(table_data, out_ref, 4); /* Output Reference= */ - build_append_int_noprefix(table_data, 0, 4); /* Flags */ + /* Flags */ + build_append_int_noprefix(table_data, 0 /* Single mapping (disabled) *= /, 4); } =20 struct AcpiIortIdMapping { @@ -298,7 +299,7 @@ static int iort_idmap_compare(gconstpointer a, gconstpo= inter b) /* * Input Output Remapping Table (IORT) * Conforms to "IO Remapping Table System Software on ARM Platforms", - * Document number: ARM DEN 0049B, October 2015 + * Document number: ARM DEN 0049E.b, Feb 2021 */ static void build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) @@ -307,10 +308,11 @@ build_iort(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) const uint32_t iort_node_offset =3D IORT_NODE_OFFSET; size_t node_size, smmu_offset =3D 0; AcpiIortIdMapping *idmap; + uint32_t id =3D 0; GArray *smmu_idmaps =3D g_array_new(false, true, sizeof(AcpiIortIdMapp= ing)); GArray *its_idmaps =3D g_array_new(false, true, sizeof(AcpiIortIdMappi= ng)); =20 - AcpiTable table =3D { .sig =3D "IORT", .rev =3D 0, .oem_id =3D vms->oe= m_id, + AcpiTable table =3D { .sig =3D "IORT", .rev =3D 3, .oem_id =3D vms->oe= m_id, .oem_table_id =3D vms->oem_table_id }; /* Table 2 The IORT */ acpi_table_begin(&table, table_data); @@ -358,12 +360,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) build_append_int_noprefix(table_data, IORT_NODE_OFFSET, 4); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ =20 - /* 3.1.1.3 ITS group node */ + /* Table 12 ITS Group Format */ build_append_int_noprefix(table_data, 0 /* ITS Group */, 1); /* Type */ node_size =3D 20 /* fixed header size */ + 4 /* 1 GIC ITS Identifier = */; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 1, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ build_append_int_noprefix(table_data, 0, 4); /* Number of ID mappings = */ build_append_int_noprefix(table_data, 0, 4); /* Reference to ID Array = */ build_append_int_noprefix(table_data, 1, 4); /* Number of ITSs */ @@ -374,19 +376,19 @@ build_iort(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) int irq =3D vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE; =20 smmu_offset =3D table_data->len - table.table_offset; - /* 3.1.1.2 SMMUv3 */ + /* Table 9 SMMUv3 Format */ build_append_int_noprefix(table_data, 4 /* SMMUv3 */, 1); /* Type = */ node_size =3D SMMU_V3_ENTRY_SIZE + ID_MAPPING_ENTRY_SIZE; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 4, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ build_append_int_noprefix(table_data, 1, 4); /* Number of ID mappi= ngs */ /* Reference to ID Array */ build_append_int_noprefix(table_data, SMMU_V3_ENTRY_SIZE, 4); /* Base address */ build_append_int_noprefix(table_data, vms->memmap[VIRT_SMMU].base,= 8); /* Flags */ - build_append_int_noprefix(table_data, 1 /* COHACC OverrideNote */,= 4); + build_append_int_noprefix(table_data, 1 /* COHACC Override */, 4); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ build_append_int_noprefix(table_data, 0, 8); /* VATOS address */ /* Model */ @@ -395,35 +397,43 @@ build_iort(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) build_append_int_noprefix(table_data, irq + 1, 4); /* PRI */ build_append_int_noprefix(table_data, irq + 3, 4); /* GERR */ build_append_int_noprefix(table_data, irq + 2, 4); /* Sync */ + build_append_int_noprefix(table_data, 0, 4); /* Proximity domain */ + /* DeviceID mapping index (ignored since interrupts are GSIV based= ) */ + build_append_int_noprefix(table_data, 0, 4); =20 /* output IORT node is the ITS group node (the first node) */ build_iort_id_mapping(table_data, 0, 0xFFFF, IORT_NODE_OFFSET); } =20 - /* Table 16 Root Complex Node */ + /* Table 17 Root Complex Node */ build_append_int_noprefix(table_data, 2 /* Root complex */, 1); /* Typ= e */ node_size =3D ROOT_COMPLEX_ENTRY_SIZE + ID_MAPPING_ENTRY_SIZE * rc_mapping_count; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 3, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ /* Number of ID mappings */ build_append_int_noprefix(table_data, rc_mapping_count, 4); /* Reference to ID Array */ build_append_int_noprefix(table_data, ROOT_COMPLEX_ENTRY_SIZE, 4); =20 - /* Table 13 Memory access properties */ + /* Table 14 Memory access properties */ /* CCA: Cache Coherent Attribute */ build_append_int_noprefix(table_data, 1 /* fully coherent */, 4); build_append_int_noprefix(table_data, 0, 1); /* AH: Note Allocation Hi= nts */ build_append_int_noprefix(table_data, 0, 2); /* Reserved */ - /* MAF: Note Memory Access Flags */ - build_append_int_noprefix(table_data, 0x3 /* CCA =3D CPM =3D DCAS =3D = 1 */, 1); + /* Table 15 Memory Access Flags */ + build_append_int_noprefix(table_data, 0x3 /* CCA =3D CPM =3D DACS =3D = 1 */, 1); =20 build_append_int_noprefix(table_data, 0, 4); /* ATS Attribute */ /* MCFG pci_segment */ build_append_int_noprefix(table_data, 0, 4); /* PCI Segment number */ =20 + /* Memory address size limit */ + build_append_int_noprefix(table_data, 64, 1); + + build_append_int_noprefix(table_data, 0, 3); /* Reserved */ + /* Output Reference */ if (vms->iommu =3D=3D VIRT_IOMMU_SMMUV3) { AcpiIortIdMapping *range; --=20 2.26.3 From nobody Thu May 9 14:10:12 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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charset="utf-8" Re-generate reference blobs with rebuild-expected-aml.sh. Differences reported by "make check V=3D1" are listed below (IORT.numamem). Differences for other variants are similar. /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20180629 (64-bit version) * Copyright (c) 2000 - 2018 Intel Corporation * - * Disassembly of tests/data/acpi/virt/IORT.numamem, Thu Oct 14 06:13:19 2= 021 + * Disassembly of /tmp/aml-K8L9A1, Thu Oct 14 06:13:19 2021 * * ACPI Data Table [IORT] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "IORT" [IO Remapping Tab= le] -[004h 0004 4] Table Length : 0000007C -[008h 0008 1] Revision : 00 -[009h 0009 1] Checksum : 07 +[004h 0004 4] Table Length : 00000080 +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : B3 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] Node Count : 00000002 [028h 0040 4] Node Offset : 00000030 [02Ch 0044 4] Reserved : 00000000 [030h 0048 1] Type : 00 [031h 0049 2] Length : 0018 -[033h 0051 1] Revision : 00 +[033h 0051 1] Revision : 01 [034h 0052 4] Reserved : 00000000 [038h 0056 4] Mapping Count : 00000000 [03Ch 0060 4] Mapping Offset : 00000000 [040h 0064 4] ItsCount : 00000001 [044h 0068 4] Identifiers : 00000000 [048h 0072 1] Type : 02 -[049h 0073 2] Length : 0034 -[04Bh 0075 1] Revision : 00 -[04Ch 0076 4] Reserved : 00000000 +[049h 0073 2] Length : 0038 +[04Bh 0075 1] Revision : 03 +[04Ch 0076 4] Reserved : 00000001 [050h 0080 4] Mapping Count : 00000001 -[054h 0084 4] Mapping Offset : 00000020 +[054h 0084 4] Mapping Offset : 00000024 [058h 0088 8] Memory Properties : [IORT Memory Access Propert= ies] [058h 0088 4] Cache Coherency : 00000001 [05Ch 0092 1] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 [05Dh 0093 2] Reserved : 0000 [05Fh 0095 1] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 [060h 0096 4] ATS Attribute : 00000000 [064h 0100 4] PCI Segment Number : 00000000 -[068h 0104 1] Memory Size Limit : 00 +[068h 0104 1] Memory Size Limit : 40 [069h 0105 3] Reserved : 000000 -[068h 0104 4] Input base : 00000000 -[06Ch 0108 4] ID Count : 0000FFFF -[070h 0112 4] Output Base : 00000000 -[074h 0116 4] Output Reference : 00000030 -[078h 0120 4] Flags (decoded below) : 00000000 +[06Ch 0108 4] Input base : 00000000 +[070h 0112 4] ID Count : 0000FFFF +[074h 0116 4] Output Base : 00000000 +[078h 0120 4] Output Reference : 00000030 +[07Ch 0124 4] Flags (decoded below) : 00000000 Single Mapping : 0 -Raw Table Data: Length 124 (0x7C) +Raw Table Data: Length 128 (0x80) - 0000: 49 4F 52 54 7C 00 00 00 00 07 42 4F 43 48 53 20 // IORT|.....BO= CHS + 0000: 49 4F 52 54 80 00 00 00 03 B3 42 4F 43 48 53 20 // IORT......BO= CHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....= BXPC 0020: 01 00 00 00 02 00 00 00 30 00 00 00 00 00 00 00 // ........0...= .... - 0030: 00 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ............= .... - 0040: 01 00 00 00 00 00 00 00 02 34 00 00 00 00 00 00 // .........4..= .... - 0050: 01 00 00 00 20 00 00 00 01 00 00 00 00 00 00 03 // .... .......= .... - 0060: 00 00 00 00 00 00 00 00 00 00 00 00 FF FF 00 00 // ............= .... - 0070: 00 00 00 00 30 00 00 00 00 00 00 00 // ....0....... + 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ............= .... + 0040: 01 00 00 00 00 00 00 00 02 38 00 03 01 00 00 00 // .........8..= .... + 0050: 01 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$.......= .... + 0060: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@...= .... + 0070: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0...= .... ** Signed-off-by: Eric Auger Reviewed-by: Michael S. Tsirkin --- v2 -> v3: - add diff (Igor) --- tests/data/acpi/virt/IORT | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.memhp | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.numamem | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.pxb | Bin 124 -> 128 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 5 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/IORT b/tests/data/acpi/virt/IORT index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f68= 8ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=3De`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=3Dp0RR91 diff --git a/tests/data/acpi/virt/IORT.memhp b/tests/data/acpi/virt/IORT.me= mhp index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f68= 8ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=3De`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=3Dp0RR91 diff --git a/tests/data/acpi/virt/IORT.numamem b/tests/data/acpi/virt/IORT.= numamem index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f68= 8ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=3De`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=3Dp0RR91 diff --git a/tests/data/acpi/virt/IORT.pxb b/tests/data/acpi/virt/IORT.pxb index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f68= 8ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=3De`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=3Dp0RR91 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios= -tables-test-allowed-diff.h index 9a5a923d6b8..dfb8523c8bf 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/IORT", --=20 2.26.3