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[83.35.24.118]) by smtp.gmail.com with ESMTPSA id i2sm8381097wrq.78.2021.10.02.05.54.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Oct 2021 05:54:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1633179265; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ORMXV0Tst1vudHF4i8O0+oN0mxRTrnSBxDsiV4I1LIw=; b=ZQS9BEOWDrzD4wnK0mRGC2oXIjppS0dWDgwuaBR8KAXaDv7i+Oe5y4BfF8TDmwt95AhSZV G7KtVtAkQEAM+lP98jR2Fo9BJs3r/x2zIrbs5dDwoDHZTI5jzapRdufpq3HzperGtNMpTf 3dYDquVDiCehlwTzB/P8xkCBCSdcVe4= X-MC-Unique: Qmjesy6VN2eV_fWf3Pp8_A-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ORMXV0Tst1vudHF4i8O0+oN0mxRTrnSBxDsiV4I1LIw=; b=2UqED/+zYrtSshyZH0/QNjlvAJY4BL6mNXqcI45aLWtzy4Gcx+pGJUkdc5rlWJ5vIi FWs9Ruo49nylnHvfRZpbP5WHQk3Pgy8TE/SukfX8DB0O0dJxw5nZbuGUgt1Qs9evc2yV BQWC3ey7jT5pefD48oypEENyh/5JEtrVhyXRRe0T0vpv2XsDk9NZsw1HiQrTFRbPNHI/ hRV/HAWWrvcac1znKHbjxaFrWysTaYbl9cgiW/LTi8h5Nry98kfweU4E95AyrxW1kSoJ 87Um3qhgQ0E8j+RdzN90abj4oh6/TkdakcS7aDzWah0esM8wM3IBKF44gEG2z+9DR4Ma ixqw== X-Gm-Message-State: AOAM531ETlQ5SBwCaIYaKyOCVRjdjIF0kS/qNobQURCGVdXCgNYqVkJ+ VdlinnbPPhFQda2iMJaxRpKlEZumR9BNnLZsAATob/NpCLlVWz9beRImbArc2FXeGnclP0Hu6rl ml86S7jG18G1udA== X-Received: by 2002:adf:a18d:: with SMTP id u13mr3368087wru.275.1633179258172; Sat, 02 Oct 2021 05:54:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzuWjXvREy5i/oGIVOiC0tBm2gnRbqZb/64Psa7EoqmzOxcl6FWYaAG1lUh/i/7mWLZCmUUqw== X-Received: by 2002:adf:a18d:: with SMTP id u13mr3368069wru.275.1633179258011; Sat, 02 Oct 2021 05:54:18 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , "Dr . David Alan Gilbert" , Dov Murik , Sergio Lopez , kvm@vger.kernel.org, James Bottomley , Eduardo Habkost , Paolo Bonzini , Brijesh Singh , "Daniel P . Berrange" Subject: [PATCH v3 13/22] target/i386/sev: Remove stubs by using code elision Date: Sat, 2 Oct 2021 14:53:08 +0200 Message-Id: <20211002125317.3418648-14-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211002125317.3418648-1-philmd@redhat.com> References: <20211002125317.3418648-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1633179268590100001 Only declare sev_enabled() and sev_es_enabled() when CONFIG_SEV is set, to allow the compiler to elide unused code. Remove unnecessary stubs. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/sysemu/sev.h | 14 +++++++++++++- target/i386/sev_i386.h | 3 --- target/i386/cpu.c | 16 +++++++++------- target/i386/sev-stub.c | 36 ------------------------------------ target/i386/meson.build | 2 +- 5 files changed, 23 insertions(+), 48 deletions(-) delete mode 100644 target/i386/sev-stub.c diff --git a/include/sysemu/sev.h b/include/sysemu/sev.h index a329ed75c1c..f5c625bb3b3 100644 --- a/include/sysemu/sev.h +++ b/include/sysemu/sev.h @@ -14,9 +14,21 @@ #ifndef QEMU_SEV_H #define QEMU_SEV_H =20 -#include "sysemu/kvm.h" +#ifndef CONFIG_USER_ONLY +#include CONFIG_DEVICES /* CONFIG_SEV */ +#endif =20 +#ifdef CONFIG_SEV bool sev_enabled(void); +bool sev_es_enabled(void); +#else +#define sev_enabled() 0 +#define sev_es_enabled() 0 +#endif + +uint32_t sev_get_cbit_position(void); +uint32_t sev_get_reduced_phys_bits(void); + int sev_kvm_init(ConfidentialGuestSupport *cgs, Error **errp); =20 #endif diff --git a/target/i386/sev_i386.h b/target/i386/sev_i386.h index 0798ab3519a..2d9a1a0112e 100644 --- a/target/i386/sev_i386.h +++ b/target/i386/sev_i386.h @@ -24,10 +24,7 @@ #define SEV_POLICY_DOMAIN 0x10 #define SEV_POLICY_SEV 0x20 =20 -extern bool sev_es_enabled(void); extern SevInfo *sev_get_info(void); -extern uint32_t sev_get_cbit_position(void); -extern uint32_t sev_get_reduced_phys_bits(void); extern char *sev_get_launch_measurement(void); extern SevCapability *sev_get_capabilities(Error **errp); extern SevAttestationReport * diff --git a/target/i386/cpu.c b/target/i386/cpu.c index e169a01713d..27992bdc9f8 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -25,8 +25,8 @@ #include "tcg/helper-tcg.h" #include "sysemu/reset.h" #include "sysemu/hvf.h" +#include "sysemu/sev.h" #include "kvm/kvm_i386.h" -#include "sev_i386.h" #include "qapi/error.h" #include "qapi/qapi-visit-machine.h" #include "qapi/qmp/qerror.h" @@ -38,6 +38,7 @@ #include "exec/address-spaces.h" #include "hw/boards.h" #include "hw/i386/sgx-epc.h" +#include "sev_i386.h" #endif =20 #include "disas/capstone.h" @@ -5764,12 +5765,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index= , uint32_t count, *edx =3D 0; break; case 0x8000001F: - *eax =3D sev_enabled() ? 0x2 : 0; - *eax |=3D sev_es_enabled() ? 0x8 : 0; - *ebx =3D sev_get_cbit_position(); - *ebx |=3D sev_get_reduced_phys_bits() << 6; - *ecx =3D 0; - *edx =3D 0; + *eax =3D *ebx =3D *ecx =3D *edx =3D 0; + if (sev_enabled()) { + *eax =3D 0x2; + *eax |=3D sev_es_enabled() ? 0x8 : 0; + *ebx =3D sev_get_cbit_position(); + *ebx |=3D sev_get_reduced_phys_bits() << 6; + } break; default: /* reserved values: zero */ diff --git a/target/i386/sev-stub.c b/target/i386/sev-stub.c deleted file mode 100644 index 8eae5d2fa8d..00000000000 --- a/target/i386/sev-stub.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * QEMU SEV stub - * - * Copyright Advanced Micro Devices 2018 - * - * Authors: - * Brijesh Singh - * - * This work is licensed under the terms of the GNU GPL, version 2 or late= r. - * See the COPYING file in the top-level directory. - * - */ - -#include "qemu/osdep.h" -#include "qapi/error.h" -#include "sev_i386.h" - -bool sev_enabled(void) -{ - return false; -} - -uint32_t sev_get_cbit_position(void) -{ - return 0; -} - -uint32_t sev_get_reduced_phys_bits(void) -{ - return 0; -} - -bool sev_es_enabled(void) -{ - return false; -} diff --git a/target/i386/meson.build b/target/i386/meson.build index a4f45c3ec1d..ae38dc95635 100644 --- a/target/i386/meson.build +++ b/target/i386/meson.build @@ -6,7 +6,7 @@ 'xsave_helper.c', 'cpu-dump.c', )) -i386_ss.add(when: 'CONFIG_SEV', if_true: files('host-cpu.c'), if_false: fi= les('sev-stub.c')) +i386_ss.add(when: 'CONFIG_SEV', if_true: files('host-cpu.c')) =20 # x86 cpu type i386_ss.add(when: 'CONFIG_KVM', if_true: files('host-cpu.c')) --=20 2.31.1