From nobody Mon Feb 9 17:59:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1632983684390810.7929443765163; Wed, 29 Sep 2021 23:34:44 -0700 (PDT) Received: from localhost ([::1]:34246 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mVpeV-0004C1-8m for importer@patchew.org; Thu, 30 Sep 2021 02:34:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47622) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mVoss-00021o-PU; Thu, 30 Sep 2021 01:45:32 -0400 Received: from gandalf.ozlabs.org ([2404:9400:2:0:216:3eff:fee2:21ea]:40713) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mVosg-000400-Ec; Thu, 30 Sep 2021 01:45:29 -0400 Received: by gandalf.ozlabs.org (Postfix, from userid 1007) id 4HKhyR3ksDz4xc5; Thu, 30 Sep 2021 15:44:31 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gibson.dropbear.id.au; s=201602; t=1632980671; bh=tEV66u/ER4tbPfc0Fs+aJ16ZrVhBFtkocO5b7T2c9Qg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c5wklyMePusL8KHALEpdlJF+wKDuD5SurcthgP0iCIrvCFSS1DkMDvGmXcjWAsiSn Ws+jWIvmg4M3y7mQtnRJGKX+FfUDezBRtnzW7CivMcSSB4mnOimkARykl6lQ4N1wxs Vr/QrD98hH+YL2s6s08vdMt6enIKUo+dDeGRHvxM= From: David Gibson To: peter.maydell@linaro.org Subject: [PULL 34/44] hw/intc: openpic: Correct the reset value of IPIDR for FSL chipset Date: Thu, 30 Sep 2021 15:44:16 +1000 Message-Id: <20210930054426.357344-35-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210930054426.357344-1-david@gibson.dropbear.id.au> References: <20210930054426.357344-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2404:9400:2:0:216:3eff:fee2:21ea; envelope-from=dgibson@gandalf.ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng , Bin Meng , mark.cave-ayland@ilande.co.uk, qemu-devel@nongnu.org, groug@kaod.org, hpoussin@reactos.org, clg@kaod.org, qemu-ppc@nongnu.org, philmd@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1632983685274100001 Content-Type: text/plain; charset="utf-8" From: Bin Meng The reset value of IPIDR should be zero for Freescale chipset, per the following 2 manuals I checked: - P2020RM (https://www.nxp.com/webapp/Download?colCode=3DP2020RM) - P4080RM (https://www.nxp.com/webapp/Download?colCode=3DP4080RM) Currently it is set to 1, which leaves the IPI enabled on core 0 after power-on reset. Such may cause unexpected interrupt to be delivered to core 0 if the IPI is triggered from core 0 to other cores later. Fixes: ffd5e9fe0276 ("openpic: Reset IRQ source private members") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/584 Signed-off-by: Bin Meng Message-Id: <20210918032653.646370-1-bin.meng@windriver.com> Signed-off-by: David Gibson --- hw/intc/openpic.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c index 9b4c17854d..2790c6710a 100644 --- a/hw/intc/openpic.c +++ b/hw/intc/openpic.c @@ -1276,6 +1276,15 @@ static void openpic_reset(DeviceState *d) break; } =20 + /* Mask all IPI interrupts for Freescale OpenPIC */ + if ((opp->model =3D=3D OPENPIC_MODEL_FSL_MPIC_20) || + (opp->model =3D=3D OPENPIC_MODEL_FSL_MPIC_42)) { + if (i >=3D opp->irq_ipi0 && i < opp->irq_tim0) { + write_IRQreg_idr(opp, i, 0); + continue; + } + } + write_IRQreg_idr(opp, i, opp->idr_reset); } /* Initialise IRQ destinations */ --=20 2.31.1