From nobody Mon Feb 9 07:26:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=collabora.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1632906000566993.4831203547144; Wed, 29 Sep 2021 02:00:00 -0700 (PDT) Received: from localhost ([::1]:38858 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mVVRX-0007bE-GO for importer@patchew.org; Wed, 29 Sep 2021 04:59:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38264) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mVVPm-0005Xy-4A for qemu-devel@nongnu.org; Wed, 29 Sep 2021 04:58:10 -0400 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]:55760) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mVVPg-0005CZ-Mt for qemu-devel@nongnu.org; Wed, 29 Sep 2021 04:58:09 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: fahien) with ESMTPSA id 46E021F44066 From: Antonio Caggiano To: qemu-devel@nongnu.org Subject: [RFC v2 1/2] virtio-gpu: hostmem Date: Wed, 29 Sep 2021 10:57:49 +0200 Message-Id: <20210929085750.114507-2-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210929085750.114507-1-antonio.caggiano@collabora.com> References: <20210929085750.114507-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e3e3; envelope-from=antonio.caggiano@collabora.com; helo=bhuna.collabora.co.uk X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1632906001247100004 Content-Type: text/plain; charset="utf-8" From: Gerd Hoffmann Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. Signed-off-by: Antonio Caggiano --- hw/display/virtio-gpu-pci.c | 14 ++++++++++++++ hw/display/virtio-gpu.c | 1 + hw/display/virtio-vga.c | 32 +++++++++++++++++++++++--------- include/hw/virtio/virtio-gpu.h | 5 +++++ 4 files changed, 43 insertions(+), 9 deletions(-) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index e36eee0c40..a79bd751b2 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *= vpci_dev, Error **errp) DeviceState *vdev =3D DEVICE(g); int i; =20 + if (virtio_gpu_hostmem_enabled(g->conf)) { + vpci_dev->msix_bar_idx =3D 1; + vpci_dev->modern_mem_bar_idx =3D 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU= _SHM_ID_HOST_VISIBLE); + } + + qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp); virtio_pci_force_virtio_1(vpci_dev); if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { return; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 182e0868b0..63eff0e697 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1418,6 +1418,7 @@ static Property virtio_gpu_properties[] =3D { 256 * MiB), DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 9e57f61e9e..ca841a0799 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -125,16 +125,30 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *v= pci_dev, Error **errp) pci_register_bar(&vpci_dev->pci_dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); =20 - /* - * Configure virtio bar and regions - * - * We use bar #2 for the mmio regions, to be compatible with stdvga. - * virtio regions are moved to the end of bar #2, to make room for - * the stdvga mmio registers at the start of bar #2. - */ - vpci_dev->modern_mem_bar_idx =3D 2; - vpci_dev->msix_bar_idx =3D 4; vpci_dev->modern_io_bar_idx =3D 5; + =20 + if (!virtio_gpu_hostmem_enabled(g->conf)) { + /* + * Configure virtio bar and regions + * + * We use bar #2 for the mmio regions, to be compatible with stdvga. + * virtio regions are moved to the end of bar #2, to make room for + * the stdvga mmio registers at the start of bar #2. + */ + vpci_dev->modern_mem_bar_idx =3D 2; + vpci_dev->msix_bar_idx =3D 4; + } else { + vpci_dev->msix_bar_idx =3D 1; + vpci_dev->modern_mem_bar_idx =3D 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU= _SHM_ID_HOST_VISIBLE); + } =20 if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { /* diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 24c6628944..835ebcb1a0 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) #define virtio_gpu_blob_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) +#define virtio_gpu_hostmem_enabled(_cfg) \ + (_cfg.hostmem > 0) =20 struct virtio_gpu_base_conf { uint32_t max_outputs; uint32_t flags; uint32_t xres; uint32_t yres; + uint64_t hostmem; }; =20 struct virtio_gpu_ctrl_command { @@ -131,6 +134,8 @@ struct VirtIOGPUBase { int renderer_blocked; int enable; =20 + MemoryRegion hostmem; + struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; =20 int enabled_output_bitmask; --=20 2.30.2 From nobody Mon Feb 9 07:26:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=collabora.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 163290599769828.73233571033859; Wed, 29 Sep 2021 01:59:57 -0700 (PDT) Received: from localhost ([::1]:38680 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mVVRU-0007UL-3s for importer@patchew.org; Wed, 29 Sep 2021 04:59:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38254) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mVVPj-0005XP-HH for qemu-devel@nongnu.org; Wed, 29 Sep 2021 04:58:07 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:47898) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mVVPg-0005Cf-Lt for qemu-devel@nongnu.org; Wed, 29 Sep 2021 04:58:07 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: fahien) with ESMTPSA id A14251F44067 From: Antonio Caggiano To: qemu-devel@nongnu.org Subject: [RFC v2 2/2] virtio: Add shared memory capability Date: Wed, 29 Sep 2021 10:57:50 +0200 Message-Id: <20210929085750.114507-3-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210929085750.114507-1-antonio.caggiano@collabora.com> References: <20210929085750.114507-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=46.235.227.227; envelope-from=antonio.caggiano@collabora.com; helo=bhuna.collabora.co.uk X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Dr. David Alan Gilbert" , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1632905999219100001 Content-Type: text/plain; charset="utf-8" From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' and the data structure 'virtio_pci_shm_cap' to go with it. They allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. v2: Remove virtio_pci_shm_cap as virtio_pci_cap64 is used instead. Signed-off-by: Dr. David Alan Gilbert (cherry picked from commit a5d628a3a3c5e60b98b15ffff197c36a77056115) Signed-off-by: Antonio Caggiano --- hw/virtio/virtio-pci.c | 19 +++++++++++++++++++ hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 23 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 6e16e2705c..200f1e38ef 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1162,6 +1162,25 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *pr= oxy, return offset; } =20 +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap =3D { + .cap.cap_len =3D sizeof cap, + .cap.cfg_type =3D VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + uint32_t mask32 =3D ~0; + + cap.cap.bar =3D bar; + cap.cap.length =3D cpu_to_le32(length & mask32); + cap.length_hi =3D cpu_to_le32((length >> 32) & mask32); + cap.cap.offset =3D cpu_to_le32(offset & mask32); + cap.offset_hi =3D cpu_to_le32((offset >> 32) & mask32); + cap.cap.id =3D id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 2446dcd9ae..5e5c4a4c6d 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -252,4 +252,8 @@ void virtio_pci_types_register(const VirtioPCIDeviceTyp= eInfo *t); */ unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues); =20 +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id); + #endif --=20 2.30.2