From nobody Thu Dec 18 04:14:29 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1632257367043571.7153538109795; Tue, 21 Sep 2021 13:49:27 -0700 (PDT) Received: from localhost ([::1]:55650 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mSmhh-00018A-QA for importer@patchew.org; Tue, 21 Sep 2021 16:49:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45468) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mSmF9-0004h6-Rf for qemu-devel@nongnu.org; Tue, 21 Sep 2021 16:19:55 -0400 Received: from [115.28.160.31] (port=56016 helo=mailbox.box.xen0n.name) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mSmF6-0000X2-Th for qemu-devel@nongnu.org; Tue, 21 Sep 2021 16:19:55 -0400 Received: from ld50.lan (unknown [101.88.29.172]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id E99DA63402; Wed, 22 Sep 2021 04:19:27 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=xen0n.name; s=mail; t=1632255568; bh=+uc277oS3kxy11bqHFo5gEFFTvp+tPnsoUxtZ3jM564=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Jpsl0DIO+2LbNFbtXVBm1Fm6pCUaCPztxhv3hzy8xBSagvhmvQt2/gTWiTcEruDgM MZAsdqob3VkHKUmWk3jWP6MXdSbgNyXg4TDeEWFWDU+k9GjgRl6COpYOHHP8LkIlpa d7DlTW07i7r1MurwEy+QR1zA32fsRgT4jQzSuoyM= From: WANG Xuerui To: qemu-devel@nongnu.org Subject: [PATCH v2 17/30] tcg/loongarch64: Implement add/sub ops Date: Wed, 22 Sep 2021 04:19:02 +0800 Message-Id: <20210921201915.601245-18-git@xen0n.name> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210921201915.601245-1-git@xen0n.name> References: <20210921201915.601245-1-git@xen0n.name> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 115.28.160.31 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=115.28.160.31; envelope-from=git@xen0n.name; helo=mailbox.box.xen0n.name X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: WANG Xuerui Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1632257367773100001 Content-Type: text/plain; charset="utf-8" The neg_i{32,64} ops is fully expressible with sub, so omitted for simplicity. Signed-off-by: WANG Xuerui Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 ++ tcg/loongarch64/tcg-target.c.inc | 38 ++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-tar= get-con-set.h index 42f8e28741..4b8ce85897 100644 --- a/tcg/loongarch64/tcg-target-con-set.h +++ b/tcg/loongarch64/tcg-target-con-set.h @@ -18,6 +18,8 @@ C_O0_I1(r) C_O1_I1(r, r) C_O1_I2(r, r, rC) C_O1_I2(r, r, ri) +C_O1_I2(r, r, rI) C_O1_I2(r, r, rU) C_O1_I2(r, r, rW) C_O1_I2(r, 0, rZ) +C_O1_I2(r, rZ, rN) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.= c.inc index f06c61ee2b..e1b333120d 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -640,6 +640,36 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, } break; =20 + case INDEX_op_add_i32: + if (c2) { + tcg_out_opc_addi_w(s, a0, a1, a2); + } else { + tcg_out_opc_add_w(s, a0, a1, a2); + } + break; + case INDEX_op_add_i64: + if (c2) { + tcg_out_opc_addi_d(s, a0, a1, a2); + } else { + tcg_out_opc_add_d(s, a0, a1, a2); + } + break; + + case INDEX_op_sub_i32: + if (c2) { + tcg_out_opc_addi_w(s, a0, a1, -a2); + } else { + tcg_out_opc_sub_w(s, a0, a1, a2); + } + break; + case INDEX_op_sub_i64: + if (c2) { + tcg_out_opc_addi_d(s, a0, a1, -a2); + } else { + tcg_out_opc_sub_d(s, a0, a1, a2); + } + break; + case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_mov_i64: default: @@ -701,6 +731,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpco= de op) case INDEX_op_rotr_i64: return C_O1_I2(r, r, ri); =20 + case INDEX_op_add_i32: + case INDEX_op_add_i64: + return C_O1_I2(r, r, rI); + case INDEX_op_and_i32: case INDEX_op_and_i64: case INDEX_op_nor_i32: @@ -723,6 +757,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpco= de op) /* Must deposit into the same register as input */ return C_O1_I2(r, 0, rZ); =20 + case INDEX_op_sub_i32: + case INDEX_op_sub_i64: + return C_O1_I2(r, rZ, rN); + default: g_assert_not_reached(); } --=20 2.33.0