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[83.35.24.118]) by smtp.gmail.com with ESMTPSA id g143sm705924wme.16.2021.09.20.14.45.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Sep 2021 14:45:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TUgRmwD7tXnbjAggXKtnmXyY+RsIf+0q/OJybdA363I=; b=bP9nQ7BoyCGod1BhG3z8QZjF/kVFqwUEfoZ7mDAOk+OudBxaZ+fOGTHUuyl0in/mIw iRqpPiEhME4Q9diVh4WgxKmzEOClBH7PjsGUgzBHK4K0PLCJNbnJDn5Kt+eZwwzEj5+A FDZ8kZJer87URFV5zW7EPRCLnW4cexqt01vKe4rkpuaVF+aFFqCsaXuo2SgBxDmrFTo7 xftvGEYol89+cCXKrls/rGJr7AOu4Wa8QIHU5iF8ZZjZJpbBjVom1oGfWvYrxRgJa1/k ycL+MFvwF7CB4JX/blwrL58wXkCF4oXDB41m/9CUY7lzzTop7KBKZeWASwea9L/6HV8/ Oldw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=TUgRmwD7tXnbjAggXKtnmXyY+RsIf+0q/OJybdA363I=; b=KmUz8uCBcBX0tzdKn/9jWo9hxHlmm3v8jZUlSG3V5ewylsILCP/ipsAKZ+OhWI7Aj/ 0Jusa0vgc+gsNEiTxdv8HfyZoqkcwUjD4Pql7ZzX1O9FP9386qBdcx5mVs4szmpo99Kh 58G3vhLqgZH3isyse+BXA2+JrtnXPld6yTHYS5yBLFhjQeYWlZBSlG2CMgrPcLO5Ddxd Yg9SE7rUkSDNMAIxC0DJLYtM4pUmPPMv58GEjPJCXPspxsNouQwdIJxAQqx1jdiUabcy 63CQ6UneZfPug/oPpA2MB9xVwvPAXQjyY21fH3bI3mre9MnvMh1O5vGHlzZe/TTgJg8B Lx2A== X-Gm-Message-State: AOAM5317BVlxf3uK9rwFtmTBeR9EETehPS3U1I7fzelhPr7ZS32sKtj+ xIhmbbv+WrlrIgHda1EU9GQra3B3r6M= X-Google-Smtp-Source: ABdhPJxa7VtuXXanz24afeAyQiO8JqFLYZ4juV5+cGW0bQm8KYYDhaBDzpEwMTV0gtXtARqk3WEpow== X-Received: by 2002:a1c:f302:: with SMTP id q2mr862462wmq.56.1632174325818; Mon, 20 Sep 2021 14:45:25 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v5 08/31] accel/tcg: Implement AccelOpsClass::has_work() as stub Date: Mon, 20 Sep 2021 23:44:24 +0200 Message-Id: <20210920214447.2998623-9-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210920214447.2998623-1-f4bug@amsat.org> References: <20210920214447.2998623-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1632174329360100001 Add TCG target-specific has_work() handler in TCGCPUOps, and add tcg_cpu_has_work() as AccelOpsClass has_work() implementation. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/tcg-cpu-ops.h | 4 ++++ accel/tcg/tcg-accel-ops.c | 10 ++++++++++ 2 files changed, 14 insertions(+) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 55123cb4d22..4a4c4053e3b 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -66,6 +66,10 @@ struct TCGCPUOps { void (*do_interrupt)(CPUState *cpu); #endif /* !CONFIG_USER_ONLY || !TARGET_I386 */ #ifdef CONFIG_SOFTMMU + /** + * @has_work: Callback for checking if there is work to do. + */ + bool (*has_work)(CPUState *cpu); /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exe= c */ bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); /** diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 1a8e8390bd6..f539ba53806 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -32,6 +32,7 @@ #include "qemu/main-loop.h" #include "qemu/guest-random.h" #include "exec/exec-all.h" +#include "hw/core/tcg-cpu-ops.h" =20 #include "tcg-accel-ops.h" #include "tcg-accel-ops-mttcg.h" @@ -73,6 +74,14 @@ int tcg_cpus_exec(CPUState *cpu) return ret; } =20 +static bool tcg_cpu_has_work(CPUState *cpu) +{ + CPUClass *cc =3D CPU_GET_CLASS(cpu); + + g_assert(cc->tcg_ops->has_work); + return cc->tcg_ops->has_work(cpu); +} + /* mask must never be zero, except for A20 change call */ void tcg_handle_interrupt(CPUState *cpu, int mask) { @@ -108,6 +117,7 @@ static void tcg_accel_ops_init(AccelOpsClass *ops) ops->kick_vcpu_thread =3D rr_kick_vcpu_thread; ops->handle_interrupt =3D tcg_handle_interrupt; } + ops->has_work =3D tcg_cpu_has_work; } =20 static void tcg_accel_ops_class_init(ObjectClass *oc, void *data) --=20 2.31.1