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Sat, 18 Sep 2021 11:07:40 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, Bin Meng , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Paolo Bonzini , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH] hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUART Date: Sat, 18 Sep 2021 20:07:38 +0200 Message-Id: <20210918180738.2506799-1-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1631988463026100001 - Embed SerialMM in MchpPfSoCMMUartState and QOM-initialize it - Alias SERIAL_MM 'chardev' property on MCHP_PFSOC_UART - Forward SerialMM sysbus IRQ in mchp_pfsoc_mmuart_realize() - Keep mchp_pfsoc_mmuart_create() behavior Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- include/hw/char/mchp_pfsoc_mmuart.h | 16 ++++-- hw/char/mchp_pfsoc_mmuart.c | 77 +++++++++++++++++++++++------ 2 files changed, 73 insertions(+), 20 deletions(-) diff --git a/include/hw/char/mchp_pfsoc_mmuart.h b/include/hw/char/mchp_pfs= oc_mmuart.h index f61990215f0..b484b7ea5e4 100644 --- a/include/hw/char/mchp_pfsoc_mmuart.h +++ b/include/hw/char/mchp_pfsoc_mmuart.h @@ -28,16 +28,22 @@ #ifndef HW_MCHP_PFSOC_MMUART_H #define HW_MCHP_PFSOC_MMUART_H =20 +#include "hw/sysbus.h" #include "hw/char/serial.h" =20 #define MCHP_PFSOC_MMUART_REG_SIZE 52 =20 -typedef struct MchpPfSoCMMUartState { - MemoryRegion iomem; - hwaddr base; - qemu_irq irq; +#define TYPE_MCHP_PFSOC_UART "mchp.pfsoc.uart" +OBJECT_DECLARE_SIMPLE_TYPE(MchpPfSoCMMUartState, MCHP_PFSOC_UART) =20 - SerialMM *serial; +typedef struct MchpPfSoCMMUartState { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion iomem; + + SerialMM serial_mm; =20 uint32_t reg[MCHP_PFSOC_MMUART_REG_SIZE / sizeof(uint32_t)]; } MchpPfSoCMMUartState; diff --git a/hw/char/mchp_pfsoc_mmuart.c b/hw/char/mchp_pfsoc_mmuart.c index 2facf85c2d8..74404e047d4 100644 --- a/hw/char/mchp_pfsoc_mmuart.c +++ b/hw/char/mchp_pfsoc_mmuart.c @@ -22,8 +22,9 @@ =20 #include "qemu/osdep.h" #include "qemu/log.h" -#include "chardev/char.h" +#include "qapi/error.h" #include "hw/char/mchp_pfsoc_mmuart.h" +#include "hw/qdev-properties.h" =20 static uint64_t mchp_pfsoc_mmuart_read(void *opaque, hwaddr addr, unsigned= size) { @@ -63,23 +64,69 @@ static const MemoryRegionOps mchp_pfsoc_mmuart_ops =3D { }, }; =20 -MchpPfSoCMMUartState *mchp_pfsoc_mmuart_create(MemoryRegion *sysmem, - hwaddr base, qemu_irq irq, Chardev *chr) +static void mchp_pfsoc_mmuart_init(Object *obj) { - MchpPfSoCMMUartState *s; - - s =3D g_new0(MchpPfSoCMMUartState, 1); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); + MchpPfSoCMMUartState *s =3D MCHP_PFSOC_UART(obj); =20 memory_region_init_io(&s->iomem, NULL, &mchp_pfsoc_mmuart_ops, s, "mchp.pfsoc.mmuart", 0x1000); + sysbus_init_mmio(sbd, &s->iomem); =20 - s->base =3D base; - s->irq =3D irq; - - s->serial =3D serial_mm_init(sysmem, base, 2, irq, 399193, chr, - DEVICE_LITTLE_ENDIAN); - - memory_region_add_subregion(sysmem, base + 0x20, &s->iomem); - - return s; + object_initialize_child(obj, "serial-mm", &s->serial_mm, TYPE_SERIAL_M= M); + object_property_add_alias(obj, "chardev", OBJECT(&s->serial_mm), "char= dev"); +} + +static void mchp_pfsoc_mmuart_realize(DeviceState *dev, Error **errp) +{ + MchpPfSoCMMUartState *s =3D MCHP_PFSOC_UART(dev); + + qdev_prop_set_uint8(DEVICE(&s->serial_mm), "regshift", 2); + qdev_prop_set_uint32(DEVICE(&s->serial_mm), "baudbase", 399193); + qdev_prop_set_uint8(DEVICE(&s->serial_mm), "endianness", + DEVICE_LITTLE_ENDIAN); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->serial_mm), errp)) { + return; + } + sysbus_pass_irq(SYS_BUS_DEVICE(dev), SYS_BUS_DEVICE(&s->serial_mm)); + memory_region_add_subregion(&s->iomem, 0x20, + sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->serial_mm), 0)); +} + +static void mchp_pfsoc_mmuart_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(oc); + + dc->realize =3D mchp_pfsoc_mmuart_realize; +} + +static const TypeInfo mchp_pfsoc_mmuart_info =3D { + .name =3D TYPE_MCHP_PFSOC_UART, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(MchpPfSoCMMUartState), + .instance_init =3D mchp_pfsoc_mmuart_init, + .class_init =3D mchp_pfsoc_mmuart_class_init, +}; + +static void mchp_pfsoc_mmuart_register_types(void) +{ + type_register_static(&mchp_pfsoc_mmuart_info); +} + +type_init(mchp_pfsoc_mmuart_register_types) + +MchpPfSoCMMUartState *mchp_pfsoc_mmuart_create(MemoryRegion *sysmem, + hwaddr base, + qemu_irq irq, Chardev *chr) +{ + DeviceState *dev =3D qdev_new(TYPE_MCHP_PFSOC_UART); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); + + qdev_prop_set_chr(dev, "chardev", chr); + sysbus_realize(sbd, &error_fatal); + + memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(sbd, = 0)); + sysbus_connect_irq(sbd, 0, irq); + + return MCHP_PFSOC_UART(dev); } --=20 2.31.1