Changes for v5:
* Add is_{general,vector}_reg predicates.
* Use 0xf not 15 for masking.
r~
Richard Henderson (16):
tcg: Expand usadd/ussub with umin/umax
tcg/s390x: Rename from tcg/s390
tcg/s390x: Change FACILITY representation
tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg
tcg/s390x: Add host vector framework
tcg/s390x: Implement tcg_out_ld/st for vector types
tcg/s390x: Implement tcg_out_mov for vector types
tcg/s390x: Implement tcg_out_dup*_vec
tcg/s390x: Implement minimal vector operations
tcg/s390x: Implement andc, orc, abs, neg, not vector operations
tcg/s390x: Implement TCG_TARGET_HAS_mul_vec
tcg/s390x: Implement vector shift operations
tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec
tcg/s390x: Implement TCG_TARGET_HAS_sat_vec
tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec
tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec
meson.build | 2 -
tcg/{s390 => s390x}/tcg-target-con-set.h | 7 +
tcg/{s390 => s390x}/tcg-target-con-str.h | 1 +
tcg/{s390 => s390x}/tcg-target.h | 91 ++-
tcg/s390x/tcg-target.opc.h | 15 +
tcg/tcg-op-vec.c | 37 +-
tcg/{s390 => s390x}/tcg-target.c.inc | 935 +++++++++++++++++++++--
7 files changed, 993 insertions(+), 95 deletions(-)
rename tcg/{s390 => s390x}/tcg-target-con-set.h (86%)
rename tcg/{s390 => s390x}/tcg-target-con-str.h (96%)
rename tcg/{s390 => s390x}/tcg-target.h (66%)
create mode 100644 tcg/s390x/tcg-target.opc.h
rename tcg/{s390 => s390x}/tcg-target.c.inc (73%)
--
2.25.1