From nobody Thu May 2 04:26:44 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1631270052357728.7782397483772; Fri, 10 Sep 2021 03:34:12 -0700 (PDT) Received: from localhost ([::1]:60978 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mOdrH-0003tc-BL for importer@patchew.org; Fri, 10 Sep 2021 06:34:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36682) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mOdmP-000662-RQ for qemu-devel@nongnu.org; Fri, 10 Sep 2021 06:29:13 -0400 Received: from mga17.intel.com ([192.55.52.151]:47080) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mOdmN-0002IY-Tr for qemu-devel@nongnu.org; Fri, 10 Sep 2021 06:29:09 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2021 03:28:52 -0700 Received: from icx-2s.bj.intel.com ([10.240.192.119]) by FMSMGA003.fm.intel.com with ESMTP; 10 Sep 2021 03:28:50 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10102"; a="201241626" X-IronPort-AV: E=Sophos;i="5.85,282,1624345200"; d="scan'208";a="201241626" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,282,1624345200"; d="scan'208";a="540545518" From: Yang Zhong To: qemu-devel@nongnu.org Subject: [PATCH v2 1/3] monitor: Add HMP and QMP interfaces Date: Fri, 10 Sep 2021 18:22:56 +0800 Message-Id: <20210910102258.46648-2-yang.zhong@intel.com> X-Mailer: git-send-email 2.29.2.334.gfaefdd61ec In-Reply-To: <20210910102258.46648-1-yang.zhong@intel.com> References: <20210910102258.46648-1-yang.zhong@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.55.52.151; envelope-from=yang.zhong@intel.com; helo=mga17.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, pbonzini@redhat.com, philmd@redhat.com, eblake@redhat.com, seanjc@google.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1631270054130100001 Content-Type: text/plain; charset="utf-8" The QMP and HMP interfaces can be used by monitor or QMP tools to retrieve the SGX information from VM side when SGX is enabled on Intel platform. Signed-off-by: Yang Zhong --- hmp-commands-info.hx | 15 +++++++++++++ hw/i386/sgx.c | 29 ++++++++++++++++++++++++ include/hw/i386/sgx.h | 11 +++++++++ include/monitor/hmp-target.h | 1 + qapi/misc-target.json | 43 ++++++++++++++++++++++++++++++++++++ target/i386/monitor.c | 36 ++++++++++++++++++++++++++++++ tests/qtest/qmp-cmd-test.c | 1 + 7 files changed, 136 insertions(+) create mode 100644 include/hw/i386/sgx.h diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx index 27206ac049..4c966e8a6b 100644 --- a/hmp-commands-info.hx +++ b/hmp-commands-info.hx @@ -877,3 +877,18 @@ SRST ``info dirty_rate`` Display the vcpu dirty rate information. ERST + +#if defined(TARGET_I386) + { + .name =3D "sgx", + .args_type =3D "", + .params =3D "", + .help =3D "show intel SGX information", + .cmd =3D hmp_info_sgx, + }, +#endif + +SRST + ``info sgx`` + Show intel SGX information. +ERST diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c index 02fa6487c3..8a32d62d7e 100644 --- a/hw/i386/sgx.c +++ b/hw/i386/sgx.c @@ -17,6 +17,35 @@ #include "monitor/qdev.h" #include "qapi/error.h" #include "exec/address-spaces.h" +#include "hw/i386/sgx.h" + +SGXInfo *sgx_get_info(void) +{ + SGXInfo *info =3D NULL; + X86MachineState *x86ms; + PCMachineState *pcms =3D + (PCMachineState *)object_dynamic_cast(qdev_get_machine(), + TYPE_PC_MACHINE); + if (!pcms) { + return NULL; + } + + x86ms =3D X86_MACHINE(pcms); + if (!x86ms->sgx_epc_list) { + return NULL; + } + + SGXEPCState *sgx_epc =3D &pcms->sgx_epc; + info =3D g_new0(SGXInfo, 1); + + info->sgx =3D true; + info->sgx1 =3D true; + info->sgx2 =3D true; + info->flc =3D true; + info->section_size =3D sgx_epc->size; + + return info; +} =20 int sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size) { diff --git a/include/hw/i386/sgx.h b/include/hw/i386/sgx.h new file mode 100644 index 0000000000..ea8672f8eb --- /dev/null +++ b/include/hw/i386/sgx.h @@ -0,0 +1,11 @@ +#ifndef QEMU_SGX_H +#define QEMU_SGX_H + +#include "qom/object.h" +#include "qapi/error.h" +#include "qemu/error-report.h" +#include "qapi/qapi-types-misc-target.h" + +SGXInfo *sgx_get_info(void); + +#endif diff --git a/include/monitor/hmp-target.h b/include/monitor/hmp-target.h index 60fc92722a..dc53add7ee 100644 --- a/include/monitor/hmp-target.h +++ b/include/monitor/hmp-target.h @@ -49,5 +49,6 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict); void hmp_mce(Monitor *mon, const QDict *qdict); void hmp_info_local_apic(Monitor *mon, const QDict *qdict); void hmp_info_io_apic(Monitor *mon, const QDict *qdict); +void hmp_info_sgx(Monitor *mon, const QDict *qdict); =20 #endif /* MONITOR_HMP_TARGET_H */ diff --git a/qapi/misc-target.json b/qapi/misc-target.json index 3b05ad3dbf..e2a347cc23 100644 --- a/qapi/misc-target.json +++ b/qapi/misc-target.json @@ -333,3 +333,46 @@ { 'command': 'query-sev-attestation-report', 'data': { 'mnonce': 'str' }, 'returns': 'SevAttestationReport', 'if': 'TARGET_I386' } + +## +# @SGXInfo: +# +# Information about intel Safe Guard eXtension (SGX) support +# +# @sgx: true if SGX is supported +# +# @sgx1: true if SGX1 is supported +# +# @sgx2: true if SGX2 is supported +# +# @flc: true if FLC is supported +# +# @section-size: The EPC section size for guest +# +# Since: 6.2 +## +{ 'struct': 'SGXInfo', + 'data': { 'sgx': 'bool', + 'sgx1': 'bool', + 'sgx2': 'bool', + 'flc': 'bool', + 'section-size': 'uint64'}, + 'if': 'TARGET_I386' } + +## +# @query-sgx: +# +# Returns information about SGX +# +# Returns: @SGXInfo +# +# Since: 6.2 +# +# Example: +# +# -> { "execute": "query-sgx" } +# <- { "return": { "sgx": true, "sgx1" : true, "sgx2" : true, +# "flc": true, "section-size" : 0 } } +# +## +{ 'command': 'query-sgx', 'returns': 'SGXInfo', 'if': 'TARGET_I386' } diff --git a/target/i386/monitor.c b/target/i386/monitor.c index 119211f0b0..0f1b48b4f8 100644 --- a/target/i386/monitor.c +++ b/target/i386/monitor.c @@ -35,6 +35,7 @@ #include "qapi/qapi-commands-misc-target.h" #include "qapi/qapi-commands-misc.h" #include "hw/i386/pc.h" +#include "hw/i386/sgx.h" =20 /* Perform linear address sign extension */ static hwaddr addr_canonical(CPUArchState *env, hwaddr addr) @@ -763,3 +764,38 @@ qmp_query_sev_attestation_report(const char *mnonce, E= rror **errp) { return sev_get_attestation_report(mnonce, errp); } + +SGXInfo *qmp_query_sgx(Error **errp) +{ + SGXInfo *info; + + info =3D sgx_get_info(); + if (!info) { + error_setg(errp, "SGX features are not available"); + return NULL; + } + + return info; +} + +void hmp_info_sgx(Monitor *mon, const QDict *qdict) +{ + SGXInfo *info =3D qmp_query_sgx(NULL); + + if (info && info->sgx) { + monitor_printf(mon, "SGX support: %s\n", + info->sgx ? "enabled" : "disabled"); + monitor_printf(mon, "SGX1 support: %s\n", + info->sgx1 ? "enabled" : "disabled"); + monitor_printf(mon, "SGX2 support: %s\n", + info->sgx2 ? "enabled" : "disabled"); + monitor_printf(mon, "FLC support: %s\n", + info->flc ? "enabled" : "disabled"); + monitor_printf(mon, "size: %" PRIu64 "\n", + info->section_size); + } else { + monitor_printf(mon, "SGX is not enabled\n"); + } + + qapi_free_SGXInfo(info); +} diff --git a/tests/qtest/qmp-cmd-test.c b/tests/qtest/qmp-cmd-test.c index c98b78d033..b75f3364f3 100644 --- a/tests/qtest/qmp-cmd-test.c +++ b/tests/qtest/qmp-cmd-test.c @@ -100,6 +100,7 @@ static bool query_is_ignored(const char *cmd) /* Success depends on Host or Hypervisor SEV support */ "query-sev", "query-sev-capabilities", + "query-sgx", NULL }; int i; From nobody Thu May 2 04:26:44 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1631269896379456.17703292358965; Fri, 10 Sep 2021 03:31:36 -0700 (PDT) Received: from localhost ([::1]:56046 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mOdol-0000TU-8c for importer@patchew.org; Fri, 10 Sep 2021 06:31:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36658) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mOdmN-0005zl-Gn for qemu-devel@nongnu.org; Fri, 10 Sep 2021 06:29:07 -0400 Received: from mga17.intel.com ([192.55.52.151]:47080) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mOdmK-0002IY-NU for qemu-devel@nongnu.org; Fri, 10 Sep 2021 06:29:07 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2021 03:28:54 -0700 Received: from icx-2s.bj.intel.com ([10.240.192.119]) by FMSMGA003.fm.intel.com with ESMTP; 10 Sep 2021 03:28:52 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10102"; a="201241630" X-IronPort-AV: E=Sophos;i="5.85,282,1624345200"; d="scan'208";a="201241630" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,282,1624345200"; d="scan'208";a="540545523" From: Yang Zhong To: qemu-devel@nongnu.org Subject: [PATCH v2 2/3] qmp: Add the qmp_query_sgx_capabilities() Date: Fri, 10 Sep 2021 18:22:57 +0800 Message-Id: <20210910102258.46648-3-yang.zhong@intel.com> X-Mailer: git-send-email 2.29.2.334.gfaefdd61ec In-Reply-To: <20210910102258.46648-1-yang.zhong@intel.com> References: <20210910102258.46648-1-yang.zhong@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.55.52.151; envelope-from=yang.zhong@intel.com; helo=mga17.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, pbonzini@redhat.com, philmd@redhat.com, eblake@redhat.com, seanjc@google.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1631269897805100001 Content-Type: text/plain; charset="utf-8" Libvirt can use qmp_query_sgx_capabilities() to get the host sgx capabilities to decide how to allocate SGX EPC size to VM. Signed-off-by: Yang Zhong --- hw/i386/sgx.c | 66 ++++++++++++++++++++++++++++++++++++++ include/hw/i386/sgx.h | 1 + qapi/misc-target.json | 18 +++++++++++ target/i386/monitor.c | 5 +++ tests/qtest/qmp-cmd-test.c | 1 + 5 files changed, 91 insertions(+) diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c index 8a32d62d7e..1be2670c84 100644 --- a/hw/i386/sgx.c +++ b/hw/i386/sgx.c @@ -18,6 +18,72 @@ #include "qapi/error.h" #include "exec/address-spaces.h" #include "hw/i386/sgx.h" +#include "sysemu/hw_accel.h" + +#define SGX_MAX_EPC_SECTIONS 8 +#define SGX_CPUID_EPC_INVALID 0x0 + +/* A valid EPC section. */ +#define SGX_CPUID_EPC_SECTION 0x1 +#define SGX_CPUID_EPC_MASK 0xF + +static uint64_t sgx_calc_section_metric(uint64_t low, uint64_t high) +{ + return (low & MAKE_64BIT_MASK(12, 31 - 12 + 1)) + + ((high & MAKE_64BIT_MASK(0, 19 - 0 + 1)) << 32); +} + +static uint64_t sgx_calc_host_epc_section_size(void) +{ + uint32_t i, type; + uint32_t eax, ebx, ecx, edx; + uint64_t size =3D 0; + + for (i =3D 0; i < SGX_MAX_EPC_SECTIONS; i++) { + host_cpuid(0x12, i + 2, &eax, &ebx, &ecx, &edx); + + type =3D eax & SGX_CPUID_EPC_MASK; + if (type =3D=3D SGX_CPUID_EPC_INVALID) { + break; + } + + if (type !=3D SGX_CPUID_EPC_SECTION) { + break; + } + + size +=3D sgx_calc_section_metric(ecx, edx); + } + + return size; +} + +SGXInfo *sgx_get_capabilities(Error **errp) +{ + SGXInfo *info =3D NULL; + uint32_t eax, ebx, ecx, edx; + + int fd =3D qemu_open_old("/dev/sgx_vepc", O_RDWR); + if (fd < 0) { + error_setg(errp, "SGX is not enabled in KVM"); + return NULL; + } + + info =3D g_new0(SGXInfo, 1); + host_cpuid(0x7, 0, &eax, &ebx, &ecx, &edx); + + info->sgx =3D ebx & (1U << 2) ? true : false; + info->flc =3D ecx & (1U << 30) ? true : false; + + host_cpuid(0x12, 0, &eax, &ebx, &ecx, &edx); + info->sgx1 =3D eax & (1U << 0) ? true : false; + info->sgx2 =3D eax & (1U << 1) ? true : false; + + info->section_size =3D sgx_calc_host_epc_section_size(); + + close(fd); + + return info; +} =20 SGXInfo *sgx_get_info(void) { diff --git a/include/hw/i386/sgx.h b/include/hw/i386/sgx.h index ea8672f8eb..28437cffc6 100644 --- a/include/hw/i386/sgx.h +++ b/include/hw/i386/sgx.h @@ -7,5 +7,6 @@ #include "qapi/qapi-types-misc-target.h" =20 SGXInfo *sgx_get_info(void); +SGXInfo *sgx_get_capabilities(Error **errp); =20 #endif diff --git a/qapi/misc-target.json b/qapi/misc-target.json index e2a347cc23..594fbd1577 100644 --- a/qapi/misc-target.json +++ b/qapi/misc-target.json @@ -376,3 +376,21 @@ # ## { 'command': 'query-sgx', 'returns': 'SGXInfo', 'if': 'TARGET_I386' } + +## +# @query-sgx-capabilities: +# +# Returns information from host SGX capabilities +# +# Returns: @SGXInfo +# +# Since: 6.2 +# +# Example: +# +# -> { "execute": "query-sgx-capabilities" } +# <- { "return": { "sgx": true, "sgx1" : true, "sgx2" : true, +# "flc": true, "section-size" : 0 } } +# +## +{ 'command': 'query-sgx-capabilities', 'returns': 'SGXInfo', 'if': 'TARGET= _I386' } diff --git a/target/i386/monitor.c b/target/i386/monitor.c index 0f1b48b4f8..23a6dc3b7d 100644 --- a/target/i386/monitor.c +++ b/target/i386/monitor.c @@ -799,3 +799,8 @@ void hmp_info_sgx(Monitor *mon, const QDict *qdict) =20 qapi_free_SGXInfo(info); } + +SGXInfo *qmp_query_sgx_capabilities(Error **errp) +{ + return sgx_get_capabilities(errp); +} diff --git a/tests/qtest/qmp-cmd-test.c b/tests/qtest/qmp-cmd-test.c index b75f3364f3..1af2f74c28 100644 --- a/tests/qtest/qmp-cmd-test.c +++ b/tests/qtest/qmp-cmd-test.c @@ -101,6 +101,7 @@ static bool query_is_ignored(const char *cmd) "query-sev", "query-sev-capabilities", "query-sgx", + "query-sgx-capabilities", NULL }; int i; From nobody Thu May 2 04:26:44 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1631269875310581.0719772275819; Fri, 10 Sep 2021 03:31:15 -0700 (PDT) Received: from localhost ([::1]:55468 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mOdoP-000052-Vg for importer@patchew.org; Fri, 10 Sep 2021 06:31:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36674) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mOdmO-000633-Rf for qemu-devel@nongnu.org; Fri, 10 Sep 2021 06:29:08 -0400 Received: from mga17.intel.com ([192.55.52.151]:47087) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mOdmN-0002NF-6u for qemu-devel@nongnu.org; Fri, 10 Sep 2021 06:29:08 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2021 03:28:56 -0700 Received: from icx-2s.bj.intel.com ([10.240.192.119]) by FMSMGA003.fm.intel.com with ESMTP; 10 Sep 2021 03:28:54 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10102"; a="201241634" X-IronPort-AV: E=Sophos;i="5.85,282,1624345200"; d="scan'208";a="201241634" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,282,1624345200"; d="scan'208";a="540545527" From: Yang Zhong To: qemu-devel@nongnu.org Subject: [PATCH v2 3/3] pc: Cleanup the SGX definitions Date: Fri, 10 Sep 2021 18:22:58 +0800 Message-Id: <20210910102258.46648-4-yang.zhong@intel.com> X-Mailer: git-send-email 2.29.2.334.gfaefdd61ec In-Reply-To: <20210910102258.46648-1-yang.zhong@intel.com> References: <20210910102258.46648-1-yang.zhong@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.55.52.151; envelope-from=yang.zhong@intel.com; helo=mga17.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, pbonzini@redhat.com, philmd@redhat.com, eblake@redhat.com, seanjc@google.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1631269877250100001 Content-Type: text/plain; charset="utf-8" This patch only cleanup SGX definitions in the the pc.h file. Signed-off-by: Yang Zhong --- include/hw/i386/pc.h | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index a5ae380b4b..4c77489961 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -195,17 +195,18 @@ void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, s= ize_t flash_size); void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); =20 +/* sgx.c */ +void pc_machine_init_sgx_epc(PCMachineState *pcms); +/* hostmem-epc.c */ +void sgx_memory_backend_reset(HostMemoryBackend *backend, int fd, + Error **errp); + extern GlobalProperty pc_compat_6_1[]; extern const size_t pc_compat_6_1_len; =20 extern GlobalProperty pc_compat_6_0[]; extern const size_t pc_compat_6_0_len; =20 -/* sgx-epc.c */ -void pc_machine_init_sgx_epc(PCMachineState *pcms); -void sgx_memory_backend_reset(HostMemoryBackend *backend, int fd, - Error **errp); - extern GlobalProperty pc_compat_5_2[]; extern const size_t pc_compat_5_2_len; =20