From nobody Mon Feb 9 09:09:31 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1631098387552345.5047534659211; Wed, 8 Sep 2021 03:53:07 -0700 (PDT) Received: from localhost ([::1]:40610 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mNvCU-0005tV-A2 for importer@patchew.org; Wed, 08 Sep 2021 06:53:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45468) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mNuxK-0000Wu-7O for qemu-devel@nongnu.org; Wed, 08 Sep 2021 06:37:26 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:54765) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mNuxH-0003vV-M5 for qemu-devel@nongnu.org; Wed, 08 Sep 2021 06:37:25 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-338-l0GtYP3-NLSeySeFg3ujmw-1; Wed, 08 Sep 2021 06:37:22 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 403C780196C; Wed, 8 Sep 2021 10:37:21 +0000 (UTC) Received: from localhost.localdomain.com (unknown [10.39.192.7]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3ECC65C1BB; Wed, 8 Sep 2021 10:37:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1631097443; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=V4XMjbf0Qs0FB8YqPIkbCZeFcIvgV7JjtV9qnc3KVqY=; b=LNtQenB+1KuBhooOWxpZThUOhvNQhMPUzo2dKbK1l3RyUkU4heg+oV3Wd3LOaVspo5NOYz 900FdJyssQXR+DvVjFQEpzppW3xh0OjH+sFHOgcpXngV3+6oUluVsw9F7hjfKcjna30Gdv hTWJCV0knwBHRmivYwY7HN6l66CgC3I= X-MC-Unique: l0GtYP3-NLSeySeFg3ujmw-1 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 3/5] target/i386: convert to use format_state instead of dump_state Date: Wed, 8 Sep 2021 11:37:09 +0100 Message-Id: <20210908103711.683940-4-berrange@redhat.com> In-Reply-To: <20210908103711.683940-1-berrange@redhat.com> References: <20210908103711.683940-1-berrange@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=berrange@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=berrange@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -31 X-Spam_score: -3.2 X-Spam_bar: --- X-Spam_report: (-3.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.391, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Eduardo Habkost , "Dr. David Alan Gilbert" , Markus Armbruster , Eric Blake Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1631098388931100001 Signed-off-by: Daniel P. Berrang=C3=A9 --- target/i386/cpu-dump.c | 325 ++++++++++++++++++++++------------------- target/i386/cpu.c | 2 +- target/i386/cpu.h | 2 +- 3 files changed, 174 insertions(+), 155 deletions(-) diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c index 02b635a52c..8e19485a20 100644 --- a/target/i386/cpu-dump.c +++ b/target/i386/cpu-dump.c @@ -94,41 +94,45 @@ static const char *cc_op_str[CC_OP_NB] =3D { }; =20 static void -cpu_x86_dump_seg_cache(CPUX86State *env, FILE *f, +cpu_x86_dump_seg_cache(CPUX86State *env, GString *buf, const char *name, struct SegmentCache *sc) { #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { - qemu_fprintf(f, "%-3s=3D%04x %016" PRIx64 " %08x %08x", name, - sc->selector, sc->base, sc->limit, - sc->flags & 0x00ffff00); + g_string_append_printf(buf, "%-3s=3D%04x %016" PRIx64 " %08x %08x"= , name, + sc->selector, sc->base, sc->limit, + sc->flags & 0x00ffff00); } else #endif { - qemu_fprintf(f, "%-3s=3D%04x %08x %08x %08x", name, sc->selector, - (uint32_t)sc->base, sc->limit, - sc->flags & 0x00ffff00); + g_string_append_printf(buf, "%-3s=3D%04x %08x %08x %08x", + name, sc->selector, + (uint32_t)sc->base, sc->limit, + sc->flags & 0x00ffff00); } =20 if (!(env->hflags & HF_PE_MASK) || !(sc->flags & DESC_P_MASK)) goto done; =20 - qemu_fprintf(f, " DPL=3D%d ", + g_string_append_printf(buf, " DPL=3D%d ", (sc->flags & DESC_DPL_MASK) >> DESC_DPL_SHIFT); if (sc->flags & DESC_S_MASK) { if (sc->flags & DESC_CS_MASK) { - qemu_fprintf(f, (sc->flags & DESC_L_MASK) ? "CS64" : - ((sc->flags & DESC_B_MASK) ? "CS32" : "CS16")); - qemu_fprintf(f, " [%c%c", (sc->flags & DESC_C_MASK) ? 'C' : '-= ', - (sc->flags & DESC_R_MASK) ? 'R' : '-'); + g_string_append_printf(buf, (sc->flags & DESC_L_MASK) ? "CS64"= : + ((sc->flags & DESC_B_MASK) ? "CS32" : "= CS16")); + g_string_append_printf(buf, " [%c%c", + (sc->flags & DESC_C_MASK) ? 'C' : '-', + (sc->flags & DESC_R_MASK) ? 'R' : '-'); } else { - qemu_fprintf(f, (sc->flags & DESC_B_MASK + g_string_append_printf(buf, (sc->flags & DESC_B_MASK || env->hflags & HF_LMA_MASK) ? "DS " : "DS16"); - qemu_fprintf(f, " [%c%c", (sc->flags & DESC_E_MASK) ? 'E' : '-= ', - (sc->flags & DESC_W_MASK) ? 'W' : '-'); + g_string_append_printf(buf, " [%c%c", + (sc->flags & DESC_E_MASK) ? 'E' : '-', + (sc->flags & DESC_W_MASK) ? 'W' : '-'); } - qemu_fprintf(f, "%c]", (sc->flags & DESC_A_MASK) ? 'A' : '-'); + g_string_append_printf(buf, "%c]", + (sc->flags & DESC_A_MASK) ? 'A' : '-'); } else { static const char *sys_type_name[2][16] =3D { { /* 32 bit mode */ @@ -144,12 +148,12 @@ cpu_x86_dump_seg_cache(CPUX86State *env, FILE *f, "Reserved", "IntGate64", "TrapGate64" } }; - qemu_fprintf(f, "%s", - sys_type_name[(env->hflags & HF_LMA_MASK) ? 1 : 0] - [(sc->flags & DESC_TYPE_MASK) >> DESC_TYPE_SHIFT]); + g_string_append_printf(buf, "%s", + sys_type_name[(env->hflags & HF_LMA_MASK) ?= 1 : 0] + [(sc->flags & DESC_TYPE_MASK) >> DESC_TYPE_= SHIFT]); } done: - qemu_fprintf(f, "\n"); + g_string_append_printf(buf, "\n"); } =20 #ifndef CONFIG_USER_ONLY @@ -344,7 +348,7 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, int fl= ags) #define DUMP_CODE_BYTES_TOTAL 50 #define DUMP_CODE_BYTES_BACKWARD 20 =20 -void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags) +void x86_cpu_format_state(CPUState *cs, GString *buf, int flags) { X86CPU *cpu =3D X86_CPU(cs); CPUX86State *env =3D &cpu->env; @@ -355,107 +359,116 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int = flags) eflags =3D cpu_compute_eflags(env); #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { - qemu_fprintf(f, "RAX=3D%016" PRIx64 " RBX=3D%016" PRIx64 " RCX=3D%= 016" PRIx64 " RDX=3D%016" PRIx64 "\n" - "RSI=3D%016" PRIx64 " RDI=3D%016" PRIx64 " RBP=3D%016= " PRIx64 " RSP=3D%016" PRIx64 "\n" - "R8 =3D%016" PRIx64 " R9 =3D%016" PRIx64 " R10=3D%016= " PRIx64 " R11=3D%016" PRIx64 "\n" - "R12=3D%016" PRIx64 " R13=3D%016" PRIx64 " R14=3D%016= " PRIx64 " R15=3D%016" PRIx64 "\n" - "RIP=3D%016" PRIx64 " RFL=3D%08x [%c%c%c%c%c%c%c] CPL= =3D%d II=3D%d A20=3D%d SMM=3D%d HLT=3D%d\n", - env->regs[R_EAX], - env->regs[R_EBX], - env->regs[R_ECX], - env->regs[R_EDX], - env->regs[R_ESI], - env->regs[R_EDI], - env->regs[R_EBP], - env->regs[R_ESP], - env->regs[8], - env->regs[9], - env->regs[10], - env->regs[11], - env->regs[12], - env->regs[13], - env->regs[14], - env->regs[15], - env->eip, eflags, - eflags & DF_MASK ? 'D' : '-', - eflags & CC_O ? 'O' : '-', - eflags & CC_S ? 'S' : '-', - eflags & CC_Z ? 'Z' : '-', - eflags & CC_A ? 'A' : '-', - eflags & CC_P ? 'P' : '-', - eflags & CC_C ? 'C' : '-', - env->hflags & HF_CPL_MASK, - (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, - (env->a20_mask >> 20) & 1, - (env->hflags >> HF_SMM_SHIFT) & 1, - cs->halted); + g_string_append_printf(buf, "RAX=3D%016" PRIx64 " RBX=3D%016" PRIx= 64 + " RCX=3D%016" PRIx64 " RDX=3D%016" PRIx64 "= \n" + "RSI=3D%016" PRIx64 " RDI=3D%016" PRIx64 + " RBP=3D%016" PRIx64 " RSP=3D%016" PRIx64 "= \n" + "R8 =3D%016" PRIx64 " R9 =3D%016" PRIx64 + " R10=3D%016" PRIx64 " R11=3D%016" PRIx64 "= \n" + "R12=3D%016" PRIx64 " R13=3D%016" PRIx64 + " R14=3D%016" PRIx64 " R15=3D%016" PRIx64 "= \n" + "RIP=3D%016" PRIx64 " RFL=3D%08x [%c%c%c%c%= c%c%c] " + "CPL=3D%d II=3D%d A20=3D%d SMM=3D%d HLT=3D%= d\n", + env->regs[R_EAX], + env->regs[R_EBX], + env->regs[R_ECX], + env->regs[R_EDX], + env->regs[R_ESI], + env->regs[R_EDI], + env->regs[R_EBP], + env->regs[R_ESP], + env->regs[8], + env->regs[9], + env->regs[10], + env->regs[11], + env->regs[12], + env->regs[13], + env->regs[14], + env->regs[15], + env->eip, eflags, + eflags & DF_MASK ? 'D' : '-', + eflags & CC_O ? 'O' : '-', + eflags & CC_S ? 'S' : '-', + eflags & CC_Z ? 'Z' : '-', + eflags & CC_A ? 'A' : '-', + eflags & CC_P ? 'P' : '-', + eflags & CC_C ? 'C' : '-', + env->hflags & HF_CPL_MASK, + (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, + (env->a20_mask >> 20) & 1, + (env->hflags >> HF_SMM_SHIFT) & 1, + cs->halted); } else #endif { - qemu_fprintf(f, "EAX=3D%08x EBX=3D%08x ECX=3D%08x EDX=3D%08x\n" - "ESI=3D%08x EDI=3D%08x EBP=3D%08x ESP=3D%08x\n" - "EIP=3D%08x EFL=3D%08x [%c%c%c%c%c%c%c] CPL=3D%d II= =3D%d A20=3D%d SMM=3D%d HLT=3D%d\n", - (uint32_t)env->regs[R_EAX], - (uint32_t)env->regs[R_EBX], - (uint32_t)env->regs[R_ECX], - (uint32_t)env->regs[R_EDX], - (uint32_t)env->regs[R_ESI], - (uint32_t)env->regs[R_EDI], - (uint32_t)env->regs[R_EBP], - (uint32_t)env->regs[R_ESP], - (uint32_t)env->eip, eflags, - eflags & DF_MASK ? 'D' : '-', - eflags & CC_O ? 'O' : '-', - eflags & CC_S ? 'S' : '-', - eflags & CC_Z ? 'Z' : '-', - eflags & CC_A ? 'A' : '-', - eflags & CC_P ? 'P' : '-', - eflags & CC_C ? 'C' : '-', - env->hflags & HF_CPL_MASK, - (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, - (env->a20_mask >> 20) & 1, - (env->hflags >> HF_SMM_SHIFT) & 1, - cs->halted); + g_string_append_printf(buf, "EAX=3D%08x EBX=3D%08x ECX=3D%08x EDX= =3D%08x\n" + "ESI=3D%08x EDI=3D%08x EBP=3D%08x ESP=3D%08= x\n" + "EIP=3D%08x EFL=3D%08x [%c%c%c%c%c%c%c] " + "CPL=3D%d II=3D%d A20=3D%d SMM=3D%d HLT=3D%= d\n", + (uint32_t)env->regs[R_EAX], + (uint32_t)env->regs[R_EBX], + (uint32_t)env->regs[R_ECX], + (uint32_t)env->regs[R_EDX], + (uint32_t)env->regs[R_ESI], + (uint32_t)env->regs[R_EDI], + (uint32_t)env->regs[R_EBP], + (uint32_t)env->regs[R_ESP], + (uint32_t)env->eip, eflags, + eflags & DF_MASK ? 'D' : '-', + eflags & CC_O ? 'O' : '-', + eflags & CC_S ? 'S' : '-', + eflags & CC_Z ? 'Z' : '-', + eflags & CC_A ? 'A' : '-', + eflags & CC_P ? 'P' : '-', + eflags & CC_C ? 'C' : '-', + env->hflags & HF_CPL_MASK, + (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, + (env->a20_mask >> 20) & 1, + (env->hflags >> HF_SMM_SHIFT) & 1, + cs->halted); } =20 for(i =3D 0; i < 6; i++) { - cpu_x86_dump_seg_cache(env, f, seg_name[i], &env->segs[i]); + cpu_x86_dump_seg_cache(env, buf, seg_name[i], &env->segs[i]); } - cpu_x86_dump_seg_cache(env, f, "LDT", &env->ldt); - cpu_x86_dump_seg_cache(env, f, "TR", &env->tr); + cpu_x86_dump_seg_cache(env, buf, "LDT", &env->ldt); + cpu_x86_dump_seg_cache(env, buf, "TR", &env->tr); =20 #ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { - qemu_fprintf(f, "GDT=3D %016" PRIx64 " %08x\n", - env->gdt.base, env->gdt.limit); - qemu_fprintf(f, "IDT=3D %016" PRIx64 " %08x\n", - env->idt.base, env->idt.limit); - qemu_fprintf(f, "CR0=3D%08x CR2=3D%016" PRIx64 " CR3=3D%016" PRIx6= 4 " CR4=3D%08x\n", - (uint32_t)env->cr[0], - env->cr[2], - env->cr[3], - (uint32_t)env->cr[4]); + g_string_append_printf(buf, "GDT=3D %016" PRIx64 " %08x\n", + env->gdt.base, env->gdt.limit); + g_string_append_printf(buf, "IDT=3D %016" PRIx64 " %08x\n", + env->idt.base, env->idt.limit); + g_string_append_printf(buf, "CR0=3D%08x CR2=3D%016" PRIx64 + " CR3=3D%016" PRIx64 " CR4=3D%08x\n", + (uint32_t)env->cr[0], + env->cr[2], + env->cr[3], + (uint32_t)env->cr[4]); for(i =3D 0; i < 4; i++) - qemu_fprintf(f, "DR%d=3D%016" PRIx64 " ", i, env->dr[i]); - qemu_fprintf(f, "\nDR6=3D%016" PRIx64 " DR7=3D%016" PRIx64 "\n", - env->dr[6], env->dr[7]); + g_string_append_printf(buf, "DR%d=3D%016" PRIx64 " ", i, env->= dr[i]); + g_string_append_printf(buf, "\nDR6=3D%016" PRIx64 " DR7=3D%016" PR= Ix64 "\n", + env->dr[6], env->dr[7]); } else #endif { - qemu_fprintf(f, "GDT=3D %08x %08x\n", - (uint32_t)env->gdt.base, env->gdt.limit); - qemu_fprintf(f, "IDT=3D %08x %08x\n", - (uint32_t)env->idt.base, env->idt.limit); - qemu_fprintf(f, "CR0=3D%08x CR2=3D%08x CR3=3D%08x CR4=3D%08x\n", - (uint32_t)env->cr[0], - (uint32_t)env->cr[2], - (uint32_t)env->cr[3], - (uint32_t)env->cr[4]); + g_string_append_printf(buf, "GDT=3D %08x %08x\n", + (uint32_t)env->gdt.base, env->gdt.limit); + g_string_append_printf(buf, "IDT=3D %08x %08x\n", + (uint32_t)env->idt.base, env->idt.limit); + g_string_append_printf(buf, "CR0=3D%08x CR2=3D%08x CR3=3D%08x CR4= =3D%08x\n", + (uint32_t)env->cr[0], + (uint32_t)env->cr[2], + (uint32_t)env->cr[3], + (uint32_t)env->cr[4]); for(i =3D 0; i < 4; i++) { - qemu_fprintf(f, "DR%d=3D" TARGET_FMT_lx " ", i, env->dr[i]); + g_string_append_printf(buf, "DR%d=3D" TARGET_FMT_lx + " ", i, env->dr[i]); } - qemu_fprintf(f, "\nDR6=3D" TARGET_FMT_lx " DR7=3D" TARGET_FMT_lx "= \n", - env->dr[6], env->dr[7]); + g_string_append_printf(buf, "\nDR6=3D" TARGET_FMT_lx + " DR7=3D" TARGET_FMT_lx "\n", + env->dr[6], env->dr[7]); } if (flags & CPU_DUMP_CCOP) { if ((unsigned)env->cc_op < CC_OP_NB) @@ -464,18 +477,19 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int fl= ags) snprintf(cc_op_name, sizeof(cc_op_name), "[%d]", env->cc_op); #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { - qemu_fprintf(f, "CCS=3D%016" PRIx64 " CCD=3D%016" PRIx64 " CCO= =3D%-8s\n", - env->cc_src, env->cc_dst, - cc_op_name); + g_string_append_printf(buf, "CCS=3D%016" PRIx64 + " CCD=3D%016" PRIx64 " CCO=3D%-8s\n", + env->cc_src, env->cc_dst, + cc_op_name); } else #endif { - qemu_fprintf(f, "CCS=3D%08x CCD=3D%08x CCO=3D%-8s\n", - (uint32_t)env->cc_src, (uint32_t)env->cc_dst, - cc_op_name); + g_string_append_printf(buf, "CCS=3D%08x CCD=3D%08x CCO=3D%-8s\= n", + (uint32_t)env->cc_src, (uint32_t)env->c= c_dst, + cc_op_name); } } - qemu_fprintf(f, "EFER=3D%016" PRIx64 "\n", env->efer); + g_string_append_printf(buf, "EFER=3D%016" PRIx64 "\n", env->efer); if (flags & CPU_DUMP_FPU) { int fptag; const uint64_t avx512_mask =3D XSTATE_OPMASK_MASK | \ @@ -488,64 +502,68 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int fl= ags) fptag |=3D ((!env->fptags[i]) << i); } update_mxcsr_from_sse_status(env); - qemu_fprintf(f, "FCW=3D%04x FSW=3D%04x [ST=3D%d] FTW=3D%02x MXCSR= =3D%08x\n", - env->fpuc, - (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11, - env->fpstt, - fptag, - env->mxcsr); + g_string_append_printf( + buf, "FCW=3D%04x FSW=3D%04x [ST=3D%d] FTW=3D%02x MXCSR=3D%08x\= n", + env->fpuc, + (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11, + env->fpstt, + fptag, + env->mxcsr); for(i=3D0;i<8;i++) { CPU_LDoubleU u; u.d =3D env->fpregs[i].d; - qemu_fprintf(f, "FPR%d=3D%016" PRIx64 " %04x", - i, u.l.lower, u.l.upper); + g_string_append_printf(buf, "FPR%d=3D%016" PRIx64 " %04x", + i, u.l.lower, u.l.upper); if ((i & 1) =3D=3D 1) - qemu_fprintf(f, "\n"); + g_string_append_printf(buf, "\n"); else - qemu_fprintf(f, " "); + g_string_append_printf(buf, " "); } - if ((env->xcr0 & avx512_mask) =3D=3D avx512_mask) { /* XSAVE enabled AVX512 */ for (i =3D 0; i < NB_OPMASK_REGS; i++) { - qemu_fprintf(f, "Opmask%02d=3D%016"PRIx64"%s", i, - env->opmask_regs[i], ((i & 3) =3D=3D 3) ? "\n= " : " "); + g_string_append_printf(buf, "Opmask%02d=3D%016"PRIx64"%s",= i, + env->opmask_regs[i], + ((i & 3) =3D=3D 3) ? "\n" : " "); } =20 nb =3D (env->hflags & HF_CS64_MASK) ? 32 : 8; for (i =3D 0; i < nb; i++) { - qemu_fprintf(f, "ZMM%02d=3D%016"PRIx64" %016"PRIx64" %016"= PRIx64 - " %016"PRIx64" %016"PRIx64" %016"PRIx64 - " %016"PRIx64" %016"PRIx64"\n", - i, - env->xmm_regs[i].ZMM_Q(7), - env->xmm_regs[i].ZMM_Q(6), - env->xmm_regs[i].ZMM_Q(5), - env->xmm_regs[i].ZMM_Q(4), - env->xmm_regs[i].ZMM_Q(3), - env->xmm_regs[i].ZMM_Q(2), - env->xmm_regs[i].ZMM_Q(1), - env->xmm_regs[i].ZMM_Q(0)); + g_string_append_printf(buf, "ZMM%02d=3D%016"PRIx64 + " %016"PRIx64" %016"PRIx64 + " %016"PRIx64" %016"PRIx64" %016"PR= Ix64 + " %016"PRIx64" %016"PRIx64"\n", + i, + env->xmm_regs[i].ZMM_Q(7), + env->xmm_regs[i].ZMM_Q(6), + env->xmm_regs[i].ZMM_Q(5), + env->xmm_regs[i].ZMM_Q(4), + env->xmm_regs[i].ZMM_Q(3), + env->xmm_regs[i].ZMM_Q(2), + env->xmm_regs[i].ZMM_Q(1), + env->xmm_regs[i].ZMM_Q(0)); } } else if ((env->xcr0 & avx_mask) =3D=3D avx_mask) { /* XSAVE enabled AVX */ nb =3D env->hflags & HF_CS64_MASK ? 16 : 8; for (i =3D 0; i < nb; i++) { - qemu_fprintf(f, "YMM%02d=3D%016"PRIx64" %016"PRIx64" %016"= PRIx64 - " %016"PRIx64"\n", i, - env->xmm_regs[i].ZMM_Q(3), - env->xmm_regs[i].ZMM_Q(2), - env->xmm_regs[i].ZMM_Q(1), - env->xmm_regs[i].ZMM_Q(0)); + g_string_append_printf(buf, "YMM%02d=3D%016"PRIx64 + " %016"PRIx64" %016"PRIx64 + " %016"PRIx64"\n", i, + env->xmm_regs[i].ZMM_Q(3), + env->xmm_regs[i].ZMM_Q(2), + env->xmm_regs[i].ZMM_Q(1), + env->xmm_regs[i].ZMM_Q(0)); } } else { /* SSE and below cases */ nb =3D env->hflags & HF_CS64_MASK ? 16 : 8; for (i =3D 0; i < nb; i++) { - qemu_fprintf(f, "XMM%02d=3D%016"PRIx64" %016"PRIx64"%s", - i, - env->xmm_regs[i].ZMM_Q(1), - env->xmm_regs[i].ZMM_Q(0), - (i & 1) ? "\n" : " "); + g_string_append_printf(buf, + "XMM%02d=3D%016"PRIx64" %016"PRIx64= "%s", + i, + env->xmm_regs[i].ZMM_Q(1), + env->xmm_regs[i].ZMM_Q(0), + (i & 1) ? "\n" : " "); } } } @@ -555,16 +573,17 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int fl= ags) uint8_t code; char codestr[3]; =20 - qemu_fprintf(f, "Code=3D"); + g_string_append_printf(buf, "Code=3D"); for (i =3D 0; i < DUMP_CODE_BYTES_TOTAL; i++) { if (cpu_memory_rw_debug(cs, base - offs + i, &code, 1, 0) =3D= =3D 0) { snprintf(codestr, sizeof(codestr), "%02x", code); } else { snprintf(codestr, sizeof(codestr), "??"); } - qemu_fprintf(f, "%s%s%s%s", i > 0 ? " " : "", - i =3D=3D offs ? "<" : "", codestr, i =3D=3D offs = ? ">" : ""); + g_string_append_printf(buf, "%s%s%s%s", i > 0 ? " " : "", + i =3D=3D offs ? "<" : "", codestr, + i =3D=3D offs ? ">" : ""); } - qemu_fprintf(f, "\n"); + g_string_append_printf(buf, "\n"); } } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 97e250e876..f31a304abb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6757,7 +6757,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) cc->class_by_name =3D x86_cpu_class_by_name; cc->parse_features =3D x86_cpu_parse_featurestr; cc->has_work =3D x86_cpu_has_work; - cc->dump_state =3D x86_cpu_dump_state; + cc->format_state =3D x86_cpu_format_state; cc->set_pc =3D x86_cpu_set_pc; cc->gdb_read_register =3D x86_cpu_gdb_read_register; cc->gdb_write_register =3D x86_cpu_gdb_write_register; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 6c50d3ab4f..01ca4e715d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1821,7 +1821,7 @@ int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunctio= n f, CPUState *cpu, void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp); =20 -void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags); +void x86_cpu_format_state(CPUState *cs, GString *buf, int flags); =20 hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); --=20 2.31.1