From nobody Mon Apr 29 15:05:28 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=google.com ARC-Seal: i=1; a=rsa-sha256; t=1631057310; cv=none; d=zohomail.com; s=zohoarc; b=DSyjLmXkB4k+Iy8hBMfMiLnNPNbMZmqXJbwiBlSPVupkWp2eVzVk+YSl/gOptYXNi3/JBxnEbOSYQXJ+/83CSXhfztt+il7uoqifuvnuV93K9eU9gYU9rrhERPVlvHES167YYkgr3a/N3xy2ESOtqFnrbRUQAYHYVt10xTpQUoA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1631057310; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=hgo31a1Pu74o2wAfbf6NQnOyO4IeBKoFrlmKiTTXIcg=; b=aZ3Lssmg+h2d+LlVp9KuZBLT7c2dBC4q4B/mmsW1eXn0mXxeqZ9fQsqVChpnhaeowmnEiQzyeoXZiIRJf7LcBLRM2hyZyRaavSIOrdCq09s2zJ6Grc1owOKzO6VJjoiWkBg37gafUGzbR/f/WhOqG27DaWiyDGvFPrmaYKmPwkI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1631057310945258.50762705922955; Tue, 7 Sep 2021 16:28:30 -0700 (PDT) Received: from localhost ([::1]:58376 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mNkVx-0003Zk-Tc for importer@patchew.org; Tue, 07 Sep 2021 19:28:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48626) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <3JvU3YQgKCgExvibputihpphmf.dpnrfnv-efwfmopohov.psh@flex--wuhaotsh.bounces.google.com>) id 1mNkU8-0000Ig-Ah for qemu-devel@nongnu.org; Tue, 07 Sep 2021 19:26:36 -0400 Received: from mail-qv1-xf49.google.com ([2607:f8b0:4864:20::f49]:53087) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from <3JvU3YQgKCgExvibputihpphmf.dpnrfnv-efwfmopohov.psh@flex--wuhaotsh.bounces.google.com>) id 1mNkU3-00041I-VI for qemu-devel@nongnu.org; Tue, 07 Sep 2021 19:26:36 -0400 Received: by mail-qv1-xf49.google.com with SMTP id t12-20020ad45bcc000000b003772069d04aso680858qvt.19 for ; Tue, 07 Sep 2021 16:26:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=hgo31a1Pu74o2wAfbf6NQnOyO4IeBKoFrlmKiTTXIcg=; b=CXv7ziNFNqBMy7n3iUjV7elW7tjNqEc62rrJF/MqKqZLGwgSiv9/KKadqugGvoDrwm 0KhZaT6LN29FhNhkph4n6aexBVhai4c1gTwxkZ7YZozp2YOuJZs/vfG+3KdpUuPK3pS/ 0N9KUgyG/DsJ4yLDEJQSyCm4Ikq9z8TmbMnGEOMFrHSV0Cqy8lIa0WZpOjzinNbfT25Q eIzUbxiBl2eopBD5q3vqa1uvORB+gxzQV3sTMQuImahI8/4zohiJ2vFelIz56kN5PSYB D3V3eq5FJdX7eDl51PhYUz1A/bjs1pNw1CjpT/dkohYn8flmZP/ujEJHJi9jPgAXHWQU dUvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=hgo31a1Pu74o2wAfbf6NQnOyO4IeBKoFrlmKiTTXIcg=; b=XEdM9v+yA8Kds1gKzwGRb+fgKN28RA6pSUjxBNUlyEF5L0FUgKFMxEjk4CB1LNDPjd PHaOfcDh2HYckJhDTu3iQk1V+qngItaeMLWex/fx8ZfZ0dfK/u4xTN+sLrjslb2CgIjc j8RZdXIpnYcbu1iJH3Z09OOc271MjkesMhrlVSJEDTKYjvqW6+tnVgDiLbHrVRpstHlF G4o/2AshDjUIao4cL/2uTsqlw+FrFTMgi4NnzTSVzIiJN4pp88onT3nbzFcQeM8sbDzx wJPjfto7VIq2FWQ1o/7I0WEEMwQp04m2BmYCHbH0oEYIlnaAkmEMJK1feMWACmVD0fv7 P9oA== X-Gm-Message-State: AOAM530QPXloIl4AIQYeZ5/HR6LbPhntGYvGxXeuzNlkj9FszHA1qNI2 j0HBg0LNnY8KqQyxXNhPMbKV83nqA3I4Qw== X-Google-Smtp-Source: ABdhPJyFVTuZce6YTVnQ2CCbkek7W0ACQSkhkDL1wbN73TLk045l2crgOjOlUDqs75IkH6VEIKeCdKF/t9VqMw== X-Received: from mimik.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:4e]) (user=wuhaotsh job=sendgmr) by 2002:ad4:4667:: with SMTP id z7mr716120qvv.67.1631057190375; Tue, 07 Sep 2021 16:26:30 -0700 (PDT) Date: Tue, 7 Sep 2021 16:25:52 -0700 In-Reply-To: <20210907232555.3268967-1-wuhaotsh@google.com> Message-Id: <20210907232555.3268967-2-wuhaotsh@google.com> Mime-Version: 1.0 References: <20210907232555.3268967-1-wuhaotsh@google.com> X-Mailer: git-send-email 2.33.0.153.gba50c8fa24-goog Subject: [PATCH 1/4] tests/qtest/libqos: add SDHCI commands From: Hao Wu To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, wuhaotsh@google.com, venture@google.com, Avi.Fishman@nuvoton.com, kfting@nuvoton.com, hskinnemoen@google.com, f4bug@amsat.org, bin.meng@windriver.com, qemu-block@nongnu.org, Shengtan Mao , Chris Rauer Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f49; envelope-from=3JvU3YQgKCgExvibputihpphmf.dpnrfnv-efwfmopohov.psh@flex--wuhaotsh.bounces.google.com; helo=mail-qv1-xf49.google.com X-Spam_score_int: -76 X-Spam_score: -7.7 X-Spam_bar: ------- X-Spam_report: (-7.7 / 5.0 requ) DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1631057312482100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shengtan Mao Signed-off-by: Shengtan Mao Reviewed-by: Hao Wu Reviewed-by: Chris Rauer Reviewed-by: Tyrone Ting --- tests/qtest/libqos/meson.build | 1 + tests/qtest/libqos/sdhci-cmd.c | 116 +++++++++++++++++++++++++++++++++ tests/qtest/libqos/sdhci-cmd.h | 70 ++++++++++++++++++++ 3 files changed, 187 insertions(+) create mode 100644 tests/qtest/libqos/sdhci-cmd.c create mode 100644 tests/qtest/libqos/sdhci-cmd.h diff --git a/tests/qtest/libqos/meson.build b/tests/qtest/libqos/meson.build index 1f5c8f1053..4af1f04787 100644 --- a/tests/qtest/libqos/meson.build +++ b/tests/qtest/libqos/meson.build @@ -5,6 +5,7 @@ libqos_srcs =3D files('../libqtest.c', 'fw_cfg.c', 'malloc.c', 'libqos.c', + 'sdhci-cmd.c', =20 # spapr 'malloc-spapr.c', diff --git a/tests/qtest/libqos/sdhci-cmd.c b/tests/qtest/libqos/sdhci-cmd.c new file mode 100644 index 0000000000..2d9e518341 --- /dev/null +++ b/tests/qtest/libqos/sdhci-cmd.c @@ -0,0 +1,116 @@ +/* + * MMC Host Controller Commands + * + * Copyright (c) 2021 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" +#include "sdhci-cmd.h" +#include "libqtest.h" + +static ssize_t read_fifo(QTestState *qts, uint64_t reg, char *msg, size_t = count) +{ + uint32_t mask =3D 0xff; + size_t index =3D 0; + uint32_t msg_frag; + int size; + while (index < count) { + size =3D count - index; + if (size > 4) { + size =3D 4; + } + msg_frag =3D qtest_readl(qts, reg); + while (size > 0) { + msg[index] =3D msg_frag & mask; + if (msg[index++] =3D=3D 0) { + return index; + } + msg_frag >>=3D 8; + --size; + } + } + return index; +} + +static void write_fifo(QTestState *qts, uint64_t reg, const char *msg, + size_t count) +{ + size_t index =3D 0; + uint32_t msg_frag; + int size; + int frag_i; + while (index < count) { + size =3D count - index; + if (size > 4) { + size =3D 4; + } + msg_frag =3D 0; + frag_i =3D 0; + while (frag_i < size) { + msg_frag |=3D ((uint32_t)msg[index++]) << (frag_i * 8); + ++frag_i; + } + qtest_writel(qts, reg, msg_frag); + } +} + +static void fill_block(QTestState *qts, uint64_t reg, int count) +{ + while (--count >=3D 0) { + qtest_writel(qts, reg, 0); + } +} + +void sdhci_cmd_regs(QTestState *qts, uint64_t base_addr, uint16_t blksize, + uint16_t blkcnt, uint32_t argument, uint16_t trnmod, + uint16_t cmdreg) +{ + qtest_writew(qts, base_addr + SDHC_BLKSIZE, blksize); + qtest_writew(qts, base_addr + SDHC_BLKCNT, blkcnt); + qtest_writel(qts, base_addr + SDHC_ARGUMENT, argument); + qtest_writew(qts, base_addr + SDHC_TRNMOD, trnmod); + qtest_writew(qts, base_addr + SDHC_CMDREG, cmdreg); +} + +ssize_t sdhci_read_cmd(QTestState *qts, uint64_t base_addr, char *msg, + size_t count) +{ + sdhci_cmd_regs(qts, base_addr, count, 1, 0, + SDHC_TRNS_MULTI | SDHC_TRNS_READ | SDHC_TRNS_BLK_CNT_EN, + SDHC_READ_MULTIPLE_BLOCK | SDHC_CMD_DATA_PRESENT); + + /* read sd fifo_buffer */ + ssize_t bytes_read =3D read_fifo(qts, base_addr + SDHC_BDATA, msg, cou= nt); + + sdhci_cmd_regs(qts, base_addr, 0, 0, 0, + SDHC_TRNS_MULTI | SDHC_TRNS_READ | SDHC_TRNS_BLK_CNT_EN, + SDHC_STOP_TRANSMISSION); + + return bytes_read; +} + +void sdhci_write_cmd(QTestState *qts, uint64_t base_addr, const char *msg, + size_t count, size_t blksize) +{ + sdhci_cmd_regs(qts, base_addr, blksize, 1, 0, + SDHC_TRNS_MULTI | SDHC_TRNS_WRITE | SDHC_TRNS_BLK_CNT_E= N, + SDHC_WRITE_MULTIPLE_BLOCK | SDHC_CMD_DATA_PRESENT); + + /* write to sd fifo_buffer */ + write_fifo(qts, base_addr + SDHC_BDATA, msg, count); + fill_block(qts, base_addr + SDHC_BDATA, (blksize - count) / 4); + + sdhci_cmd_regs(qts, base_addr, 0, 0, 0, + SDHC_TRNS_MULTI | SDHC_TRNS_WRITE | SDHC_TRNS_BLK_CNT_E= N, + SDHC_STOP_TRANSMISSION); +} diff --git a/tests/qtest/libqos/sdhci-cmd.h b/tests/qtest/libqos/sdhci-cmd.h new file mode 100644 index 0000000000..64763c5a2a --- /dev/null +++ b/tests/qtest/libqos/sdhci-cmd.h @@ -0,0 +1,70 @@ +/* + * MMC Host Controller Commands + * + * Copyright (c) 2021 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "libqtest.h" + +/* more details at hw/sd/sdhci-internal.h */ +#define SDHC_BLKSIZE 0x04 +#define SDHC_BLKCNT 0x06 +#define SDHC_ARGUMENT 0x08 +#define SDHC_TRNMOD 0x0C +#define SDHC_CMDREG 0x0E +#define SDHC_BDATA 0x20 +#define SDHC_PRNSTS 0x24 +#define SDHC_BLKGAP 0x2A +#define SDHC_CLKCON 0x2C +#define SDHC_SWRST 0x2F +#define SDHC_CAPAB 0x40 +#define SDHC_MAXCURR 0x48 +#define SDHC_HCVER 0xFE + +/* TRNSMOD Reg */ +#define SDHC_TRNS_BLK_CNT_EN 0x0002 +#define SDHC_TRNS_READ 0x0010 +#define SDHC_TRNS_WRITE 0x0000 +#define SDHC_TRNS_MULTI 0x0020 + +/* CMD Reg */ +#define SDHC_CMD_DATA_PRESENT (1 << 5) +#define SDHC_ALL_SEND_CID (2 << 8) +#define SDHC_SEND_RELATIVE_ADDR (3 << 8) +#define SDHC_SELECT_DESELECT_CARD (7 << 8) +#define SDHC_SEND_CSD (9 << 8) +#define SDHC_STOP_TRANSMISSION (12 << 8) +#define SDHC_READ_MULTIPLE_BLOCK (18 << 8) +#define SDHC_WRITE_MULTIPLE_BLOCK (25 << 8) +#define SDHC_APP_CMD (55 << 8) + +/* SWRST Reg */ +#define SDHC_RESET_ALL 0x01 + +/* CLKCTRL Reg */ +#define SDHC_CLOCK_INT_EN 0x0001 +#define SDHC_CLOCK_INT_STABLE 0x0002 +#define SDHC_CLOCK_SDCLK_EN (1 << 2) + +/* Set registers needed to send commands to SD */ +void sdhci_cmd_regs(QTestState *qts, uint64_t base_addr, uint16_t blksize, + uint16_t blkcnt, uint32_t argument, uint16_t trnmod, + uint16_t cmdreg); + +/* Read at most 1 block of SD using non-DMA */ +ssize_t sdhci_read_cmd(QTestState *qts, uint64_t base_addr, char *msg, + size_t count); + +/* Write at most 1 block of SD using non-DMA */ +void sdhci_write_cmd(QTestState *qts, uint64_t base_addr, const char *msg, + size_t count, size_t blksize); --=20 2.33.0.153.gba50c8fa24-goog From nobody Mon Apr 29 15:05:28 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=google.com ARC-Seal: i=1; a=rsa-sha256; t=1631057473; cv=none; d=zohomail.com; s=zohoarc; b=EorG+yJ5DONr7v0pQiDV8MvEy+VkrWmnWv4AfLfYNwy4XMjCtL4cVtxqaGMzC9Yzy5sia8ftb19wBthrEI1NPSiRNS6AtkwPHegrsJR3P9OJuRmgOA6o8Jyt82wjGmqFJur/pI7Pajl9jPL5hcWf+4mx2kNW4dSDUyRvwYLHvhk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1631057473; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=REz7MoTH38epZxTahZPoruXDnwdeM0XS1sTeM2Kiju8=; b=UYf3rTDqgweqg2LWgRG0FjghMse2IeKgLr/8d2iEu2ufC8GOUu8+Oz7aPE4Og2pP5/dMQOhSJvZHsj1pt2jBukKXPDFjbx26haE3tOmOLAxwN9qJLM2LtdsbI4/hmE3e3VrORf5NaiYkFFEAdvK5IDr2bbdcc9AbsjPBjw+9cb0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1631057473326736.3864829281507; Tue, 7 Sep 2021 16:31:13 -0700 (PDT) Received: from localhost ([::1]:36308 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mNkYa-0007m2-AT for importer@patchew.org; Tue, 07 Sep 2021 19:31:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48734) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <3KPU3YQgKCgMzxkdrwvkjrrjoh.frpthpx-ghyhoqrqjqx.ruj@flex--wuhaotsh.bounces.google.com>) id 1mNkUB-0000UC-UX for qemu-devel@nongnu.org; Tue, 07 Sep 2021 19:26:39 -0400 Received: from mail-pf1-x44a.google.com ([2607:f8b0:4864:20::44a]:34488) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from <3KPU3YQgKCgMzxkdrwvkjrrjoh.frpthpx-ghyhoqrqjqx.ruj@flex--wuhaotsh.bounces.google.com>) id 1mNkU8-00042d-HY for qemu-devel@nongnu.org; Tue, 07 Sep 2021 19:26:39 -0400 Received: by mail-pf1-x44a.google.com with SMTP id a24-20020a62e218000000b003fdd5bdf6baso295678pfi.1 for ; Tue, 07 Sep 2021 16:26:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=REz7MoTH38epZxTahZPoruXDnwdeM0XS1sTeM2Kiju8=; b=n6DveWXQba8CuX974pJAEp4z1UG3fV3WMlA2pZ6IA29QuOdEA2MrLGnQYtuHWonJzV XiOBAV59vuJQCQH+M5FIWTh//H3CEVV1wPy/t6fvZ+jZnaxjHDIOCOzuaLSxoLiBW2yH JC5xgbUpPae7b4GX9o0ZeZipIkIkae2+b+8PscR0dBXjmL8EcESDGA2A42/flknSsv5U 2sseCXDW3KYQ7BwwoY7cj5BTA+Nt+G8fdAfheSuZ6rEvsUYtKz9Cfq2GFs+yIbYjCjhG poLZQPz6t+CDRtlxEQL95iDj6o9a9/aAD/xuNleFm1kunXOxsihQgElMWOCCKOP8SPAt huxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=REz7MoTH38epZxTahZPoruXDnwdeM0XS1sTeM2Kiju8=; b=rht7MnukEE/p3lDZWIYm8Fxo+CAev+Fz4YtfDnJAi+lK+DT6vnzG71tnLmb8my4SHc iehzmIhoFtyjQqy6aEp07oZlKf709Y2KsvY4uxbpXfUleVJjjjLdN2LLvlvQmst16dAZ lvEQHgS2UQIaPMdztDHpFRhLroRBCUZJS8eH3HhCKsVvVYB832rFdKAOxBMG/eDOCAUN qLw2qZGlSADBTRK8AmKCbM54ECJxyvlJ7iKP9zHRzoOXmKzjX64bXe9qIjn9JaanRiyf oUOWarhkvQiEwHOZ85QVa6UCbPVKNB59BK2lJhe0ZlBN4IPvhiIKfiD1YKZjaeZ3x1Ym H4Lg== X-Gm-Message-State: AOAM5339qZbf+X24A8Jsl78npraJJaK0zrCX/8ictGhVc+pm9MjM63Y1 XwAeP0nzXvDu1YMKgWPw2jjuLgppEkF1vA== X-Google-Smtp-Source: ABdhPJxI3cuPGRRVYjXSWG39Caaz7vDtx2mtdAfI1usOwxQkMa7KEMfG4UItGtNAVduHlBff0tp6FNP23bxJSQ== X-Received: from mimik.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:4e]) (user=wuhaotsh job=sendgmr) by 2002:a05:6a00:c91:b0:3ee:9bed:61be with SMTP id a17-20020a056a000c9100b003ee9bed61bemr660424pfv.37.1631057192097; Tue, 07 Sep 2021 16:26:32 -0700 (PDT) Date: Tue, 7 Sep 2021 16:25:53 -0700 In-Reply-To: <20210907232555.3268967-1-wuhaotsh@google.com> Message-Id: <20210907232555.3268967-3-wuhaotsh@google.com> Mime-Version: 1.0 References: <20210907232555.3268967-1-wuhaotsh@google.com> X-Mailer: git-send-email 2.33.0.153.gba50c8fa24-goog Subject: [PATCH 2/4] hw/sd: add nuvoton MMC From: Hao Wu To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, wuhaotsh@google.com, venture@google.com, Avi.Fishman@nuvoton.com, kfting@nuvoton.com, hskinnemoen@google.com, f4bug@amsat.org, bin.meng@windriver.com, qemu-block@nongnu.org, Shengtan Mao , Chris Rauer Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::44a; envelope-from=3KPU3YQgKCgMzxkdrwvkjrrjoh.frpthpx-ghyhoqrqjqx.ruj@flex--wuhaotsh.bounces.google.com; helo=mail-pf1-x44a.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1631057475087100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shengtan Mao Signed-off-by: Shengtan Mao Reviewed-by: Hao Wu Reviewed-by: Chris Rauer Reviewed-by: Tyrone Ting --- hw/arm/npcm7xx.c | 12 +++- hw/sd/meson.build | 1 + hw/sd/npcm7xx_sdhci.c | 131 ++++++++++++++++++++++++++++++++++ include/hw/arm/npcm7xx.h | 2 + include/hw/sd/npcm7xx_sdhci.h | 65 +++++++++++++++++ 5 files changed, 210 insertions(+), 1 deletion(-) create mode 100644 hw/sd/npcm7xx_sdhci.c create mode 100644 include/hw/sd/npcm7xx_sdhci.h diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index 2ab0080e0b..878c2208e0 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -63,6 +63,8 @@ #define NPCM7XX_ROM_BA (0xffff0000) #define NPCM7XX_ROM_SZ (64 * KiB) =20 +/* SDHCI Modules */ +#define NPCM7XX_MMC_BA (0xf0842000) =20 /* Clock configuration values to be fixed up when bypassing bootloader */ =20 @@ -83,6 +85,7 @@ enum NPCM7xxInterrupt { NPCM7XX_UART3_IRQ, NPCM7XX_EMC1RX_IRQ =3D 15, NPCM7XX_EMC1TX_IRQ, + NPCM7XX_MMC_IRQ =3D 26, NPCM7XX_TIMER0_IRQ =3D 32, /* Timer Module 0 */ NPCM7XX_TIMER1_IRQ, NPCM7XX_TIMER2_IRQ, @@ -443,6 +446,8 @@ static void npcm7xx_init(Object *obj) for (i =3D 0; i < ARRAY_SIZE(s->emc); i++) { object_initialize_child(obj, "emc[*]", &s->emc[i], TYPE_NPCM7XX_EM= C); } + + object_initialize_child(obj, "mmc", &s->mmc, TYPE_NPCM7XX_SDHCI); } =20 static void npcm7xx_realize(DeviceState *dev, Error **errp) @@ -707,6 +712,12 @@ static void npcm7xx_realize(DeviceState *dev, Error **= errp) &error_abort); memory_region_add_subregion(get_system_memory(), NPCM7XX_ROM_BA, &s->i= rom); =20 + /* SDHCI */ + sysbus_realize(SYS_BUS_DEVICE(&s->mmc), &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc), 0, NPCM7XX_MMC_BA); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc), 0, + npcm7xx_irq(s, NPCM7XX_MMC_IRQ)); + create_unimplemented_device("npcm7xx.shm", 0xc0001000, 4 * = KiB); create_unimplemented_device("npcm7xx.vdmx", 0xe0800000, 4 * = KiB); create_unimplemented_device("npcm7xx.pcierc", 0xe1000000, 64 * = KiB); @@ -736,7 +747,6 @@ static void npcm7xx_realize(DeviceState *dev, Error **e= rrp) create_unimplemented_device("npcm7xx.usbd[8]", 0xf0838000, 4 * = KiB); create_unimplemented_device("npcm7xx.usbd[9]", 0xf0839000, 4 * = KiB); create_unimplemented_device("npcm7xx.sd", 0xf0840000, 8 * = KiB); - create_unimplemented_device("npcm7xx.mmc", 0xf0842000, 8 * = KiB); create_unimplemented_device("npcm7xx.pcimbx", 0xf0848000, 512 * = KiB); create_unimplemented_device("npcm7xx.aes", 0xf0858000, 4 * = KiB); create_unimplemented_device("npcm7xx.des", 0xf0859000, 4 * = KiB); diff --git a/hw/sd/meson.build b/hw/sd/meson.build index f1ce357a3b..807ca07b7c 100644 --- a/hw/sd/meson.build +++ b/hw/sd/meson.build @@ -9,4 +9,5 @@ softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2x= x_mmci.c')) softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_sdhost.c')) softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_sdhci.c')) softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sdho= st.c')) +softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_sdhci.c')) softmmu_ss.add(when: 'CONFIG_CADENCE_SDHCI', if_true: files('cadence_sdhci= .c')) diff --git a/hw/sd/npcm7xx_sdhci.c b/hw/sd/npcm7xx_sdhci.c new file mode 100644 index 0000000000..85cccdc485 --- /dev/null +++ b/hw/sd/npcm7xx_sdhci.c @@ -0,0 +1,131 @@ +/* + * NPCM7xx SD-3.0 / eMMC-4.51 Host Controller + * + * Copyright (c) 2021 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" + +#include "hw/sd/npcm7xx_sdhci.h" +#include "sdhci-internal.h" + +static uint64_t npcm7xx_sdhci_read(void *opaque, hwaddr addr, unsigned int= size) +{ + NPCM7xxSDHCIState *s =3D opaque; + uint64_t val =3D 0; + + switch (addr) { + case NPCM7XX_PRSTVALS_0: + case NPCM7XX_PRSTVALS_1: + case NPCM7XX_PRSTVALS_2: + case NPCM7XX_PRSTVALS_3: + case NPCM7XX_PRSTVALS_4: + case NPCM7XX_PRSTVALS_5: + val =3D (uint64_t)s->regs.prstvals[(addr - NPCM7XX_PRSTVALS_0) / 2= ]; + break; + case NPCM7XX_BOOTTOCTRL: + val =3D (uint64_t)s->regs.boottoctrl; + break; + default: + val =3D (uint64_t)s->sdhci.io_ops->read(&s->sdhci, addr, size); + } + + return val; +} + +static void npcm7xx_sdhci_write(void *opaque, hwaddr addr, uint64_t val, + unsigned int size) +{ + NPCM7xxSDHCIState *s =3D opaque; + + switch (addr) { + case NPCM7XX_BOOTTOCTRL: + s->regs.boottoctrl =3D (uint32_t)val; + break; + default: + s->sdhci.io_ops->write(&s->sdhci, addr, val, size); + } +} + +static const MemoryRegionOps npcm7xx_sdhci_ops =3D { + .read =3D npcm7xx_sdhci_read, + .write =3D npcm7xx_sdhci_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid =3D {.min_access_size =3D 1, .max_access_size =3D 4, .unaligned= =3D false}, +}; + +static void npcm7xx_sdhci_realize(DeviceState *dev, Error **errp) +{ + NPCM7xxSDHCIState *s =3D NPCM7XX_SDHCI(dev); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); + SysBusDevice *sbd_sdhci =3D SYS_BUS_DEVICE(&s->sdhci); + + memory_region_init_io(&s->iomem, OBJECT(s), &npcm7xx_sdhci_ops, s, + TYPE_NPCM7XX_SDHCI, 0x1000); + sysbus_init_mmio(sbd, &s->iomem); + sysbus_realize(sbd_sdhci, errp); + + /* propagate irq and "sd-bus" from generic-sdhci */ + sysbus_pass_irq(sbd, sbd_sdhci); + s->bus =3D qdev_get_child_bus(DEVICE(sbd_sdhci), "sd-bus"); +} + +static void npcm7xx_sdhci_reset(DeviceState *dev) +{ + NPCM7xxSDHCIState *s =3D NPCM7XX_SDHCI(dev); + device_cold_reset(DEVICE(&s->sdhci)); + s->regs.boottoctrl =3D 0; + + s->sdhci.prnsts =3D NPCM7XX_PRSNTS_RESET; + s->sdhci.blkgap =3D NPCM7XX_BLKGAP_RESET; + s->sdhci.capareg =3D NPCM7XX_CAPAB_RESET; + s->sdhci.maxcurr =3D NPCM7XX_MAXCURR_RESET; + s->sdhci.version =3D NPCM7XX_HCVER_RESET; + + memset(s->regs.prstvals, 0, NPCM7XX_PRSTVALS_SIZE * sizeof(uint16_t)); + s->regs.prstvals[0] =3D NPCM7XX_PRSTVALS_0_RESET; + s->regs.prstvals[1] =3D NPCM7XX_PRSTVALS_1_RESET; + s->regs.prstvals[3] =3D NPCM7XX_PRSTVALS_3_RESET; +} + +static void npcm7xx_sdhci_class_init(ObjectClass *classp, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(classp); + + dc->desc =3D "NPCM7xx SD/eMMC Host Controller"; + dc->realize =3D npcm7xx_sdhci_realize; + dc->reset =3D npcm7xx_sdhci_reset; +} + +static void npcm7xx_sdhci_instance_init(Object *obj) +{ + NPCM7xxSDHCIState *s =3D NPCM7XX_SDHCI(obj); + + object_initialize_child(OBJECT(s), "generic-sdhci", &s->sdhci, + TYPE_SYSBUS_SDHCI); +} + +static TypeInfo npcm7xx_sdhci_info =3D { + .name =3D TYPE_NPCM7XX_SDHCI, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(NPCM7xxSDHCIState), + .instance_init =3D npcm7xx_sdhci_instance_init, + .class_init =3D npcm7xx_sdhci_class_init, +}; + +static void npcm7xx_sdhci_register_types(void) +{ + type_register_static(&npcm7xx_sdhci_info); +} + +type_init(npcm7xx_sdhci_register_types) diff --git a/include/hw/arm/npcm7xx.h b/include/hw/arm/npcm7xx.h index 61ecc57ab9..ce593235d9 100644 --- a/include/hw/arm/npcm7xx.h +++ b/include/hw/arm/npcm7xx.h @@ -35,6 +35,7 @@ #include "hw/usb/hcd-ehci.h" #include "hw/usb/hcd-ohci.h" #include "target/arm/cpu.h" +#include "hw/sd/npcm7xx_sdhci.h" =20 #define NPCM7XX_MAX_NUM_CPUS (2) =20 @@ -103,6 +104,7 @@ typedef struct NPCM7xxState { OHCISysBusState ohci; NPCM7xxFIUState fiu[2]; NPCM7xxEMCState emc[2]; + NPCM7xxSDHCIState mmc; } NPCM7xxState; =20 #define TYPE_NPCM7XX "npcm7xx" diff --git a/include/hw/sd/npcm7xx_sdhci.h b/include/hw/sd/npcm7xx_sdhci.h new file mode 100644 index 0000000000..4d132f521b --- /dev/null +++ b/include/hw/sd/npcm7xx_sdhci.h @@ -0,0 +1,65 @@ +/* + * NPCM7xx SD-3.0 / eMMC-4.51 Host Controller + * + * Copyright (c) 2021 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#ifndef NPCM7XX_SDHCI_H +#define NPCM7XX_SDHCI_H + +#include "hw/sd/sdhci.h" +#include "qom/object.h" + +#define TYPE_NPCM7XX_SDHCI "npcm7xx.sdhci" +#define NPCM7XX_REG_SIZE 0x100 + +#define NPCM7XX_PRSTVALS_SIZE 6 +#define NPCM7XX_PRSTVALS 0x60 +#define NPCM7XX_PRSTVALS_0 0x60 +#define NPCM7XX_PRSTVALS_1 0x62 +#define NPCM7XX_PRSTVALS_2 0x64 +#define NPCM7XX_PRSTVALS_3 0x66 +#define NPCM7XX_PRSTVALS_4 0x68 +#define NPCM7XX_PRSTVALS_5 0x6A +#define NPCM7XX_BOOTTOCTRL 0x70 + +#define NPCM7XX_PRSNTS_RESET 0x04A00000 +#define NPCM7XX_BLKGAP_RESET 0x80 +#define NPCM7XX_CAPAB_RESET 0x0100200161EE0399 +#define NPCM7XX_MAXCURR_RESET 0x0000000000000005 +#define NPCM7XX_HCVER_RESET 0x1002 + +#define NPCM7XX_PRSTVALS_0_RESET 0x0040 +#define NPCM7XX_PRSTVALS_1_RESET 0x0001 +#define NPCM7XX_PRSTVALS_3_RESET 0x0001 + +OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxSDHCIState, NPCM7XX_SDHCI) + +typedef struct NPCM7xxRegs { + /* Preset Values Register Field, read-only */ + uint16_t prstvals[NPCM7XX_PRSTVALS_SIZE]; + /* Boot Timeout Control Register, read-write */ + uint32_t boottoctrl; +} NPCM7xxRegisters; + +typedef struct NPCM7xxSDHCIState { + SysBusDevice parent; + + MemoryRegion iomem; + BusState *bus; + NPCM7xxRegisters regs; + + SDHCIState sdhci; +} NPCM7xxSDHCIState; + +#endif /* NPCM7XX_SDHCI_H */ --=20 2.33.0.153.gba50c8fa24-goog From nobody Mon Apr 29 15:05:28 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=google.com ARC-Seal: i=1; a=rsa-sha256; t=1631057292; cv=none; d=zohomail.com; s=zohoarc; b=P5ENC4GTcf3i3pJPFozc/3okAVC7lMgqv7IY8IcYLp4+ksRScx4Sm8ECuQ42Tnn4HjrzSV3na+F5VzfMDyuVs71/8Mj6PFxj7BqZk2qVoBcJ+0MfuatTbNVPHisyGPpGj6mMC/jAd4uhJTaZXZ4b4zK31qYajQcgbGk7Hx4a7dY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1631057292; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=zsaZyxSC/g90JPwTp+9hoBfFf0HUoTXG7Um9NUxoKAE=; b=gak794P6qA/InK73pl72BySKTuADhVbTC8ObTyVC3FKQy4jDNLx1RX+MvFPB/TMDE5aLTS8pktUrgA576b+NnovGx74v/C4+B65kTcEHopNXYmE5DxNFL/wXUg57qrw/KSLKLdg/HZWThdEuxVJgl0N/1cNG+QdKCbYVxgLHuSg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1631057292845648.858988929988; Tue, 7 Sep 2021 16:28:12 -0700 (PDT) Received: from localhost ([::1]:57374 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mNkVf-0002vP-Nh for importer@patchew.org; Tue, 07 Sep 2021 19:28:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48688) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <3KfU3YQgKCgQ0ylesxwlksskpi.gsquiqy-hiziprsrkry.svk@flex--wuhaotsh.bounces.google.com>) id 1mNkUA-0000Nf-0h for qemu-devel@nongnu.org; Tue, 07 Sep 2021 19:26:38 -0400 Received: from mail-yb1-xb4a.google.com ([2607:f8b0:4864:20::b4a]:34811) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from <3KfU3YQgKCgQ0ylesxwlksskpi.gsquiqy-hiziprsrkry.svk@flex--wuhaotsh.bounces.google.com>) id 1mNkU8-00043n-IN for qemu-devel@nongnu.org; Tue, 07 Sep 2021 19:26:37 -0400 Received: by mail-yb1-xb4a.google.com with SMTP id v66-20020a25abc8000000b0059ef57c3386so228615ybi.1 for ; Tue, 07 Sep 2021 16:26:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=zsaZyxSC/g90JPwTp+9hoBfFf0HUoTXG7Um9NUxoKAE=; b=iy9MB6gaYhfMakYshG14jsJ2nK2RiQi8lsCdJS0dXT617XjL4VKBKz7XYnlDlVF0Z+ HzT150RIjCCKVODAXJuM6TXS4K9g4HQ8ErmNMhpzsPiZWR8kfgTwvSttTKGjDjjSMslc LnkqSB4oRbt4ijx9YVDNF44W0BBP7lg0V2C7VqlHW4WWqI0sK61N1DYK4Q829gVLvvdV zMrxY6J74IZTXDFX68dGd3u1ZDvXWQqxggueno6BSZpG/l+fBL32IBYo5yDm+T3989Vj VjXDD17s6Uxltuw2pK4ecxcvw4LpmRZJPD0ajQvhAVF2R/DlxawThcpd+v22+itlADqC UKsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=zsaZyxSC/g90JPwTp+9hoBfFf0HUoTXG7Um9NUxoKAE=; b=ntpvL8ziToCRGO4iVnDvSc/LQGVbnvmL78sM1iUMN/gRE0aCRsxlznjNMCzZ44/Tgt XlR/gvF0RdmoDzzwUCGWJ58Rmy7EO8ac96P5mdzAq4GQs0f8+eUWNFwNZHBBhS3lbObx /X9zOsml13Q1i7aqXCG9p+5eFf87TCfrRzJ1RCH9pTx72/1RR/2Yo0sML0QwwLY4n2qw IGE73Zxpaf/kqrcpRgymd5ysOjd1TnMgAcRfCmaJsSeoL3oEJkiDGVJLRn8V7Z1X9RxP W5hiuylTvL/q1/ht7nmWin20NcRoNqe/bAehhspgazX2iAWm0CNSS/WNeTSgNivwHIr8 77Gg== X-Gm-Message-State: AOAM530TehuHWLfArb2CNDxYwN7DAkyF5zKRJQq/J+Le786JSPGU9oeg O2G95e09oO/WPBLK1Y6zf6BchE1MlwH5sQ== X-Google-Smtp-Source: ABdhPJyclzLHrPLC7g8LdwIHpedomzjnVT6pPCbrwdRcaKE10R7Yy7NbEx9pMZs5IaisuFRBooeIAtUtb1o3zA== X-Received: from mimik.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:4e]) (user=wuhaotsh job=sendgmr) by 2002:a5b:408:: with SMTP id m8mr1182359ybp.2.1631057193753; Tue, 07 Sep 2021 16:26:33 -0700 (PDT) Date: Tue, 7 Sep 2021 16:25:54 -0700 In-Reply-To: <20210907232555.3268967-1-wuhaotsh@google.com> Message-Id: <20210907232555.3268967-4-wuhaotsh@google.com> Mime-Version: 1.0 References: <20210907232555.3268967-1-wuhaotsh@google.com> X-Mailer: git-send-email 2.33.0.153.gba50c8fa24-goog Subject: [PATCH 3/4] hw/arm: Attach MMC to quanta-gbs-bmc From: Hao Wu To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, wuhaotsh@google.com, venture@google.com, Avi.Fishman@nuvoton.com, kfting@nuvoton.com, hskinnemoen@google.com, f4bug@amsat.org, bin.meng@windriver.com, qemu-block@nongnu.org, Shengtan Mao Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::b4a; envelope-from=3KfU3YQgKCgQ0ylesxwlksskpi.gsquiqy-hiziprsrkry.svk@flex--wuhaotsh.bounces.google.com; helo=mail-yb1-xb4a.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1631057293708100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shengtan Mao Signed-off-by: Shengtan Mao Reviewed-by: Hao Wu Reviewed-by: Tyrone Ting Reviewed-by: Peter Maydell --- hw/arm/npcm7xx_boards.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c index e5a3243995..7205483280 100644 --- a/hw/arm/npcm7xx_boards.c +++ b/hw/arm/npcm7xx_boards.c @@ -27,6 +27,10 @@ #include "qemu-common.h" #include "qemu/datadir.h" #include "qemu/units.h" +#include "sysemu/blockdev.h" +#include "sysemu/sysemu.h" +#include "sysemu/block-backend.h" + =20 #define NPCM750_EVB_POWER_ON_STRAPS 0x00001ff7 #define QUANTA_GSJ_POWER_ON_STRAPS 0x00001fff @@ -80,6 +84,22 @@ static void npcm7xx_connect_dram(NPCM7xxState *soc, Memo= ryRegion *dram) &error_abort); } =20 +static void sdhci_attach_drive(SDHCIState *sdhci) +{ + DriveInfo *di =3D drive_get_next(IF_SD); + BlockBackend *blk =3D di ? blk_by_legacy_dinfo(di) : NULL; + + BusState *bus =3D qdev_get_child_bus(DEVICE(sdhci), "sd-bus"); + if (bus =3D=3D NULL) { + error_report("No SD bus found in SOC object"); + exit(1); + } + + DeviceState *carddev =3D qdev_new(TYPE_SD_CARD); + qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal); + qdev_realize_and_unref(carddev, bus, &error_fatal); +} + static NPCM7xxState *npcm7xx_create_soc(MachineState *machine, uint32_t hw_straps) { @@ -354,6 +374,7 @@ static void quanta_gbs_init(MachineState *machine) drive_get(IF_MTD, 0, 0)); =20 quanta_gbs_i2c_init(soc); + sdhci_attach_drive(&soc->mmc.sdhci); npcm7xx_load_kernel(machine, soc); } =20 --=20 2.33.0.153.gba50c8fa24-goog From nobody Mon Apr 29 15:05:28 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=google.com ARC-Seal: i=1; a=rsa-sha256; t=1631057452; cv=none; d=zohomail.com; s=zohoarc; b=mod3qJjqPSUWy6AfKb9ZNqYkZC2BixW9MM1ql30yF6PiN84/JJrP6DU/7lnvyAKZyUwxYAlsqA9cr8ZeBrkUcbTI2b4ZFfkM/Cv+NxAAP1XysebjNgm0mgqkTF+XLOx/pf2XpxwYbdPlNjeb9D1iONeZroluKgJfcmU1iJx+b7E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1631057452; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9xim941WBnIcXYlQ9IFTFIRwBApRHpg14MxJtUOAHZE=; b=HUz8V4nrwR2Vip8OndX5o/XUqFSXgwGGkz33xByZaCRE9OQOmJ9V6f/YZW04y/n355YSnbQIW+Bg6RCZH+K0VbPYB5yUHiG0r63WMu0cmxqy1WAFgSO5FcsTwb48wkSWwKZY77dKatpXBvjaZDPkSgEORs/KGj9YK++OnQ8GqHI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 163105745284039.293074698086116; Tue, 7 Sep 2021 16:30:52 -0700 (PDT) Received: from localhost ([::1]:35764 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mNkYF-0007JP-Tg for importer@patchew.org; Tue, 07 Sep 2021 19:30:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48770) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <3K_U3YQgKCgY20nguzynmuumrk.iuswks0-jk1krtutmt0.uxm@flex--wuhaotsh.bounces.google.com>) id 1mNkUD-0000YI-6O for qemu-devel@nongnu.org; Tue, 07 Sep 2021 19:26:41 -0400 Received: from mail-pj1-x1049.google.com ([2607:f8b0:4864:20::1049]:48657) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from <3K_U3YQgKCgY20nguzynmuumrk.iuswks0-jk1krtutmt0.uxm@flex--wuhaotsh.bounces.google.com>) id 1mNkU9-000447-8D for qemu-devel@nongnu.org; Tue, 07 Sep 2021 19:26:40 -0400 Received: by mail-pj1-x1049.google.com with SMTP id 41-20020a17090a0fac00b00195a5a61ab8so133513pjz.3 for ; Tue, 07 Sep 2021 16:26:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=9xim941WBnIcXYlQ9IFTFIRwBApRHpg14MxJtUOAHZE=; b=qQnUsgGZS6cn5DLJBsCfICuguycywVHRgDJBZZ/kkzFb6JMhtBAjmhPKVAdx6fL10e jq6bPWcjF8LdiQ345UkUhz7JPipNX23pezDcrij7DT0PZFCit1y34IJ5s+Py+8Syy7kF 2O4lO90n3XrcoeDjGPpE7T1gxCKLPE5aMw0kj2giP+a4m9uobCFvUDkabf1Gsdjbp5Vu 2bwjwf+Y22G6wFuhM4s3L+gQSFWHI9keuAYv/OHurJ3QHuMo9xN4mNlKNsR25Ywjl/uv O8twK7MnXqx8uzBxLK6pf6IV/DraoDbSWE4LaeByphxabdwHoMlaNcRAW2OEexa16rPQ VgAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=9xim941WBnIcXYlQ9IFTFIRwBApRHpg14MxJtUOAHZE=; b=SZGVGTejjApFNXWbf5k/BxsM0y/metAGr19mvkkXbQtvNKYuMlhhmYGgI3BTrgaQzq 0hU785c0nXy6V0REqwETH0SWm5dhSUOB1oHHewmoJo4VKtdleMyPKpGhKLNx+cIJgnu9 zaU14pR0beGpBVoO1bfNy36ekTQx+q99Sj5zLAN42STyp6LfI3smA60f7fQAUtWYkYqK n7Il1QaDkGycmYnS/TfRPYSuCyUQom0tht+atRhmeI0HhWDe/3MGy64Uvi/LH/aFHC6i aMslrqWIwbbVJpWfBkwDGXPjhmzBnG/Itc9ATYlbdKqzCOAN6zMb/wk6PivZSNO5o7GO 8r9Q== X-Gm-Message-State: AOAM530GW3b1O6MpHJIZlZuoCcmySa3+5j4DDDGUhTv6G0gULzky4OC6 spJx977BglkX36EbOfv6hKCZj0VyH45ZNg== X-Google-Smtp-Source: ABdhPJy14cnAYhMPTGAOkLKMzVnPKy/oO6YU+mjBpuSLDToy296UIXcvvamjys7q2NB9gyIWMXsF+tn+H9UP2A== X-Received: from mimik.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:4e]) (user=wuhaotsh job=sendgmr) by 2002:a17:902:6508:b0:139:f0fd:ca8 with SMTP id b8-20020a170902650800b00139f0fd0ca8mr473359plk.5.1631057195194; Tue, 07 Sep 2021 16:26:35 -0700 (PDT) Date: Tue, 7 Sep 2021 16:25:55 -0700 In-Reply-To: <20210907232555.3268967-1-wuhaotsh@google.com> Message-Id: <20210907232555.3268967-5-wuhaotsh@google.com> Mime-Version: 1.0 References: <20210907232555.3268967-1-wuhaotsh@google.com> X-Mailer: git-send-email 2.33.0.153.gba50c8fa24-goog Subject: [PATCH 4/4] tests/qtest: add qtests for npcm7xx sdhci From: Hao Wu To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, wuhaotsh@google.com, venture@google.com, Avi.Fishman@nuvoton.com, kfting@nuvoton.com, hskinnemoen@google.com, f4bug@amsat.org, bin.meng@windriver.com, qemu-block@nongnu.org, Shengtan Mao , Chris Rauer Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1049; envelope-from=3K_U3YQgKCgY20nguzynmuumrk.iuswks0-jk1krtutmt0.uxm@flex--wuhaotsh.bounces.google.com; helo=mail-pj1-x1049.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1631057453596100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shengtan Mao Signed-off-by: Shengtan Mao Reviewed-by: Hao Wu Reviewed-by: Chris Rauer Reviewed-by: Tyrone Ting --- tests/qtest/meson.build | 1 + tests/qtest/npcm7xx_sdhci-test.c | 201 +++++++++++++++++++++++++++++++ 2 files changed, 202 insertions(+) create mode 100644 tests/qtest/npcm7xx_sdhci-test.c diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 757bb8499a..ef9c904779 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -157,6 +157,7 @@ qtests_npcm7xx =3D \ 'npcm7xx_gpio-test', 'npcm7xx_pwm-test', 'npcm7xx_rng-test', + 'npcm7xx_sdhci-test', 'npcm7xx_smbus-test', 'npcm7xx_timer-test', 'npcm7xx_watchdog_timer-test'] + \ diff --git a/tests/qtest/npcm7xx_sdhci-test.c b/tests/qtest/npcm7xx_sdhci-t= est.c new file mode 100644 index 0000000000..5c4e78fda4 --- /dev/null +++ b/tests/qtest/npcm7xx_sdhci-test.c @@ -0,0 +1,201 @@ +/* + * QTests for NPCM7xx SD-3.0 / MMC-4.51 Host Controller + * + * Copyright (c) 2021 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" +#include "hw/sd/npcm7xx_sdhci.h" + +#include "libqos/libqtest.h" +#include "libqtest-single.h" +#include "libqos/sdhci-cmd.h" + +#define NPCM7XX_MMC_BA 0xF0842000 +#define NPCM7XX_BLK_SIZE 512 +#define NPCM7XX_TEST_IMAGE_SIZE (1 << 30) + +char *sd_path; + +static QTestState *setup_sd_card(void) +{ + QTestState *qts =3D qtest_initf( + "-machine quanta-gbs-bmc " + "-device sd-card,drive=3Ddrive0 " + "-drive id=3Ddrive0,if=3Dnone,file=3D%s,format=3Draw,auto-read-onl= y=3Doff", + sd_path); + + qtest_writew(qts, NPCM7XX_MMC_BA + SDHC_SWRST, SDHC_RESET_ALL); + qtest_writew(qts, NPCM7XX_MMC_BA + SDHC_CLKCON, + SDHC_CLOCK_SDCLK_EN | SDHC_CLOCK_INT_STABLE | + SDHC_CLOCK_INT_EN); + sdhci_cmd_regs(qts, NPCM7XX_MMC_BA, 0, 0, 0, 0, SDHC_APP_CMD); + sdhci_cmd_regs(qts, NPCM7XX_MMC_BA, 0, 0, 0x41200000, 0, (41 << 8)); + sdhci_cmd_regs(qts, NPCM7XX_MMC_BA, 0, 0, 0, 0, SDHC_ALL_SEND_CID); + sdhci_cmd_regs(qts, NPCM7XX_MMC_BA, 0, 0, 0, 0, SDHC_SEND_RELATIVE_ADD= R); + sdhci_cmd_regs(qts, NPCM7XX_MMC_BA, 0, 0, 0x45670000, 0, + SDHC_SELECT_DESELECT_CARD); + + return qts; +} + +static void write_sdread(QTestState *qts, const char *msg) +{ + size_t len =3D strlen(msg); + char *rmsg =3D g_malloc(len); + + /* write message to sd */ + int fd =3D open(sd_path, O_WRONLY); + int ret =3D write(fd, msg, len); + close(fd); + g_assert(ret =3D=3D len); + + /* read message using sdhci */ + ret =3D sdhci_read_cmd(qts, NPCM7XX_MMC_BA, rmsg, len); + g_assert(ret =3D=3D len); + g_assert(!strcmp(rmsg, msg)); + + free(rmsg); +} + +/* Check MMC can read values from sd */ +static void test_read_sd(void) +{ + QTestState *qts =3D setup_sd_card(); + + write_sdread(qts, "hello world"); + write_sdread(qts, "goodbye"); + + qtest_quit(qts); +} + +static void sdwrite_read(QTestState *qts, const char *msg) +{ + size_t len =3D strlen(msg); + char *rmsg =3D g_malloc(len); + + /* write message using sdhci */ + sdhci_write_cmd(qts, NPCM7XX_MMC_BA, msg, len, NPCM7XX_BLK_SIZE); + + /* read message from sd */ + int fd =3D open(sd_path, O_RDONLY); + int ret =3D read(fd, rmsg, len); + close(fd); + g_assert(ret =3D=3D len); + + g_assert(!strcmp(rmsg, msg)); + + free(rmsg); +} + +/* Check MMC can write values to sd */ +static void test_write_sd(void) +{ + QTestState *qts =3D setup_sd_card(); + + sdwrite_read(qts, "hello world"); + sdwrite_read(qts, "goodbye"); + + qtest_quit(qts); +} + +/* Check SDHCI has correct default values. */ +static void test_reset(void) +{ + QTestState *qts =3D qtest_init("-machine quanta-gbs-bmc"); + + uint64_t addr =3D NPCM7XX_MMC_BA; + uint64_t end_addr =3D addr + NPCM7XX_REG_SIZE; + uint16_t prstvals_resets[] =3D {NPCM7XX_PRSTVALS_0_RESET, + NPCM7XX_PRSTVALS_1_RESET, + 0, + NPCM7XX_PRSTVALS_3_RESET, + 0, + 0}; + int i; + uint32_t mask; + while (addr < end_addr) { + switch (addr - NPCM7XX_MMC_BA) { + case SDHC_PRNSTS: + /* ignores bits 20 to 24: they are changed when reading regist= ers */ + mask =3D 0x1f00000; + g_assert_cmphex(qtest_readl(qts, addr) | mask, =3D=3D, + NPCM7XX_PRSNTS_RESET | mask); + addr +=3D 4; + break; + case SDHC_BLKGAP: + g_assert_cmphex(qtest_readb(qts, addr), =3D=3D, NPCM7XX_BLKGAP= _RESET); + addr +=3D 1; + break; + case SDHC_CAPAB: + g_assert_cmphex(qtest_readq(qts, addr), =3D=3D, NPCM7XX_CAPAB_= RESET); + addr +=3D 8; + break; + case SDHC_MAXCURR: + g_assert_cmphex(qtest_readq(qts, addr), =3D=3D, NPCM7XX_MAXCUR= R_RESET); + addr +=3D 8; + break; + case SDHC_HCVER: + g_assert_cmphex(qtest_readw(qts, addr), =3D=3D, NPCM7XX_HCVER_= RESET); + addr +=3D 2; + break; + case NPCM7XX_PRSTVALS: + for (i =3D 0; i < NPCM7XX_PRSTVALS_SIZE; ++i) { + g_assert_cmphex(qtest_readw(qts, addr + 2 * i), =3D=3D, + prstvals_resets[i]); + } + addr +=3D NPCM7XX_PRSTVALS_SIZE * 2; + break; + default: + g_assert_cmphex(qtest_readb(qts, addr), =3D=3D, 0); + addr +=3D 1; + } + } + + qtest_quit(qts); +} + +static void drive_destroy(void) +{ + unlink(sd_path); + g_free(sd_path); +} + +static void drive_create(void) +{ + int fd, ret; + sd_path =3D g_strdup("/tmp/qtest.XXXXXX"); + + /* Create a temporary raw image */ + fd =3D mkstemp(sd_path); + g_assert_cmpint(fd, >=3D, 0); + ret =3D ftruncate(fd, NPCM7XX_TEST_IMAGE_SIZE); + g_assert_cmpint(ret, =3D=3D, 0); + g_message("%s", sd_path); + close(fd); +} + +int main(int argc, char **argv) +{ + drive_create(); + + g_test_init(&argc, &argv, NULL); + + qtest_add_func("npcm7xx_sdhci/reset", test_reset); + qtest_add_func("npcm7xx_sdhci/write_sd", test_write_sd); + qtest_add_func("npcm7xx_sdhci/read_sd", test_read_sd); + + int ret =3D g_test_run(); + drive_destroy(); + return ret; +} --=20 2.33.0.153.gba50c8fa24-goog