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[83.52.55.21]) by smtp.gmail.com with ESMTPSA id u23sm136370wmc.24.2021.09.03.11.19.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Sep 2021 11:19:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=k3EjGTKaI5g2mQLOHoezT/qbWejrZejERiPKCtXq8gw=; b=ojXrCIeyfH+YVO9iz1+TNZ9ezRMcW6h0jHjOAtJni4y0ai5GgfLbbVKAXjbpWwN84L Wm56dutgcXCYft6ubwqE6izEV7rcqTas8IDw2060mRAfdL2U6dvcLmlcGNbagstYZVSf jve/9McQZrfnans26GBi94oDOXS/nSfcjfw8rvKdqsA1IniKQVKQQbc7TUA0wMVS7nvT TBnmW1VCvwKuQQGF8INVzA1baogQfGV8Cas8UMEOVGUt7odj+mlXP4aVg2IUpEe1kmu8 QYWmHgIkGuFnhk+83UH6zljZXUsTAJP42n6FB7tIoIdWXO+avlqow18bOmY8gb6Phemw R0jQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=k3EjGTKaI5g2mQLOHoezT/qbWejrZejERiPKCtXq8gw=; b=nyE5JV+AaiYrmBMAA9/lrS96//qWm/zqiC/VWLNs0FA0jDsR51J6ELASby6knYZ+Ea yY7q3gpUtiq4mRnY4Lmx5SRe62CyY74h9wyOHEWcJElSgokACy7mqiMRiGeC9ylQSBSr DfGYvB93WkFe1fTp2848bY0w2YVPNgbe8GD6gHziJliWWRuW2Odv+mb4UvSl5pq2c4vM 4df/QgbGl/oQZRMQMemrPOp2q+jZqKJhSx1oRSPxThyJS4/AZdgQACf3AxvNO9V42+sW nuHs1fHYmTDuwP8lFYt87pLlvXQEl3gIXJlh/ZPx9k8vJtPfRno1KNB0Cey3G0TcpFH6 TIVA== X-Gm-Message-State: AOAM533hT3s/+kuOfj6TPu37Lp1eGbTQ297JQOyoKX0ZMYGyx1oja4A4 XDXOWuWz53oOCeypUvSPnfg= X-Google-Smtp-Source: ABdhPJx0dZCgp0zUQLbWfMU8EmsUBXRCSeLlfDHicQVXCHRyEM3DqNc6Zbv9ZU3Q+HTVaH2wLnC6rg== X-Received: by 2002:a5d:5642:: with SMTP id j2mr433139wrw.264.1630693196710; Fri, 03 Sep 2021 11:19:56 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Anthony Perard , Cameron Esfahani , Claudio Fontana , Colin Xu , Eduardo Habkost , haxm-team@intel.com, Kamil Rytarowski , Laurent Vivier , Paolo Bonzini , Paul Durrant , Reinoud Zandijk , Roman Bolshakov , Stefano Stabellini , Thomas Huth , Wenchao Wang , xen-devel@lists.xenproject.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 30/30] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one Date: Fri, 3 Sep 2021 20:19:43 +0200 Message-Id: <20210903181943.763360-1-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210902161543.417092-1-f4bug@amsat.org> References: <20210902161543.417092-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1630693199651100001 cpu_common_has_work() is the default has_work() implementation and returns 'false'. Explicit it for the QTest / HAX / HVF / NVMM / Xen accelerators and remove cpu_common_has_work(). Since there are no more implementations of SysemuCPUOps::has_work, remove it along with the assertion in cpu_has_work(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Paul Durrant Reviewed-by: Richard Henderson --- include/hw/core/cpu.h | 2 -- accel/hvf/hvf-accel-ops.c | 6 ++++++ accel/qtest/qtest.c | 6 ++++++ accel/xen/xen-all.c | 6 ++++++ hw/core/cpu-common.c | 6 ------ softmmu/cpus.c | 9 ++------- target/i386/hax/hax-accel-ops.c | 6 ++++++ target/i386/nvmm/nvmm-accel-ops.c | 6 ++++++ 8 files changed, 32 insertions(+), 15 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index e2dd171a13f..c64709b898c 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -89,7 +89,6 @@ struct SysemuCPUOps; * instantiatable CPU type. * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. - * @has_work: Callback for checking if there is work to do. * @memory_rw_debug: Callback for GDB memory access. * @dump_state: Callback for dumping state. * @get_arch_id: Callback for getting architecture-dependent CPU ID. @@ -132,7 +131,6 @@ struct CPUClass { void (*parse_features)(const char *typename, char *str, Error **errp); =20 int reset_dump_flags; - bool (*has_work)(CPUState *cpu); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *, int flags); diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index d1691be9896..53c427ee42e 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -446,6 +446,11 @@ static void hvf_start_vcpu_thread(CPUState *cpu) cpu, QEMU_THREAD_JOINABLE); } =20 +static bool hvf_cpu_has_work(CPUState *cpu) +{ + return false; +} + static void hvf_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops =3D ACCEL_OPS_CLASS(oc); @@ -456,6 +461,7 @@ static void hvf_accel_ops_class_init(ObjectClass *oc, v= oid *data) ops->synchronize_post_init =3D hvf_cpu_synchronize_post_init; ops->synchronize_state =3D hvf_cpu_synchronize_state; ops->synchronize_pre_loadvm =3D hvf_cpu_synchronize_pre_loadvm; + ops->has_work =3D hvf_cpu_has_work; }; static const TypeInfo hvf_accel_ops_type =3D { .name =3D ACCEL_OPS_NAME("hvf"), diff --git a/accel/qtest/qtest.c b/accel/qtest/qtest.c index 7e6b8110d52..eb5a17cef18 100644 --- a/accel/qtest/qtest.c +++ b/accel/qtest/qtest.c @@ -47,12 +47,18 @@ static const TypeInfo qtest_accel_type =3D { }; module_obj(TYPE_QTEST_ACCEL); =20 +static bool qtest_cpu_has_work(CPUState *cpu) +{ + return false; +} + static void qtest_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops =3D ACCEL_OPS_CLASS(oc); =20 ops->create_vcpu_thread =3D dummy_start_vcpu_thread; ops->get_virtual_clock =3D qtest_get_virtual_clock; + ops->has_work =3D qtest_cpu_has_work; }; =20 static const TypeInfo qtest_accel_ops_type =3D { diff --git a/accel/xen/xen-all.c b/accel/xen/xen-all.c index 69aa7d018b2..fe5a37fa2e6 100644 --- a/accel/xen/xen-all.c +++ b/accel/xen/xen-all.c @@ -215,11 +215,17 @@ static const TypeInfo xen_accel_type =3D { .class_init =3D xen_accel_class_init, }; =20 +static bool xen_cpu_has_work(CPUState *cpu) +{ + return false; +} + static void xen_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops =3D ACCEL_OPS_CLASS(oc); =20 ops->create_vcpu_thread =3D dummy_start_vcpu_thread; + ops->has_work =3D xen_cpu_has_work; } =20 static const TypeInfo xen_accel_ops_type =3D { diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index e2f5a646046..5ed1ccdfdd5 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -143,11 +143,6 @@ static void cpu_common_reset(DeviceState *dev) } } =20 -static bool cpu_common_has_work(CPUState *cs) -{ - return false; -} - ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) { CPUClass *cc =3D CPU_CLASS(object_class_by_name(typename)); @@ -279,7 +274,6 @@ static void cpu_class_init(ObjectClass *klass, void *da= ta) =20 k->parse_features =3D cpu_common_parse_features; k->get_arch_id =3D cpu_common_get_arch_id; - k->has_work =3D cpu_common_has_work; k->gdb_read_register =3D cpu_common_gdb_read_register; k->gdb_write_register =3D cpu_common_gdb_write_register; set_bit(DEVICE_CATEGORY_CPU, dc->categories); diff --git a/softmmu/cpus.c b/softmmu/cpus.c index 6bce52ce561..e6dad2243c6 100644 --- a/softmmu/cpus.c +++ b/softmmu/cpus.c @@ -251,13 +251,8 @@ void cpu_interrupt(CPUState *cpu, int mask) =20 bool cpu_has_work(CPUState *cpu) { - CPUClass *cc =3D CPU_GET_CLASS(cpu); - - if (cpus_accel->has_work) { - return cpus_accel->has_work(cpu); - } - g_assert(cc->has_work); - return cc->has_work(cpu); + g_assert(cpus_accel->has_work); + return cpus_accel->has_work(cpu); } =20 static int do_vm_stop(RunState state, bool send_stop) diff --git a/target/i386/hax/hax-accel-ops.c b/target/i386/hax/hax-accel-op= s.c index 136630e9b23..5407ba17eaf 100644 --- a/target/i386/hax/hax-accel-ops.c +++ b/target/i386/hax/hax-accel-ops.c @@ -74,6 +74,11 @@ static void hax_start_vcpu_thread(CPUState *cpu) #endif } =20 +static bool hax_cpu_has_work(CPUState *cpu) +{ + return false; +} + static void hax_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops =3D ACCEL_OPS_CLASS(oc); @@ -85,6 +90,7 @@ static void hax_accel_ops_class_init(ObjectClass *oc, voi= d *data) ops->synchronize_post_init =3D hax_cpu_synchronize_post_init; ops->synchronize_state =3D hax_cpu_synchronize_state; ops->synchronize_pre_loadvm =3D hax_cpu_synchronize_pre_loadvm; + ops->has_work =3D hax_cpu_has_work; } =20 static const TypeInfo hax_accel_ops_type =3D { diff --git a/target/i386/nvmm/nvmm-accel-ops.c b/target/i386/nvmm/nvmm-acce= l-ops.c index f788f75289f..36296f79ff8 100644 --- a/target/i386/nvmm/nvmm-accel-ops.c +++ b/target/i386/nvmm/nvmm-accel-ops.c @@ -83,6 +83,11 @@ static void nvmm_kick_vcpu_thread(CPUState *cpu) cpus_kick_thread(cpu); } =20 +static bool nvmm_cpu_has_work(CPUState *cpu) +{ + return false; +} + static void nvmm_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops =3D ACCEL_OPS_CLASS(oc); @@ -94,6 +99,7 @@ static void nvmm_accel_ops_class_init(ObjectClass *oc, vo= id *data) ops->synchronize_post_init =3D nvmm_cpu_synchronize_post_init; ops->synchronize_state =3D nvmm_cpu_synchronize_state; ops->synchronize_pre_loadvm =3D nvmm_cpu_synchronize_pre_loadvm; + ops->has_work =3D nvmm_cpu_has_work; } =20 static const TypeInfo nvmm_accel_ops_type =3D { --=20 2.31.1