From nobody Tue Feb 10 10:55:01 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.45 as permitted sender) client-ip=209.85.128.45; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f45.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.45 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1630599437; cv=none; d=zohomail.com; s=zohoarc; b=jPT3Sihw+DTT7Euo7bzrARN4XmBAZQA7E6KX6HJTZIC2zUMHQKML26YjGXJHwaDPDEFrnNwCW2blLRPiwW39QvvPLXyGJQNs2IU6srt6WnJudq5msjDjAXpfFgAbDF+VaR71VP2lMTnL7Q16DZHVyYOUpA9qrgY8R6Ggq7wiafQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1630599437; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=k2G3IfvTSVM9dAo9x5r9x/QXUgni24b97nAmsANOOiA=; b=MOJQk+JoKQhwkExHJdSZGzKrI/CRCqLFM7+XkRWWekr9SFYBdHltzZkQ8YPMlGhturigZ4XF3aQh+EeC+zQVc8qSr3Un8X9ISscmmu4gx5iM+uEC1yiwjKVDo34HR4PpiokYTNL5wfCY2Lo67+/oYb/vLfxAGicBdQBla5/hmk8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.45 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) by mx.zohomail.com with SMTPS id 16305994373871021.3497988213444; Thu, 2 Sep 2021 09:17:17 -0700 (PDT) Received: by mail-wm1-f45.google.com with SMTP id j17-20020a05600c1c1100b002e754875260so1736607wms.4 for ; Thu, 02 Sep 2021 09:17:16 -0700 (PDT) Return-Path: Return-Path: Received: from x1w.. (163.red-83-52-55.dynamicip.rima-tde.net. [83.52.55.163]) by smtp.gmail.com with ESMTPSA id c3sm2410025wrd.34.2021.09.02.09.17.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Sep 2021 09:17:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=k2G3IfvTSVM9dAo9x5r9x/QXUgni24b97nAmsANOOiA=; b=M+D+zo4/zdtMjYh01av69Zx4I3VwXPivjqKNQQ+G3Cy3iOhT3mTPvnPzXtpAFBC7IC bwDY97okiaHzzYZk/Nr+HJhmQWDbqsmtfcbNHfDxcB+wW5LVOcMLHk2ke6LUzT0b2vAG YqHMZm6pCnZF4sDmb5j0t8leoEPE4luIBbr+2Y/AHejZSaAIPRgw6F1l+RvTfdeQZQ/w KmEHFk+ys6eIeCl+10CsGxJv2WVk1ePshB2QpZEYQ9Rs3vY5QE1eYEOqT+aIoXIw8PR9 WNsdSSeclnt9XXMY/k06ObG6uMJqiNqm40/pEaPsmniXZMMe5CRy4fWye4vqLWV5kU8p n7eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=k2G3IfvTSVM9dAo9x5r9x/QXUgni24b97nAmsANOOiA=; b=GZDRLbXIr1/vzvfAUaXHuYHQJTIBl2d/t5MM8ca58Huab/KsK0plYTuoPoBGklVgQr 2oZXzEw2/a9DD06lo6w8c/oG7LReXVLyGUG9ZfOGwMD6tLm8QF2D9LNCTIEYuxC704qN jI73Kmy0SX0q9qdd1kAe3P71CjkS2IKs0pMpE0fDe+AFbmM/PPZCq4Y/Q7Q82A0R5yAi cUKxv7gQmIRFpXiGN0EgC1KwdAVNjjGVAWIwic9vnz7HFmMm9tuoVTAs6SdQxhvcBDlO Q/66Hi8DXWKySkVyZKtIwL0Zm1a5XFXaTheR5km1aimvKUX4I62D6kiVNLDHOmc3D+Q7 r+Og== X-Gm-Message-State: AOAM533X6jWw+nFOAw2E3npxo1o+QXIElHbDLAFsMEzPZchEW8Mx4uvb 1oA9WangI5yT+lK62OeOWd4= X-Google-Smtp-Source: ABdhPJxFmnMfDsCiejdGeBE1y8KakVIkNHc7YRKHEHHLvGEXylx3fbGc1JSSwIBZyxQGjwxS5CvgPg== X-Received: by 2002:a05:600c:1d27:: with SMTP id l39mr3986130wms.146.1630599431932; Thu, 02 Sep 2021 09:17:11 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bin Meng , Eduardo Habkost , Greg Kurz , haxm-team@intel.com, Kamil Rytarowski , qemu-ppc@nongnu.org, Anthony Perard , Marcel Apfelbaum , Michael Rolnik , qemu-riscv@nongnu.org, Paolo Bonzini , Jiaxun Yang , Thomas Huth , David Hildenbrand , Chris Wulff , Laurent Vivier , Cameron Esfahani , Sunil Muthuswamy , Max Filippov , Taylor Simpson , qemu-s390x@nongnu.org, Richard Henderson , Bastian Koppelmann , Yoshinori Sato , Artyom Tarasenko , Aurelien Jarno , Paul Durrant , Peter Maydell , David Gibson , Alistair Francis , "Edgar E. Iglesias" , Roman Bolshakov , Laurent Vivier , Cornelia Huck , qemu-arm@nongnu.org, Wenchao Wang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , xen-devel@lists.xenproject.org, Marek Vasut , Stefano Stabellini , Aleksandar Rikalo , Mark Cave-Ayland , Colin Xu , Claudio Fontana , Palmer Dabbelt , Stafford Horne , Reinoud Zandijk , kvm@vger.kernel.org Subject: [PATCH v3 14/30] target/i386: Restrict has_work() handler to sysemu and TCG Date: Thu, 2 Sep 2021 18:15:27 +0200 Message-Id: <20210902161543.417092-15-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210902161543.417092-1-f4bug@amsat.org> References: <20210902161543.417092-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1630599437768100001 Restrict has_work() to TCG sysemu. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/i386/cpu.c | 6 ------ target/i386/tcg/tcg-cpu.c | 8 +++++++- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 04f59043804..b7417d29f44 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6548,11 +6548,6 @@ int x86_cpu_pending_interrupt(CPUState *cs, int inte= rrupt_request) return 0; } =20 -static bool x86_cpu_has_work(CPUState *cs) -{ - return x86_cpu_pending_interrupt(cs, cs->interrupt_request) !=3D 0; -} - static void x86_disas_set_info(CPUState *cs, disassemble_info *info) { X86CPU *cpu =3D X86_CPU(cs); @@ -6757,7 +6752,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) =20 cc->class_by_name =3D x86_cpu_class_by_name; cc->parse_features =3D x86_cpu_parse_featurestr; - cc->has_work =3D x86_cpu_has_work; cc->dump_state =3D x86_cpu_dump_state; cc->set_pc =3D x86_cpu_set_pc; cc->gdb_read_register =3D x86_cpu_gdb_read_register; diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index fd86daf93d2..6cde53603ba 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -55,6 +55,11 @@ static void x86_cpu_synchronize_from_tb(CPUState *cs, } =20 #ifndef CONFIG_USER_ONLY +static bool x86_cpu_has_work(CPUState *cs) +{ + return x86_cpu_pending_interrupt(cs, cs->interrupt_request) !=3D 0; +} + static bool x86_debug_check_breakpoint(CPUState *cs) { X86CPU *cpu =3D X86_CPU(cs); @@ -63,7 +68,7 @@ static bool x86_debug_check_breakpoint(CPUState *cs) /* RF disables all architectural breakpoints. */ return !(env->eflags & RF_MASK); } -#endif +#endif /* CONFIG_USER_ONLY */ =20 #include "hw/core/tcg-cpu-ops.h" =20 @@ -76,6 +81,7 @@ static const struct TCGCPUOps x86_tcg_ops =3D { #ifdef CONFIG_USER_ONLY .fake_user_exception =3D x86_cpu_do_interrupt, #else + .has_work =3D x86_cpu_has_work, .do_interrupt =3D x86_cpu_do_interrupt, .cpu_exec_interrupt =3D x86_cpu_exec_interrupt, .debug_excp_handler =3D breakpoint_handler, --=20 2.31.1