From nobody Tue Feb 10 11:56:00 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.53 as permitted sender) client-ip=209.85.221.53; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f53.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.53 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1630595941; cv=none; d=zohomail.com; s=zohoarc; b=BvzlGDfUSX6164PjTxOV+ErlBokqPHPaH2D/15Vwzp/Csl4kkdIWvZ8u32pUzQc/BVrbs/ITY2rRn1DVMN6dtnyDIMHArEN6xbLhFIuGkA6uWzXnSj+fjrR+aILN04fO1fbdsWoUCTRScOu8piF6//TwdHo5glwoTlJq2xvjfeg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1630595941; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=yWzwMmzgtknOn/zDVw9ZMjlZX8g7FMUFvR1QvfAhY8E=; b=TV6o+1Te1kvS+ew8ilm8vfdL9w+KOxuKyZUpDhrDIM5K8kL7MPwe+FblKMjKHvvrvfwWOHyQaVP243ikJa8xEJqbiOstHroS8JYKOD6My5bUYUqAec2ZLj+3u3fL8Kr7b8CBzGgWNjwNP1nzbBsqz9esLR6J2NVz9XWkVdaz3zk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.53 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) by mx.zohomail.com with SMTPS id 1630595941551230.5665587365579; Thu, 2 Sep 2021 08:19:01 -0700 (PDT) Received: by mail-wr1-f53.google.com with SMTP id t15so3536436wrg.7 for ; Thu, 02 Sep 2021 08:19:01 -0700 (PDT) Return-Path: Return-Path: Received: from x1w.. (163.red-83-52-55.dynamicip.rima-tde.net. [83.52.55.163]) by smtp.gmail.com with ESMTPSA id s7sm2137638wra.75.2021.09.02.08.18.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Sep 2021 08:18:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yWzwMmzgtknOn/zDVw9ZMjlZX8g7FMUFvR1QvfAhY8E=; b=XL6aED2lZnZF+iSRz2h+W+d5lk31scEEQIu7ZFZr7a4DAwfbFp9vFKKYKaMRLBTYe0 ozL+tRJbDl1PolsI21/eEKKM4L5Vm0QHXDY7fh742PqmfupsDm/e+6iYztFcpcuD3CUN eAxKQHzjkBw9jLLFM6woIBXxmr+spcq+bc2HhwugzWlkRK+aPrq0Kv2diuGeJUKFJ54y PnZi+XP7vbbb+yEeDc27xhClbS8UHJOFBNhR7IhAWiV44Fr57TarL486Z+xDsIx8HJTT CnPIuGsYkn3xr3j0fUpYG08ZOqxB75xU844oepVvpNhVtTkkokXtOFZB3T3hIBvwvXwC 2OQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=yWzwMmzgtknOn/zDVw9ZMjlZX8g7FMUFvR1QvfAhY8E=; b=Fh6Mm4/JOCDjDwnvRtLlxdVRXetAQQl3Ybtf7Uleu5Q7KWVGPE7fsVVac9TWG7NOo0 gWLfj8adrtUpPPBRUoRWSpqthsDlwCIt3LlE8uNXjePuu/f/YAmhE2SS85PshuYa92lt p7J/JAskwu2ZK6PrOXQDBs9yYzYCGd8lZgIoAFneinI5qe229GcxEoJlU67RZoPUXfR4 FL9XO5FTiYr564uwQBMnSzOZdUPwZAjZpCmfnd/xSxH4rG4cAsq48dpHep0ORQS57HKA z/Od9H7nGfpGW001ko67fjs5XLIQeCwdrkpS0MKCQLkBfzYnC24y09GaQxKyPMp+jMID yn4g== X-Gm-Message-State: AOAM532E0xrXDyTtY346HVUjXGJeStIPo0nXeuum5Tp/MCJyPo0T3uPu bQX1+6ntCI+COFi7jl7xI/U= X-Google-Smtp-Source: ABdhPJzOKEjdbeMSJ9dEW35a0CRR6zbzkeoFfLzGKh6rzfiZeHRAhZKmrMV5Pi9tF4o2FxT4GTUCaA== X-Received: by 2002:a5d:4e51:: with SMTP id r17mr4596219wrt.308.1630595939779; Thu, 02 Sep 2021 08:18:59 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Yoshinori Sato , Jiaxun Yang , qemu-arm@nongnu.org, Palmer Dabbelt , Max Filippov , Warner Losh , Michael Rolnik , Stafford Horne , Paolo Bonzini , "Edgar E. Iglesias" , Bin Meng , Chris Wulff , Mark Cave-Ayland , David Gibson , Kyle Evans , Peter Maydell , Aurelien Jarno , Eduardo Habkost , Marek Vasut , Artyom Tarasenko , Aleksandar Rikalo , Greg Kurz , qemu-riscv@nongnu.org, Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Richard Henderson , Alistair Francis Subject: [PATCH 19/24] target/sh4: Restrict cpu_exec_interrupt() handler to sysemu Date: Thu, 2 Sep 2021 17:17:10 +0200 Message-Id: <20210902151715.383678-20-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210902151715.383678-1-f4bug@amsat.org> References: <20210902151715.383678-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1630595943210100001 Restrict cpu_exec_interrupt() and its callees to sysemu. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/sh4/cpu.h | 4 ++-- target/sh4/cpu.c | 2 +- target/sh4/helper.c | 9 ++------- 3 files changed, 5 insertions(+), 10 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 01c43440822..017a7702140 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -204,8 +204,6 @@ struct SuperHCPU { }; =20 =20 -void superh_cpu_do_interrupt(CPUState *cpu); -bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); @@ -223,6 +221,8 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, =20 void sh4_cpu_list(void); #if !defined(CONFIG_USER_ONLY) +void superh_cpu_do_interrupt(CPUState *cpu); +bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); void cpu_sh4_invalidate_tlb(CPUSH4State *s); uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s, hwaddr addr); diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 83269229421..2047742d03c 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -236,10 +236,10 @@ static const struct SysemuCPUOps sh4_sysemu_ops =3D { static const struct TCGCPUOps superh_tcg_ops =3D { .initialize =3D sh4_translate_init, .synchronize_from_tb =3D superh_cpu_synchronize_from_tb, - .cpu_exec_interrupt =3D superh_cpu_exec_interrupt, .tlb_fill =3D superh_cpu_tlb_fill, =20 #ifndef CONFIG_USER_ONLY + .cpu_exec_interrupt =3D superh_cpu_exec_interrupt, .do_interrupt =3D superh_cpu_do_interrupt, .do_unaligned_access =3D superh_cpu_do_unaligned_access, .io_recompile_replay_branch =3D superh_io_recompile_replay_branch, diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 2d622081e85..53cb9c3b631 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -45,11 +45,6 @@ =20 #if defined(CONFIG_USER_ONLY) =20 -void superh_cpu_do_interrupt(CPUState *cs) -{ - cs->exception_index =3D -1; -} - int cpu_sh4_is_cached(CPUSH4State *env, target_ulong addr) { /* For user mode, only U0 area is cacheable. */ @@ -784,8 +779,6 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong a= ddr) return 0; } =20 -#endif - bool superh_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { if (interrupt_request & CPU_INTERRUPT_HARD) { @@ -803,6 +796,8 @@ bool superh_cpu_exec_interrupt(CPUState *cs, int interr= upt_request) return false; } =20 +#endif /* !CONFIG_USER_ONLY */ + bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr) --=20 2.31.1