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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id x11sm2016661wro.83.2021.09.02.08.18.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Sep 2021 08:18:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ztcTTnkmE3Sy1SDB/uPjtWzU/LrMfSjAGUpWvTwvo3w=; b=BUqC7PaF7PzoMYvp5taCbjdhSwKs5a3L3G6rE6UCOzDEFmY+e7iZ/tPOdsuPZ7RPLK XRGdfIMRn69UAeSJ//SsTfOz6FKq0wbS451YbfELFBQeVp5ajbEsjewt5EoLI1KnhGmK ey6vfKSr1f5lCq1YVjRlenq+Ik+N9xh4qkVdNJnRNSbv6zv8InbxtOmRKZrcU5y1jdl1 /rvp7qbhqsKhL4azgAIssVrG3DOUN3gkN9CVztK8/p0Y6FbmodAp/0SZ7WLhu/edxKoy jZ7Fc+NzXCUF31Nq0q4KkzhW0FfGahTZOqxVWuWXoBNIcfVhDH8ea54WrA8T2UcSxlyt Hi3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=ztcTTnkmE3Sy1SDB/uPjtWzU/LrMfSjAGUpWvTwvo3w=; b=PiO3456CRLpC8Kpuunb0LkiMbz1FNMLtaL7y2WB5911tk+c4fgFJBUabLd7WyJ908b yhQxHPtqB2Qh38h9hu8DkxFsW0BNtf5bFS2l/rtXhiIOzHsdaMSmhS3z0AQ9wnVaOgY8 3wv41w8wqhKnbaB7mF4LbAb5h3kuiBvu9BNXcPHFmydoovz9dIA8LHAPKVbwcpRUQzFR CdblZpthwkqc4yDDsDQPBcx+3KyZ4HGoauxKny59fIvd9JhW5u5EbU6QD+VcxH5IIrG6 mb7Dz8pdmmWAblN3KG9qRJh6ctuTx7aKE9oHc3DhIyqQp6H6xvPTcpmTXYVno+PAMe+U JFKA== X-Gm-Message-State: AOAM532wTNd+shdNx94adySCNTxyAhjYGze4bTLoyOuG9HuW+nA8mAKd 7gePbdQzFJxtlsVUC3gMTxE= X-Google-Smtp-Source: ABdhPJzAY+gEFr74wmw6KyBf2KbIWUrFnxTkLQzFaB4Bc1Ln2DAgVSsIVE0jXNvSrGRcCpuRlOL4Uw== X-Received: by 2002:a7b:c7c3:: with SMTP id z3mr3687535wmk.96.1630595907666; Thu, 02 Sep 2021 08:18:27 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Yoshinori Sato , Jiaxun Yang , qemu-arm@nongnu.org, Palmer Dabbelt , Max Filippov , Warner Losh , Michael Rolnik , Stafford Horne , Paolo Bonzini , "Edgar E. Iglesias" , Bin Meng , Chris Wulff , Mark Cave-Ayland , David Gibson , Kyle Evans , Peter Maydell , Aurelien Jarno , Eduardo Habkost , Marek Vasut , Artyom Tarasenko , Aleksandar Rikalo , Greg Kurz , qemu-riscv@nongnu.org, Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-ppc@nongnu.org, Richard Henderson , Alistair Francis Subject: [PATCH 13/24] target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu Date: Thu, 2 Sep 2021 17:17:04 +0200 Message-Id: <20210902151715.383678-14-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210902151715.383678-1-f4bug@amsat.org> References: <20210902151715.383678-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1630595910806100001 Restrict cpu_exec_interrupt() and its callees to sysemu. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Warner Losh --- target/microblaze/cpu.h | 2 ++ target/microblaze/cpu.c | 2 +- target/microblaze/helper.c | 13 ++----------- 3 files changed, 5 insertions(+), 12 deletions(-) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index e4bba8a7551..40401c33b72 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -355,8 +355,10 @@ struct MicroBlazeCPU { }; =20 =20 +#ifndef CONFIG_USER_ONLY void mb_cpu_do_interrupt(CPUState *cs); bool mb_cpu_exec_interrupt(CPUState *cs, int int_req); +#endif /* !CONFIG_USER_ONLY */ void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr); diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 72d8f2a0daa..15db277925f 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -365,10 +365,10 @@ static const struct SysemuCPUOps mb_sysemu_ops =3D { static const struct TCGCPUOps mb_tcg_ops =3D { .initialize =3D mb_tcg_init, .synchronize_from_tb =3D mb_cpu_synchronize_from_tb, - .cpu_exec_interrupt =3D mb_cpu_exec_interrupt, .tlb_fill =3D mb_cpu_tlb_fill, =20 #ifndef CONFIG_USER_ONLY + .cpu_exec_interrupt =3D mb_cpu_exec_interrupt, .do_interrupt =3D mb_cpu_do_interrupt, .do_transaction_failed =3D mb_cpu_transaction_failed, .do_unaligned_access =3D mb_cpu_do_unaligned_access, diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index 20dbd673136..dd2aecd1d58 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -26,16 +26,6 @@ =20 #if defined(CONFIG_USER_ONLY) =20 -void mb_cpu_do_interrupt(CPUState *cs) -{ - MicroBlazeCPU *cpu =3D MICROBLAZE_CPU(cs); - CPUMBState *env =3D &cpu->env; - - cs->exception_index =3D -1; - env->res_addr =3D RES_ADDR_NONE; - env->regs[14] =3D env->pc; -} - bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr) @@ -271,7 +261,6 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cs, v= addr addr, =20 return paddr; } -#endif =20 bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { @@ -289,6 +278,8 @@ bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_= request) return false; } =20 +#endif /* !CONFIG_USER_ONLY */ + void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) --=20 2.31.1