From nobody Mon Apr 14 03:45:58 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1630492770; cv=none; d=zohomail.com; s=zohoarc; b=GHitlmTjAr+T86w7fU7ErD+F73SIt9UQqONTAx5jvTV5YX6eZ1w1bA8EiT1GOYJjmTCd8X/3iTdMgom9Aw/cm3+/thfZs2EHHtpfdCzUVsqS6WFOgi5HqpYswySdzPCk3CRx+kTN15pvsQNuTWF0wwRA8vPBvhBsgOraI0cJ06o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1630492770; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=CDghGKNxB38lPfiyQ/7haMC6qZxl8ZbSdUy9LBKKEMk=; b=iFvRbpg9XYpJ6QC5JpE+DwBdbofWzeUa8VkPfYYA6BYJjC21XcI4232U1LTDzksDywNRp2qSCTPBkQ3cjam6M0kjTEdvC0/3vl4WiTPEDGTG1OQ3lJG5db43B3URkvhsBHEl/viQ93pQYH0Wkb19HZ+t+BX4Hzud4sHMSWMVAeg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1630492770375125.19009920952305; Wed, 1 Sep 2021 03:39:30 -0700 (PDT) Received: from localhost ([::1]:48304 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mLNeT-0001UH-6q for importer@patchew.org; Wed, 01 Sep 2021 06:39:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43200) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mLNc9-0006mn-Jv for qemu-devel@nongnu.org; Wed, 01 Sep 2021 06:37:05 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:36854) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mLNc6-0005eH-VC for qemu-devel@nongnu.org; Wed, 01 Sep 2021 06:37:05 -0400 Received: by mail-wr1-x435.google.com with SMTP id q14so3762507wrp.3 for ; Wed, 01 Sep 2021 03:37:02 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id j207sm5494771wmj.40.2021.09.01.03.37.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Sep 2021 03:37:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=CDghGKNxB38lPfiyQ/7haMC6qZxl8ZbSdUy9LBKKEMk=; b=z1ZezLE75PtzMtp7lCgSBWG88uCu0bhR4gK+QybqT1OXKvER7qvsC9Q8Jq1Zd2t3ha mswLM0Q94MdM1tlaRbYlkxUBoMpK6FWngu1OLf7w4/tXpA/5JhQTGdyafhHSYuQhEBJh /uj2MJHg3z6NmmBUSHovj7n/9xUoI+Dl/GasBWYnq7/Z47jq7RtrQJ0AMyKyW9h60Zqo mXSe1V5ud/ukK/NkoK/u5SXeAYTDcl4f0V8BctfQ2Mai56TYo4jCcS+BFkxitjjdtrld U7hylHh/L5ONBVwZJsGTfx9fMyrjBxLDB4zXYbt4NVGxUV6gbRh/He3n8ngMeiQIXMu1 kVkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CDghGKNxB38lPfiyQ/7haMC6qZxl8ZbSdUy9LBKKEMk=; b=F6hHgWkSzqgFOVlpqOGK93VoDWENyBeDdZ7OPwwuQ7pIUq3xuRVOTMm5ix07yKBR2x PJaziQZG45U2mzuBP+frhyVFFjVfu4lZVHqW+i4da5ZeN6mjx4KARVqIvU3ktDUcIOhR jLcmAxz1f7SpixBmtYM1W5lDwq+GGV6+NQKKcbIDGeIVcK6VIBmt8EVexxccOCak3+C9 FBarHUYYInvzHZhaSh5xUW0ng04PABZRuJeHDjRuz1nox2GywLQ96Jg1fpVocmSOjhnN VAjOz4Coq0aI5no6LaPZtQf5UPtaXwB1PtY2AWkhNeu+h0r1mwoUiMiMPCf7BD2MqemA 8iWw== X-Gm-Message-State: AOAM533RYrWDJKfyfzsGTIzTKnjoWFGL+aGO8MojX3CmnmFQqQ+P4Z9R OR40JlKk7HafXe9dU4o9GTDfoqjsGsVJIQ== X-Google-Smtp-Source: ABdhPJwpHIEIQfFsOHDx0tjVxWrp8cr4JSh8GHKEWOd7lSivVIYIn2jtc6r1yDsHD7ey+BAkUqqlTw== X-Received: by 2002:adf:b745:: with SMTP id n5mr37850991wre.338.1630492621571; Wed, 01 Sep 2021 03:37:01 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/51] target/arm: Implement MVE VCADD Date: Wed, 1 Sep 2021 11:36:10 +0100 Message-Id: <20210901103653.13435-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210901103653.13435-1-peter.maydell@linaro.org> References: <20210901103653.13435-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1630492770830100003 Content-Type: text/plain; charset="utf-8" Implement the MVE VCADD insn. Note that here the size bit is the opposite sense to the other 2-operand fp insns. We don't check for the sz =3D=3D 1 && Qd =3D=3D Qm UNPREDICTABLE case, because that would mean we can't use the DO_2OP_FP macro in translate-mve.c. Reviewed-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/helper-mve.h | 6 ++++++ target/arm/mve.decode | 8 ++++++++ target/arm/mve_helper.c | 40 ++++++++++++++++++++++++++++++++++++++ target/arm/translate-mve.c | 4 +++- 4 files changed, 57 insertions(+), 1 deletion(-) diff --git a/target/arm/helper-mve.h b/target/arm/helper-mve.h index 370876d7934..42eba8ea96d 100644 --- a/target/arm/helper-mve.h +++ b/target/arm/helper-mve.h @@ -428,6 +428,12 @@ DEF_HELPER_FLAGS_4(mve_vmaxnms, TCG_CALL_NO_WG, void, = env, ptr, ptr, ptr) DEF_HELPER_FLAGS_4(mve_vminnmh, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) DEF_HELPER_FLAGS_4(mve_vminnms, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) =20 +DEF_HELPER_FLAGS_4(mve_vfcadd90h, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) +DEF_HELPER_FLAGS_4(mve_vfcadd90s, TCG_CALL_NO_WG, void, env, ptr, ptr, ptr) + +DEF_HELPER_FLAGS_4(mve_vfcadd270h, TCG_CALL_NO_WG, void, env, ptr, ptr, pt= r) +DEF_HELPER_FLAGS_4(mve_vfcadd270s, TCG_CALL_NO_WG, void, env, ptr, ptr, pt= r) + DEF_HELPER_FLAGS_4(mve_vadd_scalarb, TCG_CALL_NO_WG, void, env, ptr, ptr, = i32) DEF_HELPER_FLAGS_4(mve_vadd_scalarh, TCG_CALL_NO_WG, void, env, ptr, ptr, = i32) DEF_HELPER_FLAGS_4(mve_vadd_scalarw, TCG_CALL_NO_WG, void, env, ptr, ptr, = i32) diff --git a/target/arm/mve.decode b/target/arm/mve.decode index cdbfaa4245b..c728c7089ac 100644 --- a/target/arm/mve.decode +++ b/target/arm/mve.decode @@ -29,6 +29,8 @@ # 2 operand fp insns have size in bit 20: 1 for 16 bit, 0 for 32 bit, # like Neon FP insns. %2op_fp_size 20:1 !function=3Dneon_3same_fp_size +# VCADD is an exception, where bit 20 is 0 for 16 bit and 1 for 32 bit +%2op_fp_size_rev 20:1 !function=3Dplus_1 =20 # 1imm format immediate %imm_28_16_0 28:1 16:3 0:4 @@ -125,6 +127,9 @@ @2op_fp .... .... .... .... .... .... .... .... &2op \ qd=3D%qd qn=3D%qn qm=3D%qm size=3D%2op_fp_size =20 +@2op_fp_size_rev .... .... .... .... .... .... .... .... &2op \ + qd=3D%qd qn=3D%qn qm=3D%qm size=3D%2op_fp_size_rev + # Vector loads and stores =20 # Widening loads and narrowing stores: @@ -631,3 +636,6 @@ VABD_fp 1111 1111 0 . 1 . ... 0 ... 0 1101 . = 1 . 0 ... 0 @2op_fp =20 VMAXNM 1111 1111 0 . 0 . ... 0 ... 0 1111 . 1 . 1 ... 0 @2op_fp VMINNM 1111 1111 0 . 1 . ... 0 ... 0 1111 . 1 . 1 ... 0 @2op_fp + +VCADD90_fp 1111 1100 1 . 0 . ... 0 ... 0 1000 . 1 . 0 ... 0 @2op_fp= _size_rev +VCADD270_fp 1111 1101 1 . 0 . ... 0 ... 0 1000 . 1 . 0 ... 0 @2op_fp= _size_rev diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c index d6bc686c985..2cc8b3e11b7 100644 --- a/target/arm/mve_helper.c +++ b/target/arm/mve_helper.c @@ -2854,3 +2854,43 @@ static inline float32 float32_abd(float32 a, float32= b, float_status *s) DO_2OP_FP_ALL(vfabd, abd) DO_2OP_FP_ALL(vmaxnm, maxnum) DO_2OP_FP_ALL(vminnm, minnum) + +#define DO_VCADD_FP(OP, ESIZE, TYPE, FN0, FN1) \ + void HELPER(glue(mve_, OP))(CPUARMState *env, \ + void *vd, void *vn, void *vm) \ + { \ + TYPE *d =3D vd, *n =3D vn, *m =3D vm; = \ + TYPE r[16 / ESIZE]; \ + uint16_t tm, mask =3D mve_element_mask(env); \ + unsigned e; \ + float_status *fpst; \ + float_status scratch_fpst; \ + /* Calculate all results first to avoid overwriting inputs */ \ + for (e =3D 0, tm =3D mask; e < 16 / ESIZE; e++, tm >>=3D ESIZE) { = \ + if ((tm & MAKE_64BIT_MASK(0, ESIZE)) =3D=3D 0) { = \ + r[e] =3D 0; \ + continue; \ + } \ + fpst =3D (ESIZE =3D=3D 2) ? &env->vfp.standard_fp_status_f16 := \ + &env->vfp.standard_fp_status; \ + if (!(tm & 1)) { \ + /* We need the result but without updating flags */ \ + scratch_fpst =3D *fpst; \ + fpst =3D &scratch_fpst; \ + } \ + if (!(e & 1)) { \ + r[e] =3D FN0(n[H##ESIZE(e)], m[H##ESIZE(e + 1)], fpst); \ + } else { \ + r[e] =3D FN1(n[H##ESIZE(e)], m[H##ESIZE(e - 1)], fpst); \ + } \ + } \ + for (e =3D 0; e < 16 / ESIZE; e++, mask >>=3D ESIZE) { = \ + mergemask(&d[H##ESIZE(e)], r[e], mask); \ + } \ + mve_advance_vpt(env); \ + } + +DO_VCADD_FP(vfcadd90h, 2, float16, float16_sub, float16_add) +DO_VCADD_FP(vfcadd90s, 4, float32, float32_sub, float32_add) +DO_VCADD_FP(vfcadd270h, 2, float16, float16_add, float16_sub) +DO_VCADD_FP(vfcadd270s, 4, float32, float32_add, float32_sub) diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index 98282335820..6203e3ff916 100644 --- a/target/arm/translate-mve.c +++ b/target/arm/translate-mve.c @@ -852,6 +852,8 @@ DO_2OP_FP(VMUL_fp, vfmul) DO_2OP_FP(VABD_fp, vfabd) DO_2OP_FP(VMAXNM, vmaxnm) DO_2OP_FP(VMINNM, vminnm) +DO_2OP_FP(VCADD90_fp, vfcadd90) +DO_2OP_FP(VCADD270_fp, vfcadd270) =20 static bool do_2op_scalar(DisasContext *s, arg_2scalar *a, MVEGenTwoOpScalarFn fn) @@ -883,7 +885,7 @@ static bool do_2op_scalar(DisasContext *s, arg_2scalar = *a, return true; } =20 -#define DO_2OP_SCALAR(INSN, FN) \ +#define DO_2OP_SCALAR(INSN, FN) \ static bool trans_##INSN(DisasContext *s, arg_2scalar *a) \ { \ static MVEGenTwoOpScalarFn * const fns[] =3D { \ --=20 2.20.1