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s=facebook; bh=eAmU7uJ7DEoPFCSIKwkqtnpI79NZb89CKay9em5nlD8=; b=Tu0TEjspOFfgX+FGpXFU0aaJykvMMnxKvJHw688Jq3wETPmOyWz6K94lJl93BFK9YnbK bHLkhggZQe28C9SAa0DJEuRQEn/uU3Jq74okWh5v87ulx2VlyzKpRlo7MAgsbRmmHjLm bMSAGKVzSkxU1uLD3Nj/+G/J/kKV2hD4eag= From: To: CC: , , , , Peter Delevoryas Subject: [PATCH 5/5] hw/arm/aspeed: Initialize AST2600 clock selection registers Date: Fri, 27 Aug 2021 14:04:17 -0700 Message-ID: <20210827210417.4022054-6-pdel@fb.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210827210417.4022054-1-pdel@fb.com> References: <20210827210417.4022054-1-pdel@fb.com> X-FB-Internal: Safe X-FB-Source: Intern X-Proofpoint-GUID: 6qCRvfy0HwAIPXuHRecQg_QPxmxJj2zt X-Proofpoint-ORIG-GUID: 6qCRvfy0HwAIPXuHRecQg_QPxmxJj2zt Content-Transfer-Encoding: quoted-printable X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-08-27_06:2021-08-27, 2021-08-27 signatures=0 X-Proofpoint-Spam-Details: rule=fb_default_notspam policy=fb_default score=0 spamscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 malwarescore=0 mlxscore=0 adultscore=0 mlxlogscore=999 impostorscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2108270124 X-FB-Internal: deliver Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=67.231.153.30; envelope-from=prvs=78736a82b9=pdel@fb.com; helo=mx0b-00082601.pphosted.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.743, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Fri, 27 Aug 2021 18:37:43 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @fb.com) X-ZM-MESSAGEID: 1630104035821100005 Content-Type: text/plain; charset="utf-8" From: Peter Delevoryas UART5 is typically used as the default debug UART on the AST2600, but UART1 is also designed to be a debug UART. All the AST2600 UART's have semi-configurable clock rates through registers in the System Control Unit (SCU), but only UART5 works out of the box with zero-initialized values. The rest of the UART's expect a few of the registers to be initialized to non-zero values, or else the clock rate calculation will yield zero or undefined (due to a divide-by-zero). For reference, the U-Boot clock rate driver here shows the calculation: https://github.com/facebook/openbmc-uboot/blob/main/drivers/clk/aspeed/= clk_ast2600.c#L357) To summarize, UART5 allows selection from 4 rates: 24 MHz, 192 MHz, 24 / 13 MHz, and 192 / 13 MHz. The other UART's allow selecting either the "low" rate (UARTCLK) or the "high" rate (HUARTCLK). UARTCLK and HUARTCLK are configurable themselves: UARTCLK =3D UXCLK * R / (N * 2) HUARTCLK =3D HUXCLK * HR / (HN * 2) UXCLK and HUXCLK are also configurable, and depend on the APLL and/or HPLL clock rates, which also derive from complicated calculations. Long story short, there's lots of multiplication and division from configurable registers, and most of these registers are zero-initialized in QEMU, which at best is unexpected and at worst causes this clock rate driver to hang from divide-by-zero's. This can also be difficult to diagnose, because it may cause U-Boot to hang before serial console initialization completes, requiring intervention from gdb. This change just initializes all of these registers with default values from the datasheet. Signed-off-by: Peter Delevoryas Reviewed-by: C=C3=A9dric Le Goater --- hw/misc/aspeed_scu.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index c373e678f0..d51fe8564d 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -104,11 +104,16 @@ #define AST2600_SDRAM_HANDSHAKE TO_REG(0x100) #define AST2600_HPLL_PARAM TO_REG(0x200) #define AST2600_HPLL_EXT TO_REG(0x204) +#define AST2600_APLL_PARAM TO_REG(0x210) #define AST2600_MPLL_EXT TO_REG(0x224) #define AST2600_EPLL_EXT TO_REG(0x244) #define AST2600_CLK_SEL TO_REG(0x300) #define AST2600_CLK_SEL2 TO_REG(0x304) #define AST2600_CLK_SEL3 TO_REG(0x308) +#define AST2600_CLK_SEL4 TO_REG(0x310) +#define AST2600_CLK_SEL5 TO_REG(0x314) +#define AST2600_UARTCLK_PARAM TO_REG(0x338) +#define AST2600_HUARTCLK_PARAM TO_REG(0x33C) #define AST2600_HW_STRAP1 TO_REG(0x500) #define AST2600_HW_STRAP1_CLR TO_REG(0x504) #define AST2600_HW_STRAP1_PROT TO_REG(0x508) @@ -658,9 +663,15 @@ static const uint32_t ast2600_a1_resets[ASPEED_AST2600= _SCU_NR_REGS] =3D { [AST2600_CLK_STOP_CTRL2] =3D 0xFFF0FFF0, [AST2600_SDRAM_HANDSHAKE] =3D 0x00000000, [AST2600_HPLL_PARAM] =3D 0x1000405F, + [AST2600_APLL_PARAM] =3D 0x1000405F, [AST2600_CHIP_ID0] =3D 0x1234ABCD, [AST2600_CHIP_ID1] =3D 0x88884444, - + [AST2600_CLK_SEL2] =3D 0x00700000, + [AST2600_CLK_SEL3] =3D 0x00000000, + [AST2600_CLK_SEL4] =3D 0xF3F40000, + [AST2600_CLK_SEL5] =3D 0x30000000, + [AST2600_UARTCLK_PARAM] =3D 0x00014506, + [AST2600_HUARTCLK_PARAM] =3D 0x000145C0, }; =20 static void aspeed_ast2600_scu_reset(DeviceState *dev) --=20 2.30.2