From nobody Thu Dec 18 22:22:15 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1629998077; cv=none; d=zohomail.com; s=zohoarc; b=cUzum0J9XRGLThF0if6I59gbbJrPoiZmJII3f6PmqnQR8Ko7XgTNqiGXuVcWo1ih66V3tAAUMUtmox73Yn//O98ZF/jprcmtV29WcWW1LoXLdPXUpdfgdQ5/pLhir8MrCsxRNr1KYQ6SXPNc3eo4rLA/2NrW1hhe8wLIogXkrjU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1629998077; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=tyR1y0HDeb4qDYNOGLutqZ2YiIjaqyovJPhaX/u5RCk=; b=WVc90lzEZXb8jh2CXnMCdh31hpb/8tZzwox0MkHO7JenrzulBTl8Tbh4WOaTgorj0oeRbuk6I8nO5PJZGKJMySTEykTnYS40kgtadKWsRCi5jhd7sQqNgJq2b7KgRQ9YVvtZxTVIPwlErWBqDMEL6Qgs7xENHSblwz5fE+9GQhI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1629998077531365.6421077374936; Thu, 26 Aug 2021 10:14:37 -0700 (PDT) Received: from localhost ([::1]:48534 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mJIxY-0005Iz-H1 for importer@patchew.org; Thu, 26 Aug 2021 13:14:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44802) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mJImi-0005FI-FM for qemu-devel@nongnu.org; Thu, 26 Aug 2021 13:03:24 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]:33759) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mJImd-0008Jx-Tj for qemu-devel@nongnu.org; Thu, 26 Aug 2021 13:03:24 -0400 Received: by mail-wm1-x335.google.com with SMTP id j14-20020a1c230e000000b002e748b9a48bso5954454wmj.0 for ; Thu, 26 Aug 2021 10:03:19 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id i21sm3632470wrb.62.2021.08.26.10.03.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Aug 2021 10:03:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=tyR1y0HDeb4qDYNOGLutqZ2YiIjaqyovJPhaX/u5RCk=; b=r0VOVJgvnqQAIROCgP/vEh61C8Viks7tdU6rWw3GuFrDnM1YdvqgWRrJiyAlikHnSf m53DGyTkti/HCzBKV92d2MOUKzNY66bNdSvGZ/gno6/A7QAcOjRhO9SGv5kvwGNfdzVw qZnhmiCt3fw/MnmuBTJ8SXCnZVbZjdr30j+keUkBoNDJZf5HKMRIGmmuJnBvI7SFixu/ r5fa7cWW0kUtlv5EFaq0DLwWTcRisMw7lUP6iMckveOvEhtqOyIq9eAxwO6XFCPaqGki gZV1pL6DQ1dcFso6kDMpqyLqPdevM2myhwOrBMkocQIfuJSi3GyZduDxHsJ/1meoVn5P +K4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tyR1y0HDeb4qDYNOGLutqZ2YiIjaqyovJPhaX/u5RCk=; b=a77vWiojOVQnqwgM+NgdrxhqCZChKraiKcvMQt470cu9FAuFlqPAjFKsm0UMRU++fS M5R2t+kICr+8/9ZuEs9HQLQALA2/OlyPF5JlqzbUSm71x/dJjSb7PoMyXg1w3yKHM12m W7ohD+W7tN90vX4OpKWH0jv5FFnSM9ijniNzMOsq0hQT2hZngqFIkqWl2TL15pMT1DwR dltfLv6KXUKGtKORHp3Bx80wHk9xA+OM7gcxi9FcFvM+7EcCR934WvtgieTxUWFxC/FW RMMs0Rgy5a3PWJX9nKsblfALVXcez2hzv3vLeMwfFWbhPPC1PzfQlNBzqjNgSgkEMtBe H0aQ== X-Gm-Message-State: AOAM531WBc2pT1v88wT4daQAFD/LFMwstBlCLQziCX5eR7Oi3SsI9CJs 1SS2Ky3lZwT7B3skWGuhT7lsh6m3FR6UwQ== X-Google-Smtp-Source: ABdhPJwJdl7dmTI2nCmFKYKloiS/ieSIgtjEWHq+KjkfDP7W+Fw3tbEBFnJZxsXd4LvMgy9fhPeuOg== X-Received: by 2002:a05:600c:3514:: with SMTP id h20mr15521753wmq.31.1629997398429; Thu, 26 Aug 2021 10:03:18 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/37] target/arm/cpu64: Replace kvm_supported with sve_vq_supported Date: Thu, 26 Aug 2021 18:02:38 +0100 Message-Id: <20210826170307.27733-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210826170307.27733-1-peter.maydell@linaro.org> References: <20210826170307.27733-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1629998078146100001 From: Andrew Jones Now that we have an ARMCPU member sve_vq_supported we no longer need the local kvm_supported bitmap for KVM's supported vector lengths. Signed-off-by: Andrew Jones Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20210823160647.34028-4-drjones@redhat.com Signed-off-by: Peter Maydell --- target/arm/cpu64.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index eb9318c83b7..557fd475774 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -265,14 +265,17 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) * any of the above. Finally, if SVE is not disabled, then at least o= ne * vector length must be enabled. */ - DECLARE_BITMAP(kvm_supported, ARM_MAX_VQ); DECLARE_BITMAP(tmp, ARM_MAX_VQ); uint32_t vq, max_vq =3D 0; =20 - /* Collect the set of vector lengths supported by KVM. */ - bitmap_zero(kvm_supported, ARM_MAX_VQ); + /* + * CPU models specify a set of supported vector lengths which are + * enabled by default. Attempting to enable any vector length not set + * in the supported bitmap results in an error. When KVM is enabled we + * fetch the supported bitmap from the host. + */ if (kvm_enabled() && kvm_arm_sve_supported()) { - kvm_arm_sve_get_vls(CPU(cpu), kvm_supported); + kvm_arm_sve_get_vls(CPU(cpu), cpu->sve_vq_supported); } else if (kvm_enabled()) { assert(!cpu_isar_feature(aa64_sve, cpu)); } @@ -299,7 +302,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) * For KVM we have to automatically enable all supported uniti= alized * lengths, even when the smaller lengths are not all powers-o= f-two. */ - bitmap_andnot(tmp, kvm_supported, cpu->sve_vq_init, max_vq); + bitmap_andnot(tmp, cpu->sve_vq_supported, cpu->sve_vq_init, ma= x_vq); bitmap_or(cpu->sve_vq_map, cpu->sve_vq_map, tmp, max_vq); } else { /* Propagate enabled bits down through required powers-of-two.= */ @@ -322,12 +325,12 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) /* Disabling a supported length disables all larger lengths. */ for (vq =3D 1; vq <=3D ARM_MAX_VQ; ++vq) { if (test_bit(vq - 1, cpu->sve_vq_init) && - test_bit(vq - 1, kvm_supported)) { + test_bit(vq - 1, cpu->sve_vq_supported)) { break; } } max_vq =3D vq <=3D ARM_MAX_VQ ? vq - 1 : ARM_MAX_VQ; - bitmap_andnot(cpu->sve_vq_map, kvm_supported, + bitmap_andnot(cpu->sve_vq_map, cpu->sve_vq_supported, cpu->sve_vq_init, max_vq); if (max_vq =3D=3D 0 || bitmap_empty(cpu->sve_vq_map, max_vq)) { error_setg(errp, "cannot disable sve%d", vq * 128); @@ -392,7 +395,7 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) =20 if (kvm_enabled()) { /* Ensure the set of lengths matches what KVM supports. */ - bitmap_xor(tmp, cpu->sve_vq_map, kvm_supported, max_vq); + bitmap_xor(tmp, cpu->sve_vq_map, cpu->sve_vq_supported, max_vq); if (!bitmap_empty(tmp, max_vq)) { vq =3D find_last_bit(tmp, max_vq) + 1; if (test_bit(vq - 1, cpu->sve_vq_map)) { --=20 2.20.1