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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1629606032840100001 Content-Type: text/plain; charset="utf-8" Fix a typo for ESR_EC_DIVZERO, which is integral not floating-point. Fix the if ladder for decoding floating-point exceptions. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- linux-user/microblaze/cpu_loop.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_l= oop.c index 9e07e52573..4a75c853b2 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -81,15 +81,25 @@ void cpu_loop(CPUMBState *env) env->iflags &=3D ~(IMM_FLAG | D_FLAG); switch (env->esr & 31) { case ESR_EC_DIVZERO: - si_code =3D TARGET_FPE_FLTDIV; + si_code =3D TARGET_FPE_INTDIV; break; case ESR_EC_FPU: - si_code =3D 0; - if (env->fsr & FSR_IO) { + /* + * Note that the kernel passes along fsr as si_code + * if there's no recognized bit set. Possibly this + * implies that si_code is 0, but follow the structure. + */ + si_code =3D env->fsr; + if (si_code & FSR_IO) { si_code =3D TARGET_FPE_FLTINV; - } - if (env->fsr & FSR_DZ) { + } else if (si_code & FSR_OF) { + si_code =3D TARGET_FPE_FLTOVF; + } else if (si_code & FSR_UF) { + si_code =3D TARGET_FPE_FLTUND; + } else if (si_code & FSR_DZ) { si_code =3D TARGET_FPE_FLTDIV; + } else if (si_code & FSR_DO) { + si_code =3D TARGET_FPE_FLTRES; } break; default: --=20 2.25.1