From nobody Mon Feb 9 21:21:23 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1629393367; cv=none; d=zohomail.com; s=zohoarc; b=JBwKHeXV0OgBBeoeNG+pEWaClnM84yHZjwBQ/2apzjrSsBKGPnYmtVQTq66sa+g/UwYiyb5JBqsVS2aApx69SH1W0GGjk1c+kPqQyGbcviA4SKQTaJcLJLLA7OEIKXQkzz0/2jtgO8lPgpc8Q0IlxeDUzjVp52dpxp+rdEHk0d4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1629393367; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=OAHzBAmbVApY1o+QnWvkEcFu0dMTB1soFMwucFnim0U=; b=AK1Nl8LW5WFcRY4CQNxV20gm0NddlhCB6zVnseG1qdJO/TijZSPGyFYVXI+DGUWrMYvOzIJaKHlEASpb1VbRb0Tn0/HVKKwFNj+uGHOSRxc+A4JXsoPQsNknOp0r2rg0AQ5+NemC6qv1QQzMx58x17NvlJZBzmJNyqk8Fl6QjVE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1629393367627851.4799783083948; Thu, 19 Aug 2021 10:16:07 -0700 (PDT) Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-403-34TdXkAKPCeK5KqIQTqb3Q-1; Thu, 19 Aug 2021 13:16:04 -0400 Received: by mail-wm1-f69.google.com with SMTP id y23-20020a7bcd97000000b002e6e4a2a332so1492622wmj.0 for ; Thu, 19 Aug 2021 10:16:04 -0700 (PDT) Return-Path: Return-Path: Received: from x1w.. (163.red-83-52-55.dynamicip.rima-tde.net. [83.52.55.163]) by smtp.gmail.com with ESMTPSA id p18sm3425902wrt.13.2021.08.19.10.16.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Aug 2021 10:16:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1629393366; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OAHzBAmbVApY1o+QnWvkEcFu0dMTB1soFMwucFnim0U=; b=J0KC1QLHoPaw2U1v2WBJpm4/wOJxbhEFn/HwSVabrxECPtPuV/C11rilxsvfFCc2qKPCvo KYmKKRulCWCEHXHVGgnaAn8jRRN43FbEQKQi+6iopnHLZ+SAr9ZYHinbHlXQyXS3lc6vil punx6Ilr8CEe7R4v6RoK3RsZtvn4rwA= X-MC-Unique: 34TdXkAKPCeK5KqIQTqb3Q-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OAHzBAmbVApY1o+QnWvkEcFu0dMTB1soFMwucFnim0U=; b=O6vk14QjeMg7StYD21v/H0siBpz1xHBhdkCqhjtfI6DDWtT2uZM0fueSvMPHRcSzuq ovvVKSIZ35KWcEzWdvw+1bGhOuRvqwgRvo2XEdy7BncTL8x9xOMhS9DI1k1AyP8TU58i aeA/frFYkoVtTT0UUbh5tEPqrHq0J58LVH8fgnjFgeKKvQNDVl09bnUssbonEcVT6ct6 2c+V2HnhthM5Snr0BDcrn10BBMi3Y7y5B1k+BQsl3SF+rI2PENRm6hmkxgtlHS83vnLS /ZC2HtI7umDg3K4HUD5t+9xH2gBN2YvzEFj6ioTEDvWLb9NqgkbYkfvrQmxRBjCB/gPx 28Bw== X-Gm-Message-State: AOAM532Um0T4tFK4vk8xphXSc+jji+r7ZtfifzH58GIV+b5whMjwXuKo aONrFf+WdgBUt+cEBDGeGQBL5gIC1ZBf89+raqCDWJome8VBl7d4me3rcoD66VON8CGEMUhYBTY PmMM2CXR7id0XnQ== X-Received: by 2002:adf:f141:: with SMTP id y1mr5181764wro.173.1629393363325; Thu, 19 Aug 2021 10:16:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyshhncxDnsLvZxeSmqubxDfjoXBGsNe/dFrzgNKjZBFnqzvNy5o59Txez18wjv/QUrxP//Ew== X-Received: by 2002:adf:f141:: with SMTP id y1mr5181744wro.173.1629393363117; Thu, 19 Aug 2021 10:16:03 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Eduardo Habkost , Richard Henderson , Marcel Apfelbaum , Gerd Hoffmann , Paolo Bonzini , Sergio Lopez , Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 3/3] hw/usb/xhci: Always expect 'dma' link property to be set Date: Thu, 19 Aug 2021 19:15:47 +0200 Message-Id: <20210819171547.2879725-4-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210819171547.2879725-1-philmd@redhat.com> References: <20210819171547.2879725-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1629393486238100001 Simplify by always passing a MemoryRegion property to the device. Doing so we can move the AddressSpace field to the device struct, removing need for heap allocation. Update the MicroVM machine to pass the default system memory instead of a NULL value. We don't need to change the Versal machine, as the link property is initialize as "versal.dwc3_alias" MemoryRegion alias. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- Versal untested --- hw/usb/hcd-xhci.h | 2 +- hw/i386/microvm.c | 2 ++ hw/usb/hcd-xhci-pci.c | 3 ++- hw/usb/hcd-xhci-sysbus.c | 13 ++++++------- hw/usb/hcd-xhci.c | 20 ++++++++++---------- 5 files changed, 21 insertions(+), 19 deletions(-) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 98f598382ad..ea76ec4f277 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -180,7 +180,7 @@ typedef struct XHCIState { USBBus bus; MemoryRegion mem; MemoryRegion *dma_mr; - AddressSpace *as; + AddressSpace as; MemoryRegion mem_cap; MemoryRegion mem_oper; MemoryRegion mem_runtime; diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index aba0c832190..642bf0d6811 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -219,6 +219,8 @@ static void microvm_devices_init(MicrovmMachineState *m= ms) qdev_prop_set_uint32(dev, "slots", XHCI_MAXSLOTS); qdev_prop_set_uint32(dev, "p2", 8); qdev_prop_set_uint32(dev, "p3", 8); + object_property_set_link(OBJECT(dev), "dma", + OBJECT(get_system_memory()), &error_fatal= ); sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MICROVM_XHCI_BASE); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c index 71f6629ccde..a959943d856 100644 --- a/hw/usb/hcd-xhci-pci.c +++ b/hw/usb/hcd-xhci-pci.c @@ -116,6 +116,8 @@ static void usb_xhci_pci_realize(struct PCIDevice *dev,= Error **errp) dev->config[0x60] =3D 0x30; /* release number */ =20 object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), &error_f= atal); + object_property_set_link(OBJECT(dev), "dma", + OBJECT(pci_dma_memory_region(dev)), &error_fa= tal); s->xhci.intr_update =3D xhci_pci_intr_update; s->xhci.intr_raise =3D xhci_pci_intr_raise; if (!qdev_realize(DEVICE(&s->xhci), NULL, errp)) { @@ -161,7 +163,6 @@ static void usb_xhci_pci_realize(struct PCIDevice *dev,= Error **errp) &s->xhci.mem, 0, OFF_MSIX_PBA, 0x90, NULL); } - s->xhci.as =3D pci_get_address_space(dev); } =20 static void usb_xhci_pci_exit(PCIDevice *dev) diff --git a/hw/usb/hcd-xhci-sysbus.c b/hw/usb/hcd-xhci-sysbus.c index a14e4381960..f212ce785bd 100644 --- a/hw/usb/hcd-xhci-sysbus.c +++ b/hw/usb/hcd-xhci-sysbus.c @@ -36,6 +36,11 @@ static void xhci_sysbus_realize(DeviceState *dev, Error = **errp) { XHCISysbusState *s =3D XHCI_SYSBUS(dev); =20 + if (!s->xhci.dma_mr) { + error_setg(errp, TYPE_XHCI_SYSBUS " 'dma' link not set"); + return; + } + object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL); if (!qdev_realize(DEVICE(&s->xhci), NULL, errp)) { return; @@ -43,13 +48,7 @@ static void xhci_sysbus_realize(DeviceState *dev, Error = **errp) s->irq =3D g_new0(qemu_irq, s->xhci.numintrs); qdev_init_gpio_out_named(dev, s->irq, SYSBUS_DEVICE_GPIO_IRQ, s->xhci.numintrs); - if (s->xhci.dma_mr) { - s->xhci.as =3D g_malloc0(sizeof(AddressSpace)); - address_space_init(s->xhci.as, s->xhci.dma_mr, NULL); - } else { - s->xhci.as =3D &address_space_memory; - } - + address_space_init(&s->xhci.as, s->xhci.dma_mr, "usb-xhci-dma"); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->xhci.mem); } =20 diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index e01700039b1..011f1233ef3 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -487,7 +487,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, = dma_addr_t addr, =20 assert((len % sizeof(uint32_t)) =3D=3D 0); =20 - dma_memory_read(xhci->as, addr, buf, len); + dma_memory_read(&xhci->as, addr, buf, len); =20 for (i =3D 0; i < (len / sizeof(uint32_t)); i++) { buf[i] =3D le32_to_cpu(buf[i]); @@ -507,7 +507,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci,= dma_addr_t addr, for (i =3D 0; i < n; i++) { tmp[i] =3D cpu_to_le32(buf[i]); } - dma_memory_write(xhci->as, addr, tmp, len); + dma_memory_write(&xhci->as, addr, tmp, len); } =20 static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) @@ -618,7 +618,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent= *event, int v) ev_trb.status, ev_trb.control); =20 addr =3D intr->er_start + TRB_SIZE*intr->er_ep_idx; - dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE); + dma_memory_write(&xhci->as, addr, &ev_trb, TRB_SIZE); =20 intr->er_ep_idx++; if (intr->er_ep_idx >=3D intr->er_size) { @@ -679,7 +679,7 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRin= g *ring, XHCITRB *trb, =20 while (1) { TRBType type; - dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE); + dma_memory_read(&xhci->as, ring->dequeue, trb, TRB_SIZE); trb->addr =3D ring->dequeue; trb->ccs =3D ring->ccs; le64_to_cpus(&trb->parameter); @@ -726,7 +726,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, cons= t XHCIRing *ring) =20 while (1) { TRBType type; - dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE); + dma_memory_read(&xhci->as, dequeue, &trb, TRB_SIZE); le64_to_cpus(&trb.parameter); le32_to_cpus(&trb.status); le32_to_cpus(&trb.control); @@ -781,7 +781,7 @@ static void xhci_er_reset(XHCIState *xhci, int v) xhci_die(xhci); return; } - dma_memory_read(xhci->as, erstba, &seg, sizeof(seg)); + dma_memory_read(&xhci->as, erstba, &seg, sizeof(seg)); le32_to_cpus(&seg.addr_low); le32_to_cpus(&seg.addr_high); le32_to_cpus(&seg.size); @@ -1393,7 +1393,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, i= nt in_xfer) int i; =20 xfer->int_req =3D false; - qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as); + qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, &xhci->as); for (i =3D 0; i < xfer->trb_count; i++) { XHCITRB *trb =3D &xfer->trbs[i]; dma_addr_t addr; @@ -2059,7 +2059,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, un= signed int slotid, assert(slotid >=3D 1 && slotid <=3D xhci->numslots); =20 dcbaap =3D xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); - poctx =3D ldq_le_dma(xhci->as, dcbaap + 8 * slotid); + poctx =3D ldq_le_dma(&xhci->as, dcbaap + 8 * slotid); ictx =3D xhci_mask64(pictx); octx =3D xhci_mask64(poctx); =20 @@ -2397,7 +2397,7 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState *xh= ci, uint64_t pctx) /* TODO: actually implement real values here */ bw_ctx[0] =3D 0; memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ - dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx)); + dma_memory_write(&xhci->as, ctx, bw_ctx, sizeof(bw_ctx)); =20 return CC_SUCCESS; } @@ -3434,7 +3434,7 @@ static int usb_xhci_post_load(void *opaque, int versi= on_id) continue; } slot->ctx =3D - xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid)); + xhci_mask64(ldq_le_dma(&xhci->as, dcbaap + 8 * slotid)); xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); slot->uport =3D xhci_lookup_uport(xhci, slot_ctx); if (!slot->uport) { --=20 2.31.1