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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id m7sm7733487wmq.29.2021.08.19.09.34.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Aug 2021 09:34:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1629390881; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zypsqy4bbbHKSJYTV7SCgvLzNsZfKZVVCMytHeZVqM4=; b=ZqlA+ED5+kphrIR+MLKQQwoC5Uq+Rn9dyo2BuKOuVf2BgZtf+Ks/w3UCMTr5pX7U/mE4n8 AOCQd0RviwyNdnY5Fx0QbSar0vj4qVe33DJAxyKWzAcWGH/mI+zU708xg3js+3Iw08p459 7hK55CY8aR7VuXGPpgn1rVpXyBI/cR4= X-MC-Unique: x83_LyBjOUmmlk6_kkqqTQ-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zypsqy4bbbHKSJYTV7SCgvLzNsZfKZVVCMytHeZVqM4=; b=V0HnK+w/ld9knH/xA3ggNOLRr0khP3JM4B+PMsE+4q37abZhOAgSd3DY7eEQykLCiN T13jl4Z7AvQ38Z1YEsIgq4rt28iXyGY2bvu9AGKncjD8DWwScTwz0RXGgtsgtOtPd+Ni lt5nA0KKfase3ruvaiYFIuLEx3Oe8AgiqrDo0bgRXOyclJhzKNIGHQ04u/3pooTO7w12 Hi3G3u0nd2FA1qO52h6hoezbM7wd6ZYSkcFTliPNx601lTp27CVO42gK9ySS1yJSyHp1 dgfCLyEpMgTf59/X+tVTc8w66EQ/S3Y7yCeJMX6v48P5GAQ2U9xiyi4fbXAVngI3xTMp umeg== X-Gm-Message-State: AOAM5331oXzC0VWXUB9hqw7WlacX/lKA3DeXOE8ndyOWOyrAzYYouxNY nHIFyHCDzTJhNYyDVoa4Z2rdbKN0LLtjocSBBugWi4NWCKlOJM8sxqk0ttGFMvEAqwF8zNAqzIC yhb1UzcWiM4T/3w== X-Received: by 2002:a7b:c2f0:: with SMTP id e16mr14558479wmk.144.1629390878549; Thu, 19 Aug 2021 09:34:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwAGPWSpgOnH0JBICXXHKKK05Tc60a5QFPC80BT4Z+hHxsrm06VfU/mKBdnX2nLXrsyvcnTFg== X-Received: by 2002:a7b:c2f0:: with SMTP id e16mr14558463wmk.144.1629390878399; Thu, 19 Aug 2021 09:34:38 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Peter Maydell , qemu-arm@nongnu.org, Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 3/4] hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be set Date: Thu, 19 Aug 2021 18:34:21 +0200 Message-Id: <20210819163422.2863447-4-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210819163422.2863447-1-philmd@redhat.com> References: <20210819163422.2863447-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1629390883772100001 Simplify by always passing a MemoryRegion property to the device. Doing so we can move the AddressSpace field to the device struct, removing need for heap allocation. Update the Xilinx ZynqMP SoC model to pass the default system memory instead of a NULL value. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell --- include/hw/dma/xlnx_csu_dma.h | 2 +- hw/arm/xlnx-zynqmp.c | 4 ++++ hw/dma/xlnx_csu_dma.c | 21 ++++++++++----------- 3 files changed, 15 insertions(+), 12 deletions(-) diff --git a/include/hw/dma/xlnx_csu_dma.h b/include/hw/dma/xlnx_csu_dma.h index 204d94c6737..9e9dc551e99 100644 --- a/include/hw/dma/xlnx_csu_dma.h +++ b/include/hw/dma/xlnx_csu_dma.h @@ -30,7 +30,7 @@ typedef struct XlnxCSUDMA { MemoryRegion iomem; MemTxAttrs attr; MemoryRegion *dma_mr; - AddressSpace *dma_as; + AddressSpace dma_as; qemu_irq irq; StreamSink *tx_dev; /* Used as generic StreamSink */ ptimer_state *src_timer; diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 9724978761b..4344e223f2d 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -620,6 +620,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Erro= r **errp) gic_spi[adma_ch_intr[i]]); } =20 + if (!object_property_set_link(OBJECT(&s->qspi_dma), "dma", + OBJECT(system_memory), errp)) { + return; + } if (!sysbus_realize(SYS_BUS_DEVICE(&s->qspi_dma), errp)) { return; } diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c index 2d19f415ef3..896bb3574dd 100644 --- a/hw/dma/xlnx_csu_dma.c +++ b/hw/dma/xlnx_csu_dma.c @@ -201,11 +201,11 @@ static uint32_t xlnx_csu_dma_read(XlnxCSUDMA *s, uint= 8_t *buf, uint32_t len) for (i =3D 0; i < len && (result =3D=3D MEMTX_OK); i +=3D s->width= ) { uint32_t mlen =3D MIN(len - i, s->width); =20 - result =3D address_space_rw(s->dma_as, addr, s->attr, + result =3D address_space_rw(&s->dma_as, addr, s->attr, buf + i, mlen, false); } } else { - result =3D address_space_rw(s->dma_as, addr, s->attr, buf, len, fa= lse); + result =3D address_space_rw(&s->dma_as, addr, s->attr, buf, len, f= alse); } =20 if (result =3D=3D MEMTX_OK) { @@ -232,12 +232,12 @@ static uint32_t xlnx_csu_dma_write(XlnxCSUDMA *s, uin= t8_t *buf, uint32_t len) for (i =3D 0; i < len && (result =3D=3D MEMTX_OK); i +=3D s->width= ) { uint32_t mlen =3D MIN(len - i, s->width); =20 - result =3D address_space_rw(s->dma_as, addr, s->attr, + result =3D address_space_rw(&s->dma_as, addr, s->attr, buf, mlen, true); buf +=3D mlen; } } else { - result =3D address_space_rw(s->dma_as, addr, s->attr, buf, len, tr= ue); + result =3D address_space_rw(&s->dma_as, addr, s->attr, buf, len, t= rue); } =20 if (result !=3D MEMTX_OK) { @@ -631,6 +631,12 @@ static void xlnx_csu_dma_realize(DeviceState *dev, Err= or **errp) return; } =20 + if (!s->dma_mr) { + error_setg(errp, TYPE_XLNX_CSU_DMA " 'dma' link not set"); + return; + } + address_space_init(&s->dma_as, s->dma_mr, "csu-dma"); + reg_array =3D register_init_block32(dev, xlnx_csu_dma_regs_info[!!s->is_dst], XLNX_CSU_DMA_R_MAX, @@ -648,13 +654,6 @@ static void xlnx_csu_dma_realize(DeviceState *dev, Err= or **errp) s->src_timer =3D ptimer_init(xlnx_csu_dma_src_timeout_hit, s, PTIMER_POLICY_DEFAULT); =20 - if (s->dma_mr) { - s->dma_as =3D g_malloc0(sizeof(AddressSpace)); - address_space_init(s->dma_as, s->dma_mr, NULL); - } else { - s->dma_as =3D &address_space_memory; - } - s->attr =3D MEMTXATTRS_UNSPECIFIED; =20 s->r_size_last_word =3D 0; --=20 2.31.1