From nobody Tue Feb 10 11:14:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1627521185; cv=none; d=zohomail.com; s=zohoarc; b=YVePxkFwmSzowgbXgT9SwjK2Rod3NXqiM3MEyfC+OcmKf55DchuGLuCCrajEa2NgjzdBOGHd7pX5FKvyY1q+65xWrG3bQ2BHbekuSXydvBHdtqdBDs8hFQ2dcahdBizyippAvt0Q4R32x0JKPEl/C+LanD0l35lu1J4b/LJ2yrs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1627521185; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=KtHrCMSK7Nl7NnSRCIKaSQmUffpETjRi2cgM4IGILXk=; b=fegI7tH/0T9hozcGh9aNdUZRbfuHXLqvVlfvdpoPFtaLhy9EJ6XFtpM4w0QGWacgFZbqiD5Dltoq7q41FL0KdHE8ygQHjRKKyoY6IlghmnkEeNZYykvx3pgcYnILg44uDGtiekycjjzA1Ta1Tqik0OR2M2LVRAeDn7Nz5ibe/9A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1627521185489704.7753043100283; Wed, 28 Jul 2021 18:13:05 -0700 (PDT) Received: from localhost ([::1]:42660 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m8ubg-0008Jb-DM for importer@patchew.org; Wed, 28 Jul 2021 21:13:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37404) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m8uD7-0005BE-16 for qemu-devel@nongnu.org; Wed, 28 Jul 2021 20:47:42 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]:36666) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m8uD4-0002sD-GV for qemu-devel@nongnu.org; Wed, 28 Jul 2021 20:47:40 -0400 Received: by mail-pj1-x102e.google.com with SMTP id ds11-20020a17090b08cbb0290172f971883bso12931689pjb.1 for ; Wed, 28 Jul 2021 17:47:36 -0700 (PDT) Received: from cloudburst.home (2603-800c-3202-ffa7-dcaa-9e71-a2b2-2604.res6.spectrum.com. [2603:800c:3202:ffa7:dcaa:9e71:a2b2:2604]) by smtp.gmail.com with ESMTPSA id t205sm1305005pfc.32.2021.07.28.17.47.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Jul 2021 17:47:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KtHrCMSK7Nl7NnSRCIKaSQmUffpETjRi2cgM4IGILXk=; b=j3GNIJ/sGSFpN9dynQcKz//YSj3thPyDIM2xPSBXsFY7YNjyawt3BLpcgkGMmhlwQx UlxJdmNMW5Dbw/YAdQkyNV39lNiDL3qVg8Xb0ogopWVZC1L2eLj2x9srnJxOOB8ADKEX fT/FVMf4KSU7hcj53NWSjW8By7UrV7SRM4kp2oERWbj6GPBclEdxUJVVjZ07s9LjNFkc lXCw+dFAv2I364nAvS85xvKYa9Jt791URSCuj5R6Kc6Ua64EOzYKv9RR1BmKVY0L13fS kwDULizwgkVixdO+/n+Nu6wRALp64xULSneA2IsftFedR5zBUVd0CndCSKMV8BUobHz7 KhcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KtHrCMSK7Nl7NnSRCIKaSQmUffpETjRi2cgM4IGILXk=; b=X6CvLZF9Z9+aIVpso3qQtueZmzNoADRbx4UI2doXqm9AyRm5+5E/BvAka49iHGLmdE 0dXC3a59ygX6+E2vkhCPZnCMBb2wu/3JRYUBJ96RSr58HzDxtFY5QbKhnr57ZivgoQNj B/dmav0qQ18JRq4Ydu78R+JOcuxGGUWm2tzeHMEni/5ob1CpSnhUgoblgT6k6tzJSr5L hR9juz1YlChWny8KKZUE0texhbxEe9An3S72P40tUMWOjQ8eFrPWRx60JBshvE7/4kYH s7E8r9faH2gjsWZ3VneuoN6Brc4w1gshVC3BKu416aLHTvbKzn3TXgGyVDUVUstqpOjf oy0A== X-Gm-Message-State: AOAM531JQBr2U7CJrOMhICf9nrFCg7j5kpTrewEeb3T+fbVRPqnbG5gH 5z/dsGt1iqh4O/0WwXSBp5+QOP+q7dW4Lg== X-Google-Smtp-Source: ABdhPJwGlzbJ1pu9nL+NG2oURcEVhKkYZxvUuwb8QaPsVDnJUMIIoMAwwQn0hyuEYoCrDu71ZPSjxg== X-Received: by 2002:aa7:9ac9:0:b029:377:8e8d:910e with SMTP id x9-20020aa79ac90000b02903778e8d910emr2313159pfp.28.1627519655767; Wed, 28 Jul 2021 17:47:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.2 38/43] target/arm: Use cpu_*_mmu instead of helper_*_mmu Date: Wed, 28 Jul 2021 14:46:42 -1000 Message-Id: <20210729004647.282017-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210729004647.282017-1-richard.henderson@linaro.org> References: <20210729004647.282017-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1627521187217100001 Content-Type: text/plain; charset="utf-8" The helper_*_mmu functions were the only thing available when this code was written. This could have been adjusted when we added cpu_*_mmuidx_ra, but now we can most easily use the newest set of interfaces. Cc: qemu-arm@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/helper-a64.c | 52 +++++++---------------------------------- target/arm/m_helper.c | 6 ++--- 2 files changed, 11 insertions(+), 47 deletions(-) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index f1a4089a4f..17c0ebebb2 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -512,37 +512,19 @@ uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env= , uint64_t addr, uintptr_t ra =3D GETPC(); uint64_t o0, o1; bool success; - -#ifdef CONFIG_USER_ONLY - /* ??? Enforce alignment. */ - uint64_t *haddr =3D g2h(env_cpu(env), addr); - - set_helper_retaddr(ra); - o0 =3D ldq_le_p(haddr + 0); - o1 =3D ldq_le_p(haddr + 1); - oldv =3D int128_make128(o0, o1); - - success =3D int128_eq(oldv, cmpv); - if (success) { - stq_le_p(haddr + 0, int128_getlo(newv)); - stq_le_p(haddr + 1, int128_gethi(newv)); - } - clear_helper_retaddr(); -#else int mem_idx =3D cpu_mmu_index(env, false); MemOpIdx oi0 =3D make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx); MemOpIdx oi1 =3D make_memop_idx(MO_LEQ, mem_idx); =20 - o0 =3D helper_le_ldq_mmu(env, addr + 0, oi0, ra); - o1 =3D helper_le_ldq_mmu(env, addr + 8, oi1, ra); + o0 =3D cpu_ldq_le_mmu(env, addr + 0, oi0, ra); + o1 =3D cpu_ldq_le_mmu(env, addr + 8, oi1, ra); oldv =3D int128_make128(o0, o1); =20 success =3D int128_eq(oldv, cmpv); if (success) { - helper_le_stq_mmu(env, addr + 0, int128_getlo(newv), oi1, ra); - helper_le_stq_mmu(env, addr + 8, int128_gethi(newv), oi1, ra); + cpu_stq_le_mmu(env, addr + 0, int128_getlo(newv), oi1, ra); + cpu_stq_le_mmu(env, addr + 8, int128_gethi(newv), oi1, ra); } -#endif =20 return !success; } @@ -582,37 +564,19 @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env= , uint64_t addr, uintptr_t ra =3D GETPC(); uint64_t o0, o1; bool success; - -#ifdef CONFIG_USER_ONLY - /* ??? Enforce alignment. */ - uint64_t *haddr =3D g2h(env_cpu(env), addr); - - set_helper_retaddr(ra); - o1 =3D ldq_be_p(haddr + 0); - o0 =3D ldq_be_p(haddr + 1); - oldv =3D int128_make128(o0, o1); - - success =3D int128_eq(oldv, cmpv); - if (success) { - stq_be_p(haddr + 0, int128_gethi(newv)); - stq_be_p(haddr + 1, int128_getlo(newv)); - } - clear_helper_retaddr(); -#else int mem_idx =3D cpu_mmu_index(env, false); MemOpIdx oi0 =3D make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx); MemOpIdx oi1 =3D make_memop_idx(MO_BEQ, mem_idx); =20 - o1 =3D helper_be_ldq_mmu(env, addr + 0, oi0, ra); - o0 =3D helper_be_ldq_mmu(env, addr + 8, oi1, ra); + o1 =3D cpu_ldq_be_mmu(env, addr + 0, oi0, ra); + o0 =3D cpu_ldq_be_mmu(env, addr + 8, oi1, ra); oldv =3D int128_make128(o0, o1); =20 success =3D int128_eq(oldv, cmpv); if (success) { - helper_be_stq_mmu(env, addr + 0, int128_gethi(newv), oi1, ra); - helper_be_stq_mmu(env, addr + 8, int128_getlo(newv), oi1, ra); + cpu_stq_be_mmu(env, addr + 0, int128_gethi(newv), oi1, ra); + cpu_stq_be_mmu(env, addr + 8, int128_getlo(newv), oi1, ra); } -#endif =20 return !success; } diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index efb522dc44..b6019595f5 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -1947,9 +1947,9 @@ static bool do_v7m_function_return(ARMCPU *cpu) * do them as secure, so work out what MMU index that is. */ mmu_idx =3D arm_v7m_mmu_idx_for_secstate(env, true); - oi =3D make_memop_idx(MO_LE, arm_to_core_mmu_idx(mmu_idx)); - newpc =3D helper_le_ldul_mmu(env, frameptr, oi, 0); - newpsr =3D helper_le_ldul_mmu(env, frameptr + 4, oi, 0); + oi =3D make_memop_idx(MO_LEUL, arm_to_core_mmu_idx(mmu_idx)); + newpc =3D cpu_ldl_le_mmu(env, frameptr, oi, 0); + newpsr =3D cpu_ldl_le_mmu(env, frameptr + 4, oi, 0); =20 /* Consistency checks on new IPSR */ newpsr_exc =3D newpsr & XPSR_EXCP; --=20 2.25.1