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[83.42.66.122]) by smtp.gmail.com with ESMTPSA id z17sm2342943wrr.35.2021.07.27.01.30.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Jul 2021 01:30:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Bx9rcOX35rfIqCbITWYIOrgp+fgLyxODd4hlNmjUlrw=; b=X6JcyK2FddbeT53nfI/jOXDZ4awiLnFk4SjqABeSt7dr2yYXCg6tpqS84HxN8BIs8T kVair6PB+ZaptKYrP0LfpYaBpqhtuhkAYkcVH3yuPzezEmWG+bUH5pJ4rTxCqio/YeTf ro20P2soRAKGeEdwXx49tiOZeLnV8qC5D/PTyBjKAAP9sCZcWpqCo2a3hTL/kT3k2YuO CwS7GHIGDuJfVkuEvV9iCokvjFIsfMvHZcetB8ZryVkDXDr4591KgXnFRwCHmQ+9YmZl npqX7FRMYCEi0OjkiNQvcP4HX2luHGdvRvjwM4hORbN1r6zXnaPoBPTM6+D8ef0RSW4V qKXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=Bx9rcOX35rfIqCbITWYIOrgp+fgLyxODd4hlNmjUlrw=; b=IIw0EslQfrJmb5XMrEV3WtutQhReA6KP+HwGw+VMJEtkZAPV5oYE4un51Qo5c9q57L tX4coilnFR79eQ2r6vYFelpQk8DxSts8pzgBjArP0h3DPNyv/n5Xuw4Zs4S7hCTjJrlJ otmCP1CTLfDGXVMuJcndacIkHoHsvxoAxw0ZsRph1N2lSXNmjniXqGd97NjM3NK7LhOc ZLtgaem5iLAum+CYNMmyHsVybefNrpASViTh5a+3W1jxx4ebHpKxGJMk0O0fQ4LM/446 VAANxANfGcWMnS5tjldu3stTPNw4mwCBjjTv5uHEb5doHJW/mLVJUF8ZOXjKydffiaue mwIw== X-Gm-Message-State: AOAM530ftcdgETc/fPkXe4t2vY6EIj/zZtakk2lVRPdSHs5JTdJkd66x MU9GLo4TPG012eQc23ahUjU= X-Google-Smtp-Source: ABdhPJxhSWtGleQLCcn7okxPUAfgWpVByPBeiSo9cSeR05GFkcke/r+hWnkpK3FI7NSyNwrjEqChrw== X-Received: by 2002:a7b:c089:: with SMTP id r9mr2906081wmh.149.1627374645600; Tue, 27 Jul 2021 01:30:45 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aleksandar Rikalo Subject: [PATCH-for-6.1] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6 Date: Tue, 27 Jul 2021 10:30:43 +0200 Message-Id: <20210727083043.1504402-1-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1627374648751100001 Per the "MIPS Architecture Extension: nanoMIPS32 DSP TRM" rev 0.04, MULT and MULTU opcodes: The value of ac selects an accumulator numbered from 0 to 3. When ac=3D0, this refers to the original HI/LO register pair of the MIPS32 architecture. In Release 6 of the MIPS Architecture, accumulators are eliminated from MIPS32. Ensure pre-Release 6 is restricted to HI/LO registers pair. Fixes: 8b3698b2947 ("target/mips: Add emulation of DSP ASE for nanoMIPS - p= art 4") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/mips/tcg/nanomips_translate.c.inc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nan= omips_translate.c.inc index 09e64a69480..1275e6a495e 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -1868,6 +1868,9 @@ static void gen_pool32axf_2_nanomips_insn(DisasContex= t *ctx, uint32_t opc, TCGv_i32 t2 =3D tcg_temp_new_i32(); TCGv_i32 t3 =3D tcg_temp_new_i32(); =20 + if (acc || ctx->insn_flags & ISA_MIPS_R6) { + check_dsp_r2(ctx); + } gen_load_gpr(t0, rs); gen_load_gpr(t1, rt); tcg_gen_trunc_tl_i32(t2, t0); @@ -1925,6 +1928,9 @@ static void gen_pool32axf_2_nanomips_insn(DisasContex= t *ctx, uint32_t opc, TCGv_i32 t2 =3D tcg_temp_new_i32(); TCGv_i32 t3 =3D tcg_temp_new_i32(); =20 + if (acc || ctx->insn_flags & ISA_MIPS_R6) { + check_dsp_r2(ctx); + } gen_load_gpr(t0, rs); gen_load_gpr(t1, rt); tcg_gen_trunc_tl_i32(t2, t0); --=20 2.31.1