From nobody Tue Feb 10 21:59:19 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1627063546660340.60912118992655; Fri, 23 Jul 2021 11:05:46 -0700 (PDT) Received: from localhost ([::1]:39780 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m6zYP-0004KC-CZ for importer@patchew.org; Fri, 23 Jul 2021 14:05:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47476) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m6zPr-0005uw-AF; Fri, 23 Jul 2021 13:56:55 -0400 Received: from [201.28.113.2] (port=37617 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m6zPp-00038U-N4; Fri, 23 Jul 2021 13:56:55 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Fri, 23 Jul 2021 14:56:40 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id 0B174801022; Fri, 23 Jul 2021 14:56:40 -0300 (-03) From: "Lucas Mateus Castro (alqotel)" To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v5 3/3] target/ppc: moved store_40x_sler to helper_regs.c Date: Fri, 23 Jul 2021 14:56:27 -0300 Message-Id: <20210723175627.72847-4-lucas.araujo@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210723175627.72847-1-lucas.araujo@eldorado.org.br> References: <20210723175627.72847-1-lucas.araujo@eldorado.org.br> X-OriginalArrivalTime: 23 Jul 2021 17:56:40.0166 (UTC) FILETIME=[16C3D060:01D77FEC] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=201.28.113.2; envelope-from=lucas.araujo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: luis.pires@eldorado.org.br, fernando.valle@eldorado.org.br, matheus.ferst@eldorado.org.br, "Lucas Mateus Castro \(alqotel\)" , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1627063547902100001 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" moved store_40x_sler from mmu_common.c to helper_regs.c as it is a function to store a value in a special purpose register, so moving it to a file focused in special register manipulation is more appropriate. Signed-off-by: Lucas Mateus Castro (alqotel) --- target/ppc/helper_regs.c | 12 ++++++++++++ target/ppc/mmu_common.c | 10 ---------- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 3723872aa6..405450d863 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -258,6 +258,18 @@ int hreg_store_msr(CPUPPCState *env, target_ulong valu= e, int alter_hv) return excp; } =20 +#ifdef CONFIG_SOFTMMU +void store_40x_sler(CPUPPCState *env, uint32_t val) +{ + /* XXX: TO BE FIXED */ + if (val !=3D 0x00000000) { + cpu_abort(env_cpu(env), + "Little-endian regions are not supported by now\n"); + } + env->spr[SPR_405_SLER] =3D val; +} +#endif /* CONFIG_SOFTMMU */ + #ifndef CONFIG_USER_ONLY void check_tlb_flush(CPUPPCState *env, bool global) { diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index a0518f611b..754509e556 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -622,16 +622,6 @@ static int mmu40x_get_physical_address(CPUPPCState *en= v, mmu_ctx_t *ctx, return ret; } =20 -void store_40x_sler(CPUPPCState *env, uint32_t val) -{ - /* XXX: TO BE FIXED */ - if (val !=3D 0x00000000) { - cpu_abort(env_cpu(env), - "Little-endian regions are not supported by now\n"); - } - env->spr[SPR_405_SLER] =3D val; -} - static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb, hwaddr *raddr, int *prot, target_ulong addre= ss, MMUAccessType access_type, int i) --=20 2.17.1