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[204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bSI7+FYoYzIRMvsyeEg3j2XXfVWM2GYuNosumX6OIpk=; b=etIlMujv0SwxfGrGEVLV30JDq1F12pC8c//fPzSLdieAZL/1xVuH3lvFtsylk7IkxN HyxTAnPTnH/HW970e1LXm2n7qrjdzd9HZ/tZ6cMazDOLVv5fiENJfJgvc+tQiyqqNPRK PK7er8rhdwcSQayvlJJRYTrygW4LoNeO2w8XNFd5GVokkMo4r+hT+wfiP+jOaQdqBZPt 0LYPb8uMC4plrwv38imfd/g3F1NfXDLCokwAGwGIGo7CclXLh7uUY8LICcbkrNrzR7no u/EONKCc3xQ25npiWIHzFvLDtcgYXu8sTfZfwJgy4QhjKxsiGQCC2aDBVrw6UR29lwq7 qY9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bSI7+FYoYzIRMvsyeEg3j2XXfVWM2GYuNosumX6OIpk=; b=iqjj3iEexrl/LmsOz+FwNPBaT7UfjLu2TUlPPqGwF65zsL64p6OZwvAZgSQt0nwY2f UCvhftLAMYOUNCM71xlplGKG+eanaeZ41rwNzJHUFLS7QKZGKOSFGcNC98AxYO+ggNA1 vIINmhNwkknYgQ3QCKwOGbF05pctM3NVFcHuLWchxzE3jj7xZeXauKxtf03tTkaI45ub f69nY3isEPbnhoF+AApSsUK1AK6+Igr4v5adL61hBsK/Hrrr8R02G0NBIHzOryMp46K+ hzyVPVLHbhGLRpT5v+0JqzFJUptwtk7OXX6oQP/eizyMGdKSbgHNuYrF1VEyfYZMzzi5 G81w== X-Gm-Message-State: AOAM533hWDEnfI+/0e5xwOV987UC4Uvr+5+MSlZ4uqOcVglA3Bq9ggsF GTXaxjyZThdzmUGsXQj74k2coGYyuweAJQ== X-Google-Smtp-Source: ABdhPJxGyvbPI1M9bQkDWtmZe9wkD6iME1An6pZH4PRF25UHNppFHGzp3umdzZ3KdpsOzg0gZaq3qQ== X-Received: by 2002:a62:b413:0:b029:327:75dd:c8da with SMTP id h19-20020a62b4130000b029032775ddc8damr28015921pfn.34.1626729764855; Mon, 19 Jul 2021 14:22:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 01/15] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS Date: Mon, 19 Jul 2021 11:22:25 -1000 Message-Id: <20210719212239.428740-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626729952710100003 The space reserved for CF_COUNT_MASK was overly large. Reduce to free up cflags bits and eliminate an extra test. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Peter Maydell Message-Id: <20210717221851.2124573-2-richard.henderson@linaro.org> --- include/exec/exec-all.h | 4 +++- accel/tcg/translate-all.c | 5 ++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 754f4130c9..dfe82ed19c 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -492,7 +492,9 @@ struct TranslationBlock { target_ulong cs_base; /* CS base for this block */ uint32_t flags; /* flags defining in which context the code was genera= ted */ uint32_t cflags; /* compile flags */ -#define CF_COUNT_MASK 0x00007fff + +/* Note that TCG_MAX_INSNS is 512; we validate this match elsewhere. */ +#define CF_COUNT_MASK 0x000001ff #define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */ #define CF_MEMI_ONLY 0x00010000 /* Only instrument memory ops */ #define CF_USE_ICOUNT 0x00020000 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 4df26de858..5cc01d693b 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1428,11 +1428,10 @@ TranslationBlock *tb_gen_code(CPUState *cpu, =20 max_insns =3D cflags & CF_COUNT_MASK; if (max_insns =3D=3D 0) { - max_insns =3D CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { max_insns =3D TCG_MAX_INSNS; } + QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 !=3D TCG_MAX_INSNS); + if (cpu->singlestep_enabled || singlestep) { max_insns =3D 1; } --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730053545913.1295994650234; Mon, 19 Jul 2021 14:27:33 -0700 (PDT) Received: from localhost ([::1]:35612 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5anU-0005jS-Dk for importer@patchew.org; Mon, 19 Jul 2021 17:27:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60466) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aiv-0003oC-8v for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:49 -0400 Received: from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c]:54206) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5ait-0000lq-KB for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:49 -0400 Received: by mail-pj1-x102c.google.com with SMTP id p9so12413344pjl.3 for ; Mon, 19 Jul 2021 14:22:47 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lIy9EI7XitWw8lbY9Bxr/rosSq+mhVjP0cNUkw2lFHM=; b=V67TnYsattLVHYDdYh1MZTOA8pyxM3GA9j9o15vdWJSoMSi4oEnd36GUbVNKctk7Dn ZcoduRsZdSD1MWGe1663TjgQ1RDdbqzKiIZFU70k18bwVLPUobY/T17GXpp2PQHLUDuH NZ1UFK+lq56v27ENf36eKcyewERiir6hXcdnmllZbSY2CiclEvvy+VKhLoFkhwlW4zUC otRLcm47iojpAgvwW1cAf1Q0xnrH5Vvh+mJ0SfOZG4W/rOdq1t84TmGy875YaWnSQ/YU 35cXyO4RHtqENGIpV4G/iBnZnpSVLrwIyqW7s+rifJ+Gf3vCrNv0ACPXJKc47a71iBlh BNug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lIy9EI7XitWw8lbY9Bxr/rosSq+mhVjP0cNUkw2lFHM=; b=n/EscIlayWLB1VVjiuqopbkA5BAtVeZIYEqm0zScqdAoWa9ALNZTsK1uF29MgC4ZCy i/2n2Q2zUPDrnWDF071zJslSh2Ruz4UyFhLWsF1bXipMGTLhyFjv+Ed85loMtPvIM9U5 z5LRrF3LIyJmY+qr37/TnXkVIkkVniE9VZMMr3XCQenhZm0lm7BRw5JDjIhjO/SeLjNn yoi8WyiFvz2ZosXrTQk0Uqfs7hX4aqJzIePktRSmn97vnogu3lvnVH0aSgEWJg5nv+lg bMwLxw+I4kSjyr4nMo8opa3B4muiCx9fM2FGDEAwrPv9EMxanUp8qfKlyPix/ja6oAY2 p9nw== X-Gm-Message-State: AOAM531LsEnO3ZX4e0789FI8d2g12Ryn2h3ah8Qv6v+R3zeAItuxV6y7 cp5s+upGmJ6vEr2wU8xp0Dpqo2GSzO+Yvg== X-Google-Smtp-Source: ABdhPJyquUKZXhGRjRuMwNwYwpA+7JmvDvP+TGhE1AzZf3GMj3yyliX0pGtJayAwErlFK1eheQ60eA== X-Received: by 2002:a17:90a:7489:: with SMTP id p9mr32746395pjk.101.1626729766199; Mon, 19 Jul 2021 14:22:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 02/15] accel/tcg: Move curr_cflags into cpu-exec.c Date: Mon, 19 Jul 2021 11:22:26 -1000 Message-Id: <20210719212239.428740-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730054339100001 We will shortly have more than a simple member read here, with stuff not necessarily exposed to exec/exec-all.h. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Message-Id: <20210717221851.2124573-3-richard.henderson@linaro.org> --- include/exec/exec-all.h | 5 +---- accel/tcg/cpu-exec.c | 5 +++++ 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index dfe82ed19c..ae7603ca75 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -565,10 +565,7 @@ static inline uint32_t tb_cflags(const TranslationBloc= k *tb) } =20 /* current cflags for hashing/comparison */ -static inline uint32_t curr_cflags(CPUState *cpu) -{ - return cpu->tcg_cflags; -} +uint32_t curr_cflags(CPUState *cpu); =20 /* TranslationBlock invalidate API */ #if defined(CONFIG_USER_ONLY) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index e22bcb99f7..ef4214d893 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -145,6 +145,11 @@ static void init_delay_params(SyncClocks *sc, const CP= UState *cpu) } #endif /* CONFIG USER ONLY */ =20 +uint32_t curr_cflags(CPUState *cpu) +{ + return cpu->tcg_cflags; +} + /* Might cause an exception, so have a longjmp destination ready */ static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc, target_ulong cs_base, --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730137586207.57786148361538; Mon, 19 Jul 2021 14:28:57 -0700 (PDT) Received: from localhost ([::1]:42252 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5aoq-00020A-GJ for importer@patchew.org; Mon, 19 Jul 2021 17:28:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60492) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aiw-0003sY-Pz for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:50 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]:45889) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aiv-0000mh-7o for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:50 -0400 Received: by mail-pg1-x52e.google.com with SMTP id y17so20488106pgf.12 for ; Mon, 19 Jul 2021 14:22:48 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yz3cpE1v3usKVqxRjbCaLbAnRr3RaTGtZYXFSmK7X+Q=; b=Vuj59YEt3CTRu3ibvbow28G/DBoewW7w6p4G8Zo/tvRQM31LTx5PGNPNCdHD/pcdTH ndFncCbgW0mHZ5A6Q3IEMkFbGdgjdEBegLCW/3qj5SNUg21PGF+CC27ADqNMgmjP6piT V+/Hxl3bc5PkVG5FagiyJJTnqsU80ME3YB073sNSp63Ni48wHtNTCQ0rgVfT2hhlmKA/ LVi4OoPonu226WvZT3gQaWazkaK96dik47WOITU98EgiiLavbfJHGyg1JI6RYNx7+yDQ +imBFm8UMdYbAgj+Dwe24zcfkRjNAONuJXiC4CBjR9jU63j6j4zp91lTUiy3TME3O8lh taXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yz3cpE1v3usKVqxRjbCaLbAnRr3RaTGtZYXFSmK7X+Q=; b=JVo2U76hQLtMtJ2sMw00NpgApXxCCGwAb4jflusf+3iglSp5BoemeAiVUFRMbYqbD7 Lc+atDjgVYubBRUp1IwI33AW+Tfs0kRJrL/ROzQtPrEiCmSnrua4nMXoMRXxfuaniEWa g+3y/Ynd/8RUwTGxBQH6uhGvbqRdkfprgf3Y/MfE/DAvV4akGqm3mZUoOffzlyuMBWmG LnuQO0y6d36bzCT9eiCQN9N+Y+iuJ695PB2fEs1XB53D9VOZZMIn7AVytKGEqHRuzPMR X8UOrOeiNRMsfSlRUjbUG3stCXc2W/NX6g3WOHIMdaxCTWFjGU6oyC626ljS1SBDHUrc vpUQ== X-Gm-Message-State: AOAM53083K4NLMtVlDwxK7OzoUGhv95/jZvac1aOrtqzawiJIr5pvGTV kLZ/KyOEs9vGYa+xeEZqZh7kHVVMAqO+dQ== X-Google-Smtp-Source: ABdhPJxGhyUOBqNOpdbXx/W8keOAdX8PrlAetN9xWizWjJDb5usKjJw9tcczev9Y31t36iwXsH2+vQ== X-Received: by 2002:a65:568c:: with SMTP id v12mr27988732pgs.88.1626729767816; Mon, 19 Jul 2021 14:22:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 03/15] target/alpha: Drop goto_tb path in gen_call_pal Date: Mon, 19 Jul 2021 11:22:27 -1000 Message-Id: <20210719212239.428740-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730138304100001 Content-Type: text/plain; charset="utf-8" We are certain of a page crossing here, entering the PALcode image, so the call to use_goto_tb that should have been here will never succeed. We are shortly going to add an assert to tcg_gen_goto_tb that would trigger for this case. Signed-off-by: Richard Henderson --- target/alpha/translate.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 103c6326a2..949ba6ffde 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -1207,19 +1207,8 @@ static DisasJumpType gen_call_pal(DisasContext *ctx,= int palcode) ? 0x2000 + (palcode - 0x80) * 64 : 0x1000 + palcode * 64); =20 - /* Since the destination is running in PALmode, we don't really - need the page permissions check. We'll see the existence of - the page when we create the TB, and we'll flush all TBs if - we change the PAL base register. */ - if (!ctx->base.singlestep_enabled) { - tcg_gen_goto_tb(0); - tcg_gen_movi_i64(cpu_pc, entry); - tcg_gen_exit_tb(ctx->base.tb, 0); - return DISAS_NORETURN; - } else { - tcg_gen_movi_i64(cpu_pc, entry); - return DISAS_PC_UPDATED; - } + tcg_gen_movi_i64(cpu_pc, entry); + return DISAS_PC_UPDATED; } #endif } --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730112074526.0529964407139; Mon, 19 Jul 2021 14:28:32 -0700 (PDT) Received: from localhost ([::1]:39908 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5aoQ-0000ID-Kj for importer@patchew.org; Mon, 19 Jul 2021 17:28:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60544) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aj0-00044P-PC for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:54 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]:37833) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aiw-0000oE-Ez for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:54 -0400 Received: by mail-pf1-x430.google.com with SMTP id d9so6570265pfv.4 for ; Mon, 19 Jul 2021 14:22:50 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gKHnw/iTk1V/eUPCZhivd0JB3zDH6dBk+qd11N8EyNM=; b=HhTJFY+ZpPNxnKXWL5jfll/1TUpmnViFn2lj7iAcKL6LY/cMftotzgrDhq53vj0iGu C4u43u03UOdXmSQHsZy/NB+T/AjvzpkCHAuH6Eve7TRmurQ6uSJbYkL2SXr1ViqUheg5 ZvpxghBRXqHMqEX7INLQs/uNxHf8zvymPL2WV/AKZvnyEX6uQTvcQAuDBFAiAb2yZOZ6 w4m1mXZMJM1pFoEhqgavosfO6rUyerw/gk+YSg9XGqenJ/pED1W4imI7rrXBaY4ajc8s OS+fyl1DPnWRUVuBMuypwWzQdrnhQKbdFTIArkfNYAolRudgKaecnkbDP5+rg4WEUhTb 2WMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gKHnw/iTk1V/eUPCZhivd0JB3zDH6dBk+qd11N8EyNM=; b=T9Zctu1p40H+WolYddombFESxYFkUooUd19cPUUmkNu2q2z23cQYqhiXcV1ry4HnCk hlAIQe/vFsbCD4hLBhJVp7/wyiQlBRyAa8Amz5m7/VoHCf8RsFiDHaJytbXtCDOPCADH 3wYsPCJO2yOuH3Sp1oQO9c1kvotlRVyF3eL9elWTGbTEUlK+Rjgd9k4V6FJAsMVSRGjk IvsVLv1Cfp4DKc7zxJX9vJFMvO+6BNoT7869uSDAQDNdbyjT0AWrFabt7SVNPbe3x+1s X+hLX6ktvmG3MYwsFrL8tHwqmaTA2Pwdg9Wi9+MSjkNGH81qwi1/pXhTRf+IO12rJEmW PMZw== X-Gm-Message-State: AOAM5309Yb9jgYzdn0xHNVaOaxuQo28NUwuT120DmyRXlir1xVLwEVm0 7NAB3D4ecOBkiEBNMvaUqPBGTuJy3zPa2w== X-Google-Smtp-Source: ABdhPJw9WlVmMTYGnqnHmaFmNFjD7f04KK9jBpyicDPVNyP5Lziioa02oLG+1CaanlftSQMnkJYNdA== X-Received: by 2002:a62:37c2:0:b029:2ff:f7dd:1620 with SMTP id e185-20020a6237c20000b02902fff7dd1620mr28035227pfa.33.1626729769179; Mon, 19 Jul 2021 14:22:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 04/15] accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR Date: Mon, 19 Jul 2021 11:22:28 -1000 Message-Id: <20210719212239.428740-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730112676100001 Move the -d nochain check to bits on tb->cflags. These will be used for more than -d nochain shortly. Set bits during curr_cflags, test them in translator_use_goto_tb, assert we're not doing anything odd in tcg_gen_goto_tb. The test in tcg_gen_exit_tb is redundant with the assert for goto_tb_issue_mask. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Peter Maydell Message-Id: <20210717221851.2124573-4-richard.henderson@linaro.org> --- include/exec/exec-all.h | 16 +++++++++------- accel/tcg/cpu-exec.c | 8 +++++++- accel/tcg/translator.c | 5 +++++ tcg/tcg-op.c | 28 ++++++++++++---------------- 4 files changed, 33 insertions(+), 24 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index ae7603ca75..6873cce8df 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -494,13 +494,15 @@ struct TranslationBlock { uint32_t cflags; /* compile flags */ =20 /* Note that TCG_MAX_INSNS is 512; we validate this match elsewhere. */ -#define CF_COUNT_MASK 0x000001ff -#define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */ -#define CF_MEMI_ONLY 0x00010000 /* Only instrument memory ops */ -#define CF_USE_ICOUNT 0x00020000 -#define CF_INVALID 0x00040000 /* TB is stale. Set with @jmp_lock held = */ -#define CF_PARALLEL 0x00080000 /* Generate code for a parallel context = */ -#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ +#define CF_COUNT_MASK 0x000001ff +#define CF_NO_GOTO_TB 0x00000200 /* Do not chain with goto_tb */ +#define CF_NO_GOTO_PTR 0x00000400 /* Do not chain with goto_ptr */ +#define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */ +#define CF_MEMI_ONLY 0x00010000 /* Only instrument memory ops */ +#define CF_USE_ICOUNT 0x00020000 +#define CF_INVALID 0x00040000 /* TB is stale. Set with @jmp_lock hel= d */ +#define CF_PARALLEL 0x00080000 /* Generate code for a parallel contex= t */ +#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ #define CF_CLUSTER_SHIFT 24 =20 /* Per-vCPU dynamic tracing state used to generate this TB */ diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index ef4214d893..d3232d5764 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -147,7 +147,13 @@ static void init_delay_params(SyncClocks *sc, const CP= UState *cpu) =20 uint32_t curr_cflags(CPUState *cpu) { - return cpu->tcg_cflags; + uint32_t cflags =3D cpu->tcg_cflags; + + if (qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { + cflags |=3D CF_NO_GOTO_TB | CF_NO_GOTO_PTR; + } + + return cflags; } =20 /* Might cause an exception, so have a longjmp destination ready */ diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 59804af37b..2ea5a74f30 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -33,6 +33,11 @@ void translator_loop_temp_check(DisasContextBase *db) =20 bool translator_use_goto_tb(DisasContextBase *db, target_ulong dest) { + /* Suppress goto_tb if requested. */ + if (tb_cflags(db->tb) & CF_NO_GOTO_TB) { + return false; + } + /* Suppress goto_tb in the case of single-steping. */ if (db->singlestep_enabled || singlestep) { return false; diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 0c561fb253..e0d54d537f 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -2723,10 +2723,6 @@ void tcg_gen_exit_tb(const TranslationBlock *tb, uns= igned idx) seen this numbered exit before, via tcg_gen_goto_tb. */ tcg_debug_assert(tcg_ctx->goto_tb_issue_mask & (1 << idx)); #endif - /* When not chaining, exit without indicating a link. */ - if (qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { - val =3D 0; - } } else { /* This is an exit via the exitreq label. */ tcg_debug_assert(idx =3D=3D TB_EXIT_REQUESTED); @@ -2738,6 +2734,8 @@ void tcg_gen_exit_tb(const TranslationBlock *tb, unsi= gned idx) =20 void tcg_gen_goto_tb(unsigned idx) { + /* We tested CF_NO_GOTO_TB in translator_use_goto_tb. */ + tcg_debug_assert(!(tcg_ctx->tb_cflags & CF_NO_GOTO_TB)); /* We only support two chained exits. */ tcg_debug_assert(idx <=3D TB_EXIT_IDXMAX); #ifdef CONFIG_DEBUG_TCG @@ -2746,25 +2744,23 @@ void tcg_gen_goto_tb(unsigned idx) tcg_ctx->goto_tb_issue_mask |=3D 1 << idx; #endif plugin_gen_disable_mem_helpers(); - /* When not chaining, we simply fall through to the "fallback" exit. = */ - if (!qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { - tcg_gen_op1i(INDEX_op_goto_tb, idx); - } + tcg_gen_op1i(INDEX_op_goto_tb, idx); } =20 void tcg_gen_lookup_and_goto_ptr(void) { - if (!qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { - TCGv_ptr ptr; + TCGv_ptr ptr; =20 - plugin_gen_disable_mem_helpers(); - ptr =3D tcg_temp_new_ptr(); - gen_helper_lookup_tb_ptr(ptr, cpu_env); - tcg_gen_op1i(INDEX_op_goto_ptr, tcgv_ptr_arg(ptr)); - tcg_temp_free_ptr(ptr); - } else { + if (tcg_ctx->tb_cflags & CF_NO_GOTO_PTR) { tcg_gen_exit_tb(NULL, 0); + return; } + + plugin_gen_disable_mem_helpers(); + ptr =3D tcg_temp_new_ptr(); + gen_helper_lookup_tb_ptr(ptr, cpu_env); + tcg_gen_op1i(INDEX_op_goto_ptr, tcgv_ptr_arg(ptr)); + tcg_temp_free_ptr(ptr); } =20 static inline MemOp tcg_canonicalize_memop(MemOp op, bool is64, bool st) --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730013959897.6959935719943; Mon, 19 Jul 2021 14:26:53 -0700 (PDT) Received: from localhost ([::1]:33270 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5amq-0004BM-Tu for importer@patchew.org; Mon, 19 Jul 2021 17:26:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aiz-0003zm-Ad for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:53 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]:35819) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aix-0000p3-RX for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:53 -0400 Received: by mail-pj1-x1035.google.com with SMTP id gp5-20020a17090adf05b0290175c085e7a5so631505pjb.0 for ; Mon, 19 Jul 2021 14:22:51 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9B/gmUM+QUz3bpCH+D2gMCTlPL+YqDM4DQGjYBG4u2w=; b=zIL0Kp1watv+AvAjixN6HulLojuIrY0x9zNa0MsVlwhE1fsYS1niTL1esSOoIVoGUg KhOX6TAGVxmxC9InRSkt2PbltU+xy2anrl2CmTU78B3c4GsnM+MECGg4MI6ary0Qyg39 zhtlSvL5Rzu0jOUSEUAhUFDkNdtWvQhHdAXg9SBZcSa66BeUs47iBxGFoYV4V3pOHqWZ Gc/sJI91JxUQGpZ/9KrIo2s9bkJcocdkCMh0oqUbE8Q98QyOoGRBwea9fXCe/dzryXC5 Q6Qzsc23yIGNpbm2d5JVZqIIeTWNHkRATPsX2vTKMWUxfmCRilpCWt+jZoYJUuBbYG13 QCMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9B/gmUM+QUz3bpCH+D2gMCTlPL+YqDM4DQGjYBG4u2w=; b=qXD6c5z4RLNxMwqPO/7seGO1gCDRjkBSypwUAW6wWpa+KCxX1vU1d3mSrNMB0HtlUv O5hLKbA9UqvNOt2zKBfrqLGLnZQWeua4nKLxkVn9O3cYz9hqzdhwmludCNb17fVeu546 t4hqWTBJ04ETovHASqX8eeZPfC2OKrVSBNk189CtixcUYHEQTjJS7RYnKTtzoRu39IMk 4nAEkS5nA7R6ct8AZayE4WYaHdSpcKPLyX/pN0bXpxH+E9SXA3gtP2JxLI1wbbmze/bx H3DjKfBJyhSLg1H++Rpy/SRT4jRjfRCIpHV3P6X7vl7QNeZadwLrVD0RNKkvepxt63kY 17ng== X-Gm-Message-State: AOAM533cliTm06grww0N7R2fLCqhl0YDD6mbx/ifRYnLrkjqFPfyFTX6 DtnrUdla30aFZtR7TP+dfMrxT45UI05LVw== X-Google-Smtp-Source: ABdhPJxD67VXsyy3Sz/GQTFbRkddYxKO2I5bh+Nsl13xB5hFbZM4ySLjpafoiQRXxwb7LBKomdb1BQ== X-Received: by 2002:a17:90b:e8b:: with SMTP id fv11mr25678027pjb.25.1626729770550; Mon, 19 Jul 2021 14:22:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 05/15] accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain Date: Mon, 19 Jul 2021 11:22:29 -1000 Message-Id: <20210719212239.428740-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730015584100001 Content-Type: text/plain; charset="utf-8" The purpose of suppressing goto_ptr from -d nochain had been to return to the main loop so that -d cpu would be recognized. But we now include -d cpu logging in helper_lookup_tb_ptr so there is no need to exclude goto_ptr. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20210717221851.2124573-5-richard.henderson@linaro.org> --- accel/tcg/cpu-exec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index d3232d5764..70ea3c7d68 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -150,7 +150,7 @@ uint32_t curr_cflags(CPUState *cpu) uint32_t cflags =3D cpu->tcg_cflags; =20 if (qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { - cflags |=3D CF_NO_GOTO_TB | CF_NO_GOTO_PTR; + cflags |=3D CF_NO_GOTO_TB; } =20 return cflags; --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730283377403.0427670491632; Mon, 19 Jul 2021 14:31:23 -0700 (PDT) Received: from localhost ([::1]:46564 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5arC-00056b-EH for importer@patchew.org; Mon, 19 Jul 2021 17:31:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60542) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aj0-00043w-Kv for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:54 -0400 Received: from mail-pg1-x536.google.com ([2607:f8b0:4864:20::536]:42814) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aiz-0000pE-2u for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:54 -0400 Received: by mail-pg1-x536.google.com with SMTP id i16so2977663pgi.9 for ; Mon, 19 Jul 2021 14:22:52 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jXNdPSSG3EvHjS1ff9yaYX7BJ5tWCVTACEwi3klwS+c=; b=PAmIzVUGWdATnJdw8/yXcOltBIqBKNhlnuLJB8R2h5k8fAmSRGaD9TnGO7I3IjY8g9 Snu2X64IZHrN2xCrcUD26iJ9c7Swm21YWRYOXjX4slBeYgR5qTfw/WcggXvlkusUMg9M fIBfr4YkNRBDfe6yl18C1WsNnypVgN/rQQv9cWodf2kF2G9GdIph+nT3sB8O2ugZ0aXC qXfBe0Cq+WoVQB6i71Z9JAdL/NsZO0iQUK16nlJi8ePVBcN/ev5ihuxXdtXNmzvqiJBh r74wCziT9w5Npiio/Oz8aInhRPE3mv/7sSr8+GdQ3Tg9g4zTtKIp9qWCy0SrnUkL4YSr TiKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jXNdPSSG3EvHjS1ff9yaYX7BJ5tWCVTACEwi3klwS+c=; b=Yaw3Q+vSgn+E4sFMlgZ3fjc9fGCL9jeH6GXjpeduNQV4lAWE6TOMLVG5wElc0tzsXz RKLUP07cdZhpvtia2U3ganKGXAL8FRdxXJPurBhDcWYmx9feLuWtv0sMri8nAX7myhV2 4GKjfKE+0hLdOcSo4EBDRF+AFnqBEDhlRvTuDik4at+lV/43o9kOLLb4eQaXhuaDn/4Q 6yo6ms4kvAjQ4t1w2+2G1tLCMebQzIyvsYpg08IRVlU9P4e1uPueBQFW0GulrQykmec1 1IJjzGkiPU62y/9YuEenCXD2FyzX68OOZh2CgLXdeh5brt7UiJ2Y4KtOTroWzD65jaaU DuBg== X-Gm-Message-State: AOAM531e+WmtO5v/0lZtDKgQA0ToHpCnFKRjydID5Rm/pPtvSqxTyTKN JY2pb3aw2jpYqOit1h/rUVhKtwxNoZ1nPw== X-Google-Smtp-Source: ABdhPJwBV89/iXxO3Uup2wzTlxzv9q0ywmceKYm2u2yCzwtSORHqQoxAHobFvXNeLTtaFpnmHyVDoA== X-Received: by 2002:a63:1205:: with SMTP id h5mr20476205pgl.204.1626729771823; Mon, 19 Jul 2021 14:22:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 06/15] accel/tcg: Handle -singlestep in curr_cflags Date: Mon, 19 Jul 2021 11:22:30 -1000 Message-Id: <20210719212239.428740-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730285230100001 Content-Type: text/plain; charset="utf-8" Exchange the test in translator_use_goto_tb for CF_NO_GOTO_TB, and the test in tb_gen_code for setting CF_COUNT_MASK to 1. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-Id: <20210717221851.2124573-6-richard.henderson@linaro.org> --- accel/tcg/cpu-exec.c | 8 +++++++- accel/tcg/translate-all.c | 2 +- accel/tcg/translator.c | 2 +- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 70ea3c7d68..2206c463f5 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -149,7 +149,13 @@ uint32_t curr_cflags(CPUState *cpu) { uint32_t cflags =3D cpu->tcg_cflags; =20 - if (qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { + /* + * For singlestep and -d nochain, suppress goto_tb so that + * we can log -d cpu,exec after every TB. + */ + if (singlestep) { + cflags |=3D CF_NO_GOTO_TB | 1; + } else if (qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { cflags |=3D CF_NO_GOTO_TB; } =20 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 5cc01d693b..bf82c15aab 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1432,7 +1432,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, } QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 !=3D TCG_MAX_INSNS); =20 - if (cpu->singlestep_enabled || singlestep) { + if (cpu->singlestep_enabled) { max_insns =3D 1; } =20 diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 2ea5a74f30..a59eb7c11b 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -39,7 +39,7 @@ bool translator_use_goto_tb(DisasContextBase *db, target_= ulong dest) } =20 /* Suppress goto_tb in the case of single-steping. */ - if (db->singlestep_enabled || singlestep) { + if (db->singlestep_enabled) { return false; } =20 --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730204779351.98125798271303; Mon, 19 Jul 2021 14:30:04 -0700 (PDT) Received: from localhost ([::1]:45032 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5apv-00046H-Pg for importer@patchew.org; Mon, 19 Jul 2021 17:30:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60554) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aj1-00047R-Qr for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:55 -0400 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]:34612) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aj0-0000qT-9r for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:55 -0400 Received: by mail-pl1-x62e.google.com with SMTP id b2so5800622plx.1 for ; Mon, 19 Jul 2021 14:22:53 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UqlmS05MkTOxmP5dwcL3fhQ/lw1WJjbK9e+xb00mPGM=; b=XWA9z9KNqiimWGdfnOcrMx6pjVsVpcKmWLhUIYFxSUQ44WxWh0oXKwLCjbNMUxphIO VIzAbgH+608Hlxa28tiHl5r/WZO1ipJ53vFaHNRtxhghCGCzaH6nV4ODu5VQbRRjgT3q 2xj4uEzTnllMP7wdY1XgEruPpmvb6cUbalAeEtnIu51vE5GeFjjpV87qBi5k0/rkYADr ZzEHAHA1D7Cjfs5LZ8EfBrf8el0K5GUIHZTJUfvHmQHmnuzq+EdEkpmw7hYmeCRFYalC nExjxRjM0d7DqA835gVXS+ltB17Egb6gJ+/bOBtnL3luHuWGQNv9gJuCW4pJDpN+Td6d lyug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UqlmS05MkTOxmP5dwcL3fhQ/lw1WJjbK9e+xb00mPGM=; b=tHt1wO2DNuBNJd6EdHEH8+DqA4fP+4lZqMpFgRdcIROgGebhFP80xmArf3jEMaGlo8 lJ7jZp6bYzpH8E4Nfw7zmOXa3FrmshdodvrM5T4mJdO2k3Qq0cWAeX1XMXrTDe2dUxL5 mHAPFpdEPOdVYIWgeCbs+E2O2B38r0FIARwRtTEQOFoOo0xb2MDESyfPudRhZ+kIdwJA gJGCtpc0vUKnvtn7jp2KgIJ+yLIcQLvyu2BemWXKMDEmheFcKFyvl5bc1hytSVTBn3gp g+uMIBsg1KP20vUXLt2xu0nq0/rjJJgtrLPpttt8assqh4CPpoCLmjms0hBz8dP1bPl1 FFvQ== X-Gm-Message-State: AOAM533I30b2FZU0rEkocoZQvNincIhgjj+EoMNwMSkVXUnmjcoZI4nl 2VpngwSpw9pcOBmr2dE/OH5iVnBDL/5jxg== X-Google-Smtp-Source: ABdhPJznCszhPGgACwVLE0mryA9lVuk438Ms89+0HWt/Crq9dfXsKFIU6PtA+d+o2TDkMkUzlBpAuQ== X-Received: by 2002:a17:90a:b78d:: with SMTP id m13mr21219354pjr.60.1626729773068; Mon, 19 Jul 2021 14:22:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 07/15] accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic Date: Mon, 19 Jul 2021 11:22:31 -1000 Message-Id: <20210719212239.428740-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730206847100001 Request that the one TB returns immediately, so that we release the exclusive lock as soon as possible. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Message-Id: <20210717221851.2124573-7-richard.henderson@linaro.org> --- accel/tcg/cpu-exec.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 2206c463f5..5bb099174f 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -330,8 +330,7 @@ void cpu_exec_step_atomic(CPUState *cpu) CPUArchState *env =3D (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; target_ulong cs_base, pc; - uint32_t flags; - uint32_t cflags =3D (curr_cflags(cpu) & ~CF_PARALLEL) | 1; + uint32_t flags, cflags; int tb_exit; =20 if (sigsetjmp(cpu->jmp_env, 0) =3D=3D 0) { @@ -341,8 +340,14 @@ void cpu_exec_step_atomic(CPUState *cpu) cpu->running =3D true; =20 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); - tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); =20 + cflags =3D curr_cflags(cpu); + /* Execute in a serial context. */ + cflags &=3D ~CF_PARALLEL; + /* After 1 insn, return and release the exclusive lock. */ + cflags |=3D CF_NO_GOTO_TB | CF_NO_GOTO_PTR | 1; + + tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); if (tb =3D=3D NULL) { mmap_lock(); tb =3D tb_gen_code(cpu, pc, cs_base, flags, cflags); --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730374225468.9272163470256; Mon, 19 Jul 2021 14:32:54 -0700 (PDT) Received: from localhost ([::1]:49852 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5asf-0007RN-5f for importer@patchew.org; Mon, 19 Jul 2021 17:32:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60584) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aj3-0004D4-Dj for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:57 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]:40578) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aj1-0000rK-Pn for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:57 -0400 Received: by mail-pf1-x436.google.com with SMTP id j199so17757120pfd.7 for ; Mon, 19 Jul 2021 14:22:55 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AM1zqN7VpfnJ+vaAL4ncfMEhxDfRqMZA6jvA0oiOJnM=; b=K9CmzMbEauIE2HbOOr9Co5z4i2bJnQFenv1uH2MErT/rhj2TmAejj/2tkiC0SbYkRQ ldo0xWj5Lz0so6/28ZvEIAVd6B5ppIqoe0y7iMUsEn57YtMVpYMn7yNmq1g9076P2Hvu g8v0KayNW220FAf+zpbK6MiFlOk5ttE6HidtxrP7qz+XeB4DuODtNQvqiPoEQcTMtn+o I0weKBh4Zr7AoJoMVjQXcK3fKIo5lQYpD1SDSx5lMa0RGzJqDzsfZLaBkjxZLSk9QhUO WL5A3UvBdfm1Zo6881IMPbSjsD9qHMI0YSGI8tKYFL4slqJd/MeuQcaHiwOby/56sR/T 9eaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AM1zqN7VpfnJ+vaAL4ncfMEhxDfRqMZA6jvA0oiOJnM=; b=U40tam34IQMa69RB8IkzsnpLMDNpBxb9n96PbcPIhdtdQc8zJVwkeqRoijMIFMoadm RTEV9kkVxbpZHJYSOqRUuu+1cq4qdFpzUitvxPbdsy2A93xIR5+C2azz9TycIl9QufqH kTObQEoVBbAU3X5L+qAuiXcuSqcb3PeZTZ8yeyL+QMzppk8QluRstpAj7iB+Vysv3SI5 WNi/ciX4kr/ClmZ38GhkNY2gm4QuQTj/mxVoYYbbg8wdAF7XH0LKzzbCfr97fz4VBw9j +Uuw/J2YuTZtY+IUc+8f0W6tU+QjAkKheMLUWCV029bn2l5JJ1kd/YSITLd92C9Nx4jZ 0dSQ== X-Gm-Message-State: AOAM533fZamm3aOkF+1jztg9edWrLsJCv6Z69KHIwo2OUB04V5VQSC3t FymO3s11T3dQnr3i9GcOPUlBjRxLjjpF0w== X-Google-Smtp-Source: ABdhPJyPc01O8eCU5ozPMxMrb6nGdDvY5jssjNHhnNTeUxPUMSbi0p5LYqE/0vb0mH/VkUzHIHMDrw== X-Received: by 2002:aa7:93a2:0:b029:333:64d3:e1f7 with SMTP id x2-20020aa793a20000b029033364d3e1f7mr24532130pff.25.1626729774509; Mon, 19 Jul 2021 14:22:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 08/15] accel/tcg: Move cflags lookup into tb_find Date: Mon, 19 Jul 2021 11:22:32 -1000 Message-Id: <20210719212239.428740-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730375324100001 We will shortly require the guest pc for computing cflags, so move the choice just after cpu_get_tb_cpu_state. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-Id: <20210717221851.2124573-8-richard.henderson@linaro.org> --- accel/tcg/cpu-exec.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5bb099174f..4d043a11aa 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -502,15 +502,29 @@ static inline void tb_add_jump(TranslationBlock *tb, = int n, =20 static inline TranslationBlock *tb_find(CPUState *cpu, TranslationBlock *last_tb, - int tb_exit, uint32_t cflags) + int tb_exit) { CPUArchState *env =3D (CPUArchState *)cpu->env_ptr; TranslationBlock *tb; target_ulong cs_base, pc; - uint32_t flags; + uint32_t flags, cflags; =20 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); =20 + /* + * When requested, use an exact setting for cflags for the next + * execution. This is used for icount, precise smc, and stop- + * after-access watchpoints. Since this request should never + * have CF_INVALID set, -1 is a convenient invalid value that + * does not require tcg headers for cpu_common_reset. + */ + cflags =3D cpu->cflags_next_tb; + if (cflags =3D=3D -1) { + cflags =3D curr_cflags(cpu); + } else { + cpu->cflags_next_tb =3D -1; + } + tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); if (tb =3D=3D NULL) { mmap_lock(); @@ -868,21 +882,7 @@ int cpu_exec(CPUState *cpu) int tb_exit =3D 0; =20 while (!cpu_handle_interrupt(cpu, &last_tb)) { - uint32_t cflags =3D cpu->cflags_next_tb; - TranslationBlock *tb; - - /* When requested, use an exact setting for cflags for the next - execution. This is used for icount, precise smc, and stop- - after-access watchpoints. Since this request should never - have CF_INVALID set, -1 is a convenient invalid value that - does not require tcg headers for cpu_common_reset. */ - if (cflags =3D=3D -1) { - cflags =3D curr_cflags(cpu); - } else { - cpu->cflags_next_tb =3D -1; - } - - tb =3D tb_find(cpu, last_tb, tb_exit, cflags); + TranslationBlock *tb =3D tb_find(cpu, last_tb, tb_exit); cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); /* Try to align the host and virtual clocks if the guest is in advance */ --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626729870582668.1892185921295; Mon, 19 Jul 2021 14:24:30 -0700 (PDT) Received: from localhost ([::1]:53420 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5akX-000790-ID for importer@patchew.org; Mon, 19 Jul 2021 17:24:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60612) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aj5-0004K9-9U for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:59 -0400 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]:33415) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aj3-0000t6-Pj for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:22:58 -0400 Received: by mail-pg1-x52b.google.com with SMTP id 37so20592689pgq.0 for ; Mon, 19 Jul 2021 14:22:57 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+p6ro6D5KFq3icWk04aTft7NAAiKyhL4s7d6P84Hy6s=; b=YPoL/WIx0mnwSOwPkTh7ICAypA8Cy0siFDpmeDy+v4LwHjksPzlx628S/Ug2rBliv+ UoWvtld3pRKvhqDbsqwWkuRbFzozxwYQ1JVUG3RjqpndGly8+0TZNSMsGlg4QUOPvxBS 5MjodjqJHPyZr67JPbhyIOO67cX01SkCvGA283xLvkRfFYTCCT6McLDGILW+MzrVoeEH r5ZZSa145UM198H2aJLtPdvXKkoQ0sqCACmcCFC/a0zR8QSm/Vju9BO1Pr/9BW4nZiyE m0lHXkbklhUuvBL46ZwzQ64vQg3lIFa9xsigETOqDxawOiW/sriF5jWzn+F9sTA/6UBg 5Dpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+p6ro6D5KFq3icWk04aTft7NAAiKyhL4s7d6P84Hy6s=; b=cprnwgYCk+5aKB9oQ4wwPXwsZo9y9iOTiOviQQKS/dOyNh77+9apJR6hImubG2moO0 hJ9dAlof6cZcfikREwwyrrWBEmJtck13s6aq6KXw9AnU195od3XGD+msMtiEZucFOIaJ Ejj1g0DWafEJ5moVGGnsX5q7SJlVeHpuPO0yqT8WoihFba9lCa9HlAKYbzRfYrDHd6KH SO3nKkDHK/WS/CjMYlwXlSXxEnpvWfv0gmhanqWy+gXnxVf9tu8vhpa77qHNFoxfue2C vEhV/GR+cpUo8Vm6vR4GlledZZ2bebbmA4ndsMKz9Qg0X61X8a6qv48VbN8SeXBRf0aX IBBA== X-Gm-Message-State: AOAM532lEIOBXdm5xE8EvZwHVf9brwJb+KAhy0x+K6GsxAiZcNSZB7WY GMQrbklCE38R99/N+EWwnDZq/pEcV6jElw== X-Google-Smtp-Source: ABdhPJzcoX+ectZhYsHs87Q/wLIF1QjygZOXouqbBllFsyIU9MCmQyzWRzrVV9qNh9/G3mSm/gaR2Q== X-Received: by 2002:a62:15c5:0:b029:32c:ea9f:a5ed with SMTP id 188-20020a6215c50000b029032cea9fa5edmr27400216pfv.27.1626729776536; Mon, 19 Jul 2021 14:22:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 09/15] hw/core: Introduce TCGCPUOps.debug_check_breakpoint Date: Mon, 19 Jul 2021 11:22:33 -1000 Message-Id: <20210719212239.428740-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626729872373100001 Content-Type: text/plain; charset="utf-8" New hook to return true when an architectural breakpoint is to be recognized and false when it should be suppressed. First use must wait until other pieces are in place. Signed-off-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 72d791438c..eab27d0c03 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -88,6 +88,12 @@ struct TCGCPUOps { */ bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp); =20 + /** + * @debug_check_breakpoint: return true if the architectural + * breakpoint whose PC has matched should really fire. + */ + bool (*debug_check_breakpoint)(CPUState *cpu); + /** * @io_recompile_replay_branch: Callback for cpu_io_recompile. * --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730478174657.0040302807432; Mon, 19 Jul 2021 14:34:38 -0700 (PDT) Received: from localhost ([::1]:56008 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5auK-0003EH-Tz for importer@patchew.org; Mon, 19 Jul 2021 17:34:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60650) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aj6-0004Pr-Qh for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:00 -0400 Received: from mail-pg1-x52f.google.com ([2607:f8b0:4864:20::52f]:45891) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aj5-0000tt-6V for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:00 -0400 Received: by mail-pg1-x52f.google.com with SMTP id y17so20488700pgf.12 for ; Mon, 19 Jul 2021 14:22:58 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Og5qRofVVysqqx/NRwWHk/rtIdv4ghjwZRwj/LrGEQk=; b=UJztf3QaCu6gp24AqG6qTkK0OBpj1ncsplbaWn10OgcwaBqsRNVPkI1hXcdIQacrKR LmuKnar5G/kxLivmm4zjDiRgC5fW3wQq/WOFjHOL7RspN4gGy0uPX1JuCei5wD2Y182p h4Tbs7zMV39STE2qGHJZikBFT+r8dQsAsnkrmzi1lvR1AfPnbUYTd6uQ1FbIclT5GM3d VHhJ7SUIZG4e7NYBu42RaALcH2P5bLODmsvWtfXQMLSVhxEJRULo1QIdtqHLC6Z3Tpq9 QgStSUS5G6IXe+XBa6j13qw1hBKF+j+fxnB4BxwvND8cQhAr8cfVF+2EmvSKxLkmP8zc rF5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Og5qRofVVysqqx/NRwWHk/rtIdv4ghjwZRwj/LrGEQk=; b=G06d4RVz6VyY5KeDKbkbKBT0fWOceh50sLghSt9yN7l3fVFcnOiXqnjI3bIkBQinmM T4eT9H+MvNxnjmP2T/hWRcIjxKnWFUr5Zg7I+nCLTtEm85n46UpBFWmCnbUk87Ane+2+ Tu1JPOvXO7DIAH4EvV/QgDJZn0bL4IU0z1HI9yTEAbxahO5V/qzltCi9opxvh4lzTQ4p qO3aA9QfZX3HlY5KctUjK6Wr1gV7ZN1WHnN5Iwpe46dYfb7NjiTWH65w8xdGFaBO52wO 7xxSq8GyiGVjtaT8C9I0PPavRHcG2XnVN+wQa21kp3yEssyMYIxWLIO1T+glhh72xi6n THoQ== X-Gm-Message-State: AOAM533kCX8/BcpgBywHti3MHz5a96xXs6LgDj9gWkFZNjEqs8HnyR4G AxcgaGY6LLHmJD0Z0W2pKaOZTddDZB57HA== X-Google-Smtp-Source: ABdhPJzZGoFk45q+CJTlaJNn6tapB/YIK+s7/IPyXt1Y8sk2gatZsTqr8LxxIzZHS3JzTCgse8E31Q== X-Received: by 2002:aa7:8b56:0:b029:2b9:77be:d305 with SMTP id i22-20020aa78b560000b02902b977bed305mr28152313pfd.61.1626729777946; Mon, 19 Jul 2021 14:22:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 10/15] target/arm: Implement debug_check_breakpoint Date: Mon, 19 Jul 2021 11:22:34 -1000 Message-Id: <20210719212239.428740-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730479395100001 Content-Type: text/plain; charset="utf-8" Reuse the code at the bottom of helper_check_breakpoints, which is what we currently call from *_tr_breakpoint_check. Signed-off-by: Richard Henderson --- target/arm/internals.h | 3 +++ target/arm/cpu.c | 1 + target/arm/cpu_tcg.c | 1 + target/arm/debug_helper.c | 7 +++---- 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 3ba86e8af8..11a72013f5 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -282,6 +282,9 @@ void hw_breakpoint_update(ARMCPU *cpu, int n); */ void hw_breakpoint_update_all(ARMCPU *cpu); =20 +/* Callback function for checking if a breakpoint should trigger. */ +bool arm_debug_check_breakpoint(CPUState *cs); + /* Callback function for checking if a watchpoint should trigger. */ bool arm_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp); =20 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 9cddfd6a44..752b15bb79 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1984,6 +1984,7 @@ static const struct TCGCPUOps arm_tcg_ops =3D { .do_unaligned_access =3D arm_cpu_do_unaligned_access, .adjust_watchpoint_address =3D arm_adjust_watchpoint_address, .debug_check_watchpoint =3D arm_debug_check_watchpoint, + .debug_check_breakpoint =3D arm_debug_check_breakpoint, #endif /* !CONFIG_USER_ONLY */ }; #endif /* CONFIG_TCG */ diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index d2d97115ea..ed444bf436 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -911,6 +911,7 @@ static const struct TCGCPUOps arm_v7m_tcg_ops =3D { .do_unaligned_access =3D arm_cpu_do_unaligned_access, .adjust_watchpoint_address =3D arm_adjust_watchpoint_address, .debug_check_watchpoint =3D arm_debug_check_watchpoint, + .debug_check_breakpoint =3D arm_debug_check_breakpoint, #endif /* !CONFIG_USER_ONLY */ }; #endif /* CONFIG_TCG */ diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 2ff72d47d1..4a0c479527 100644 --- a/target/arm/debug_helper.c +++ b/target/arm/debug_helper.c @@ -216,8 +216,9 @@ static bool check_watchpoints(ARMCPU *cpu) return false; } =20 -static bool check_breakpoints(ARMCPU *cpu) +bool arm_debug_check_breakpoint(CPUState *cs) { + ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; int n; =20 @@ -240,9 +241,7 @@ static bool check_breakpoints(ARMCPU *cpu) =20 void HELPER(check_breakpoints)(CPUARMState *env) { - ARMCPU *cpu =3D env_archcpu(env); - - if (check_breakpoints(cpu)) { + if (arm_debug_check_breakpoint(env_cpu(env))) { HELPER(exception_internal(env, EXCP_DEBUG)); } } --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626729935547546.3241055299118; Mon, 19 Jul 2021 14:25:35 -0700 (PDT) Received: from localhost ([::1]:55622 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5ala-0000At-IM for importer@patchew.org; Mon, 19 Jul 2021 17:25:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60674) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aj8-0004VZ-B4 for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:02 -0400 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]:38508) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aj6-0000uz-FK for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:02 -0400 Received: by mail-pf1-x429.google.com with SMTP id i14so5738074pfd.5 for ; Mon, 19 Jul 2021 14:23:00 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:22:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1SYl6z4JM6oqxGI/nixKvmomGJ8etB/EcKsdFgvob4o=; b=RZbswz7PF6dQ3OhUhhzVrGsR1pnMNOZ0ZSXwA1SV2b0IyqQ/aYsoCIihK53QgS/qDJ eOqPawMxfX40uXum3QSlGuG9BO4+v/kMrXL7JhCGvX7Az2d0TwH6DQIiRAY0QVhmZBuz 0F+DdR7NM5rm/aqYcHnvsvYjVzD9RKGGpneVVGLGU5QFbwIzhhQz8WHRkiXu52OATvE2 HhkO3ZxlAyCSgMMQc2UIQ51fN4PnS6BvFQpMu+LSnmtuCTr3zy6xc1TtnGhx1d+TWcKp iY+76vitr1qp/6Yrtt+vbGWAVGYRDSbpMK9qXzniX32PgMGqJ9kEM3VuqNKrA7CMW2Oj 3aYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1SYl6z4JM6oqxGI/nixKvmomGJ8etB/EcKsdFgvob4o=; b=Vost8+mYnlA/7If1VGdWj3XP2eRsvUTVpO0n+B5c0dpIWnMnLXQvSXaClzzeBd1o+L D5bGxq9cOxpuVZmDpohoQlPzwKbV/BR06G2tQHGElwu708wdorF4OGrjCZBtEWDb9Oui i8BpqFHxMKdAHUSElcpbrzq3Ig6QcPX9HmyXOTKUyyLVL+6WSoaUZcrVrUE+bvG9dq/y cuwWxdAXYFMSgoaonDHzO7A1+omtqTOG1E5LE7a2QxdNVBH5XoW6ZBAXUh2b39k04x9c jU5LfBCG9A2OV6XAHfus+zmheltNIg/Yigkp5KjJ3+5Q8q9FlKMZ6/haPJyp6S0Vc2JK E+Rw== X-Gm-Message-State: AOAM532N568f8XLAWAu0UXkUFAfJQ5QwQiGyUmCU8jGO2Oi8N6JpTH8L g7sGJBNUaRteGdFJ8VlLeI4JeKNidXB54Q== X-Google-Smtp-Source: ABdhPJxYZl7qcQO3zFE3xwKVxt3g96x8Hfh57cFaEJ4CqAVpMp65hlmpA2DlQw1mVBRRXQ++/EiZ1Q== X-Received: by 2002:a05:6a00:10cd:b029:30a:ea3a:4acf with SMTP id d13-20020a056a0010cdb029030aea3a4acfmr28748825pfu.51.1626729779234; Mon, 19 Jul 2021 14:22:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 11/15] target/i386: Implement debug_check_breakpoint Date: Mon, 19 Jul 2021 11:22:35 -1000 Message-Id: <20210719212239.428740-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626729937244100001 Content-Type: text/plain; charset="utf-8" Return false for RF set, as we do in i386_tr_breakpoint_check. Signed-off-by: Richard Henderson --- target/i386/tcg/tcg-cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index e96ec9bbcc..238e3a9395 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -54,6 +54,17 @@ static void x86_cpu_synchronize_from_tb(CPUState *cs, cpu->env.eip =3D tb->pc - tb->cs_base; } =20 +#ifndef CONFIG_USER_ONLY +static bool x86_debug_check_breakpoint(CPUState *cs) +{ + X86CPU *cpu =3D X86_CPU(cs); + CPUX86State *env =3D &cpu->env; + + /* RF disables all architectural breakpoints. */ + return !(env->eflags & RF_MASK); +} +#endif + #include "hw/core/tcg-cpu-ops.h" =20 static const struct TCGCPUOps x86_tcg_ops =3D { @@ -66,6 +77,7 @@ static const struct TCGCPUOps x86_tcg_ops =3D { .tlb_fill =3D x86_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .debug_excp_handler =3D breakpoint_handler, + .debug_check_breakpoint =3D x86_debug_check_breakpoint, #endif /* !CONFIG_USER_ONLY */ }; =20 --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730413225106.44727213646945; Mon, 19 Jul 2021 14:33:33 -0700 (PDT) Received: from localhost ([::1]:52124 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5atI-0000VR-3x for importer@patchew.org; Mon, 19 Jul 2021 17:33:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60704) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5aj9-0004bw-SJ for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:03 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:33421) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aj7-0000vo-Qh for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:03 -0400 Received: by mail-pf1-x42f.google.com with SMTP id m83so17800411pfd.0 for ; Mon, 19 Jul 2021 14:23:01 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.22.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:23:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fzLN6LJcZO2xicohFOFZSVceyKKHM7Y4lz49tfUv8WU=; b=RMCbkVMVo83FrqNbioGaWU0L1BqO058sKobmv9QGUn7pJZ0n1s6Z0VtO79ym2juh/c j5icU1iuqAalYcDOrbImDFp0C3Wmp/O/RSrZbH1ykSNK8GuOi9FO8P/XdlhcEuVCIKU+ TsByRW9Saz5txWv7x2ZhQRgMorsrq/Y19BzZK+bV+vTwaEkexDGvpZfPjXC11kvptVEJ CGjzR1sSQtFevSG08htGxkwWEqjEuTe6yOFUO7g8Gx/c3FcWBe00e4k7vA5/dismzUpK gYRPl1VkIr0MthVD+5/p7L8Zu5AWX9NliyTNNoMfbq0Qb2w1GK6sh4cqewA00iw90/Xh OZEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fzLN6LJcZO2xicohFOFZSVceyKKHM7Y4lz49tfUv8WU=; b=MlPJ67dFbiy0sUMI9hdpbLm+ickRCdRuen6ri3xy191ePrfQ3ag01of7AW6JnvNtkt StMz1+GcvF0LUAM+bUT9Wzyf82WWFJeKCqwAYmS0+7U08u/nM3E12cH7m52REev4yz4e FqzfkV7HC66ErkBKVeLtyzixM+ALXbPQ2BdTOZ/Nugx+D4zl/h7JxSvPRytjGyyZUjLW xALgdZvNE9SYDZa3MLqP8OCPxv1KW9rXU2Mn0xNLR1PnEq+2gZkJCWIS/NwNM7wCvKb5 2pl/9Uuy5ptNbethdDfhWVyrGnyU9FpbPkum7Q0gWauE0hW+Y51VImf6l30GNyF4TiRU TvlA== X-Gm-Message-State: AOAM531x6MkTcnqqvU19MSMPujsAF9DkPLBR6/H1biJshCnxPL++0Tx5 PFc3nWx35yOopaLsdAy97HnH5Q+CQH6QtA== X-Google-Smtp-Source: ABdhPJxZ4GkVDAEGxeKXbuHyvCNwWL//tFIMjPKjIkP++Z8e3LJUvRwWg6uhKjE52kWOG5Uhelie0w== X-Received: by 2002:a63:de45:: with SMTP id y5mr26977124pgi.261.1626729780550; Mon, 19 Jul 2021 14:23:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 12/15] accel/tcg: Move breakpoint recognition outside translation Date: Mon, 19 Jul 2021 11:22:36 -1000 Message-Id: <20210719212239.428740-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730414707100002 Content-Type: text/plain; charset="utf-8" Trigger breakpoints before beginning translation of a TB that would begin with a BP. Thus we never generate code for the BP at all. Single-step instructions within a page containing a BP so that we are sure to check each insn for the BP as above. We no longer need to flush any TBs when changing BPs. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/286 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/404 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/489 Signed-off-by: Richard Henderson --- accel/tcg/cpu-exec.c | 69 ++++++++++++++++++++++++++++++++++++++++-- accel/tcg/translator.c | 24 +-------------- cpu.c | 20 ------------ 3 files changed, 68 insertions(+), 45 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 4d043a11aa..6710e15d8b 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -222,6 +222,62 @@ static inline void log_cpu_exec(target_ulong pc, CPUSt= ate *cpu, } } =20 +static uint32_t cflags_for_breakpoints(CPUState *cpu, target_ulong pc, + uint32_t cflags) +{ + uint32_t bflags =3D 0; + + if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) { + CPUBreakpoint *bp; + + QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { + /* + * If we have an exact pc match, trigger the breakpoint. + * Otherwise, note matches within the page. + */ + if (pc =3D=3D bp->pc) { + bool match_bp =3D false; + + if (bp->flags & BP_GDB) { + match_bp =3D true; + } else if (bp->flags & BP_CPU) { +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + CPUClass *cc =3D CPU_GET_CLASS(cpu); + assert(cc->tcg_ops->debug_check_breakpoint); + match_bp =3D cc->tcg_ops->debug_check_breakpoint(cpu); +#endif + } + + if (match_bp) { + cpu->exception_index =3D EXCP_DEBUG; + cpu_loop_exit(cpu); + } + } else if (((pc ^ bp->pc) & TARGET_PAGE_MASK) =3D=3D 0) { + /* + * Within the same page as a breakpoint, single-step, + * returning to helper_lookup_tb_ptr after each looking + * for the actual breakpoint. + * + * TODO: Perhaps better to record all of the TBs associated + * with a given virtual page that contains a breakpoint, a= nd + * then invalidate them when a new overlapping breakpoint = is + * set on the page. Non-overlapping TBs would not be + * invalidated, nor would any TB need to be invalidated as + * breakpoints are removed. + */ + bflags =3D CF_NO_GOTO_TB | 1; + } + } + } + + if (unlikely(bflags)) { + cflags =3D (cflags & ~CF_COUNT_MASK) | bflags; + } + return cflags; +} + /** * helper_lookup_tb_ptr: quick check for next tb * @env: current cpu state @@ -235,11 +291,13 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env) CPUState *cpu =3D env_cpu(env); TranslationBlock *tb; target_ulong cs_base, pc; - uint32_t flags; + uint32_t flags, cflags; =20 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); =20 - tb =3D tb_lookup(cpu, pc, cs_base, flags, curr_cflags(cpu)); + cflags =3D cflags_for_breakpoints(cpu, pc, curr_cflags(cpu)); + + tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); if (tb =3D=3D NULL) { return tcg_code_gen_epilogue; } @@ -346,6 +404,12 @@ void cpu_exec_step_atomic(CPUState *cpu) cflags &=3D ~CF_PARALLEL; /* After 1 insn, return and release the exclusive lock. */ cflags |=3D CF_NO_GOTO_TB | CF_NO_GOTO_PTR | 1; + /* + * No need to check cflags_for_breakpoints here. + * We only arrive in cpu_exec_step_atomic after beginning execution + * of an insn that includes an atomic operation we can't handle. + * Any breakpoint for this insn will have been recognized earlier. + */ =20 tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); if (tb =3D=3D NULL) { @@ -524,6 +588,7 @@ static inline TranslationBlock *tb_find(CPUState *cpu, } else { cpu->cflags_next_tb =3D -1; } + cflags =3D cflags_for_breakpoints(cpu, pc, cflags); =20 tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); if (tb =3D=3D NULL) { diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index a59eb7c11b..4f3728c278 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -50,7 +50,6 @@ bool translator_use_goto_tb(DisasContextBase *db, target_= ulong dest) void translator_loop(const TranslatorOps *ops, DisasContextBase *db, CPUState *cpu, TranslationBlock *tb, int max_insns) { - int bp_insn =3D 0; bool plugin_enabled; =20 /* Initialize DisasContext */ @@ -85,27 +84,6 @@ void translator_loop(const TranslatorOps *ops, DisasCont= extBase *db, plugin_gen_insn_start(cpu, db); } =20 - /* Pass breakpoint hits to target for further processing */ - if (!db->singlestep_enabled - && unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) { - CPUBreakpoint *bp; - QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { - if (bp->pc =3D=3D db->pc_next) { - if (ops->breakpoint_check(db, cpu, bp)) { - bp_insn =3D 1; - break; - } - } - } - /* The breakpoint_check hook may use DISAS_TOO_MANY to indicate - that only one more instruction is to be executed. Otherwise - it should use DISAS_NORETURN when generating an exception, - but may use a DISAS_TARGET_* value for Something Else. */ - if (db->is_jmp > DISAS_TOO_MANY) { - break; - } - } - /* Disassemble one instruction. The translate_insn hook should update db->pc_next and db->is_jmp to indicate what should be done next -- either exiting this loop or locate the start of @@ -144,7 +122,7 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, =20 /* Emit code to exit the TB, as indicated by db->is_jmp. */ ops->tb_stop(db, cpu); - gen_tb_end(db->tb, db->num_insns - bp_insn); + gen_tb_end(db->tb, db->num_insns); =20 if (plugin_enabled) { plugin_gen_tb_end(cpu); diff --git a/cpu.c b/cpu.c index 83059537d7..660b56f431 100644 --- a/cpu.c +++ b/cpu.c @@ -225,11 +225,6 @@ void tb_invalidate_phys_addr(target_ulong addr) tb_invalidate_phys_page_range(addr, addr + 1); mmap_unlock(); } - -static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) -{ - tb_invalidate_phys_addr(pc); -} #else void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs att= rs) { @@ -250,17 +245,6 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr = addr, MemTxAttrs attrs) ram_addr =3D memory_region_get_ram_addr(mr) + addr; tb_invalidate_phys_page_range(ram_addr, ram_addr + 1); } - -static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) -{ - /* - * There may not be a virtual to physical translation for the pc - * right now, but there may exist cached TB for this pc. - * Flush the whole TB cache to force re-translation of such TBs. - * This is heavyweight, but we're debugging anyway. - */ - tb_flush(cpu); -} #endif =20 /* Add a breakpoint. */ @@ -281,8 +265,6 @@ int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int = flags, QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry); } =20 - breakpoint_invalidate(cpu, pc); - if (breakpoint) { *breakpoint =3D bp; } @@ -310,8 +292,6 @@ void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBre= akpoint *bp) { QTAILQ_REMOVE(&cpu->breakpoints, bp, entry); =20 - breakpoint_invalidate(cpu, bp->pc); - trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags); g_free(bp); } --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 162673051330779.60393364551646; Mon, 19 Jul 2021 14:35:13 -0700 (PDT) Received: from localhost ([::1]:57690 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5auu-0004O5-4T for importer@patchew.org; Mon, 19 Jul 2021 17:35:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60748) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5ajD-0004od-5R for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:07 -0400 Received: from mail-pf1-x429.google.com ([2607:f8b0:4864:20::429]:34513) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5aj9-0000xJ-CI for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:06 -0400 Received: by mail-pf1-x429.google.com with SMTP id o201so17762543pfd.1 for ; Mon, 19 Jul 2021 14:23:02 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.23.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:23:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fykISWlKpFIEXPKEG8sG6EDQPFSFUx9i7hkvGkSwuYI=; b=zabe24FpWUjO6mQHIqc2RwyskwndDvzPcR/O7OfLCzYz+V/crjI/Bh5YYQtNJc0VhM qWUdQW9haT4Une17yRNfriucQ2Ym7f1tS6ehBWtO5T9zccIMHfAvDHGILBofV9wHKDjy 6shIHN/fszHKFWybf2kSTrKR3v5ghsxvHd/Ea6LJeA52qUbCanBIkkjKHje/5A4uHhOU pEVFzff0O4WU/g53TZDYB0YERNkNnjv9ILkgzR2uWdd0EShbWb3aC+qj9nhS6z8AzHDN VfaG2ut75WL8a1AxV5hhIEqlJUQXQWJfNZRy7NMQagD9W5xX8mMSQgvNOYYnXrkCajlt uIKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fykISWlKpFIEXPKEG8sG6EDQPFSFUx9i7hkvGkSwuYI=; b=KbyAs8aUFKBy2v+ICnFF4EEw09ufmNKlDUd7fcxsW2L0FaLM8JJ0WLRPAtvIWe8DjR eIAnSkNabkO8IvHtKRMA2UBSM0rBW+7bBBA1x/ARKU+ZidbaJ2rWXV65gWI2obCnzWRI y4xvTJXNDBXDaUtvtUf/l6/1W3B2599az8tj9pllPPcgE2tdrIu+nHf1oCCuo7lkMn7t ry7Ep+S5OVx2+ccxqrE2svxOnJ1jg7D44KloOmM3RLI6iG+g+kNUFlS1hMi8xWAoKwTy PHSdz7ARIjJtD0PgpEhYtBVqjgg9Lv4tBuW1XhJCQ+Lo5E89y7mj/QaG+XQnvDlPjEan ONWw== X-Gm-Message-State: AOAM5334C/RfJCA8UFHRIAakau6PdC46FOMckAeAO9sMfXNY4TKkGdKX +NUOJf93fMjt2DApZ/7vzqfHtYCbfpUbfA== X-Google-Smtp-Source: ABdhPJxtpIPXnT5hR1dR9DOcvVUPWkObA/OKTsQ9VrE/2ZBXuH+g337qQPxNzWjt3XW1RrzAbBP0Gw== X-Received: by 2002:a63:5425:: with SMTP id i37mr5269678pgb.234.1626729781965; Mon, 19 Jul 2021 14:23:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 13/15] accel/tcg: Remove TranslatorOps.breakpoint_check Date: Mon, 19 Jul 2021 11:22:37 -1000 Message-Id: <20210719212239.428740-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730513652100001 Content-Type: text/plain; charset="utf-8" The hook is now unused, with breakpoints checked outside translation. Signed-off-by: Richard Henderson --- include/exec/translator.h | 11 ----------- target/alpha/translate.c | 16 ---------------- target/arm/translate-a64.c | 25 ------------------------- target/arm/translate.c | 29 ----------------------------- target/avr/translate.c | 10 ---------- target/cris/translate.c | 20 -------------------- target/hexagon/translate.c | 17 ----------------- target/hppa/translate.c | 11 ----------- target/i386/tcg/translate.c | 28 ---------------------------- target/m68k/translate.c | 18 ------------------ target/microblaze/translate.c | 18 ------------------ target/mips/tcg/translate.c | 19 ------------------- target/nios2/translate.c | 27 --------------------------- target/openrisc/translate.c | 17 ----------------- target/ppc/translate.c | 18 ------------------ target/riscv/translate.c | 17 ----------------- target/rx/translate.c | 14 -------------- target/s390x/tcg/translate.c | 24 ------------------------ target/sh4/translate.c | 18 ------------------ target/sparc/translate.c | 17 ----------------- target/tricore/translate.c | 16 ---------------- target/xtensa/translate.c | 17 ----------------- 22 files changed, 407 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index dd9c06d40d..d318803267 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -89,15 +89,6 @@ typedef struct DisasContextBase { * @insn_start: * Emit the tcg_gen_insn_start opcode. * - * @breakpoint_check: - * When called, the breakpoint has already been checked to match the = PC, - * but the target may decide the breakpoint missed the address - * (e.g., due to conditions encoded in their flags). Return true to - * indicate that the breakpoint did hit, in which case no more breakp= oints - * are checked. If the breakpoint did hit, emit any code required to - * signal the exception, and set db->is_jmp as necessary to terminate - * the main loop. - * * @translate_insn: * Disassemble one instruction and set db->pc_next for the start * of the following instruction. Set db->is_jmp as necessary to @@ -113,8 +104,6 @@ typedef struct TranslatorOps { void (*init_disas_context)(DisasContextBase *db, CPUState *cpu); void (*tb_start)(DisasContextBase *db, CPUState *cpu); void (*insn_start)(DisasContextBase *db, CPUState *cpu); - bool (*breakpoint_check)(DisasContextBase *db, CPUState *cpu, - const CPUBreakpoint *bp); void (*translate_insn)(DisasContextBase *db, CPUState *cpu); void (*tb_stop)(DisasContextBase *db, CPUState *cpu); void (*disas_log)(const DisasContextBase *db, CPUState *cpu); diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 949ba6ffde..de6c0a8439 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -2967,21 +2967,6 @@ static void alpha_tr_insn_start(DisasContextBase *dc= base, CPUState *cpu) tcg_gen_insn_start(dcbase->pc_next); } =20 -static bool alpha_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *= cpu, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - ctx->base.is_jmp =3D gen_excp(ctx, EXCP_DEBUG, 0); - - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - ctx->base.pc_next +=3D 4; - return true; -} - static void alpha_tr_translate_insn(DisasContextBase *dcbase, CPUState *cp= u) { DisasContext *ctx =3D container_of(dcbase, DisasContext, base); @@ -3040,7 +3025,6 @@ static const TranslatorOps alpha_tr_ops =3D { .init_disas_context =3D alpha_tr_init_disas_context, .tb_start =3D alpha_tr_tb_start, .insn_start =3D alpha_tr_insn_start, - .breakpoint_check =3D alpha_tr_breakpoint_check, .translate_insn =3D alpha_tr_translate_insn, .tb_stop =3D alpha_tr_tb_stop, .disas_log =3D alpha_tr_disas_log, diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index ca11a5fecd..422e2ac0c9 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -14844,30 +14844,6 @@ static void aarch64_tr_insn_start(DisasContextBase= *dcbase, CPUState *cpu) dc->insn_start =3D tcg_last_op(); } =20 -static bool aarch64_tr_breakpoint_check(DisasContextBase *dcbase, CPUState= *cpu, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - if (bp->flags & BP_CPU) { - gen_a64_set_pc_im(dc->base.pc_next); - gen_helper_check_breakpoints(cpu_env); - /* End the TB early; it likely won't be executed */ - dc->base.is_jmp =3D DISAS_TOO_MANY; - } else { - gen_exception_internal_insn(dc, dc->base.pc_next, EXCP_DEBUG); - /* The address covered by the breakpoint must be - included in [tb->pc, tb->pc + tb->size) in order - to for it to be properly cleared -- thus we - increment the PC here so that the logic setting - tb->size below does the right thing. */ - dc->base.pc_next +=3D 4; - dc->base.is_jmp =3D DISAS_NORETURN; - } - - return true; -} - static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *= cpu) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); @@ -14982,7 +14958,6 @@ const TranslatorOps aarch64_translator_ops =3D { .init_disas_context =3D aarch64_tr_init_disas_context, .tb_start =3D aarch64_tr_tb_start, .insn_start =3D aarch64_tr_insn_start, - .breakpoint_check =3D aarch64_tr_breakpoint_check, .translate_insn =3D aarch64_tr_translate_insn, .tb_stop =3D aarch64_tr_tb_stop, .disas_log =3D aarch64_tr_disas_log, diff --git a/target/arm/translate.c b/target/arm/translate.c index e1a8152598..351afa43a2 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9438,33 +9438,6 @@ static void arm_tr_insn_start(DisasContextBase *dcba= se, CPUState *cpu) dc->insn_start =3D tcg_last_op(); } =20 -static bool arm_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cp= u, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - if (bp->flags & BP_CPU) { - gen_set_condexec(dc); - gen_set_pc_im(dc, dc->base.pc_next); - gen_helper_check_breakpoints(cpu_env); - /* End the TB early; it's likely not going to be executed */ - dc->base.is_jmp =3D DISAS_TOO_MANY; - } else { - gen_exception_internal_insn(dc, dc->base.pc_next, EXCP_DEBUG); - /* The address covered by the breakpoint must be - included in [tb->pc, tb->pc + tb->size) in order - to for it to be properly cleared -- thus we - increment the PC here so that the logic setting - tb->size below does the right thing. */ - /* TODO: Advance PC by correct instruction length to - * avoid disassembler error messages */ - dc->base.pc_next +=3D 2; - dc->base.is_jmp =3D DISAS_NORETURN; - } - - return true; -} - static bool arm_pre_translate_insn(DisasContext *dc) { #ifdef CONFIG_USER_ONLY @@ -9827,7 +9800,6 @@ static const TranslatorOps arm_translator_ops =3D { .init_disas_context =3D arm_tr_init_disas_context, .tb_start =3D arm_tr_tb_start, .insn_start =3D arm_tr_insn_start, - .breakpoint_check =3D arm_tr_breakpoint_check, .translate_insn =3D arm_tr_translate_insn, .tb_stop =3D arm_tr_tb_stop, .disas_log =3D arm_tr_disas_log, @@ -9837,7 +9809,6 @@ static const TranslatorOps thumb_translator_ops =3D { .init_disas_context =3D arm_tr_init_disas_context, .tb_start =3D arm_tr_tb_start, .insn_start =3D arm_tr_insn_start, - .breakpoint_check =3D arm_tr_breakpoint_check, .translate_insn =3D thumb_tr_translate_insn, .tb_stop =3D arm_tr_tb_stop, .disas_log =3D arm_tr_disas_log, diff --git a/target/avr/translate.c b/target/avr/translate.c index 8237a03c23..3055e84483 100644 --- a/target/avr/translate.c +++ b/target/avr/translate.c @@ -2944,15 +2944,6 @@ static void avr_tr_insn_start(DisasContextBase *dcba= se, CPUState *cs) tcg_gen_insn_start(ctx->npc); } =20 -static bool avr_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - gen_breakpoint(ctx); - return true; -} - static void avr_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx =3D container_of(dcbase, DisasContext, base); @@ -3069,7 +3060,6 @@ static const TranslatorOps avr_tr_ops =3D { .init_disas_context =3D avr_tr_init_disas_context, .tb_start =3D avr_tr_tb_start, .insn_start =3D avr_tr_insn_start, - .breakpoint_check =3D avr_tr_breakpoint_check, .translate_insn =3D avr_tr_translate_insn, .tb_stop =3D avr_tr_tb_stop, .disas_log =3D avr_tr_disas_log, diff --git a/target/cris/translate.c b/target/cris/translate.c index 9258c13e9f..a84b753349 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -3118,25 +3118,6 @@ static void cris_tr_insn_start(DisasContextBase *dcb= ase, CPUState *cpu) tcg_gen_insn_start(dc->delayed_branch =3D=3D 1 ? dc->ppc | 1 : dc->pc); } =20 -static bool cris_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *c= pu, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - cris_evaluate_flags(dc); - tcg_gen_movi_tl(env_pc, dc->pc); - t_gen_raise_exception(EXCP_DEBUG); - dc->base.is_jmp =3D DISAS_NORETURN; - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be - * properly cleared -- thus we increment the PC here so that - * the logic setting tb->size below does the right thing. - */ - dc->pc +=3D 2; - return true; -} - static void cris_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); @@ -3315,7 +3296,6 @@ static const TranslatorOps cris_tr_ops =3D { .init_disas_context =3D cris_tr_init_disas_context, .tb_start =3D cris_tr_tb_start, .insn_start =3D cris_tr_insn_start, - .breakpoint_check =3D cris_tr_breakpoint_check, .translate_insn =3D cris_tr_translate_insn, .tb_stop =3D cris_tr_tb_stop, .disas_log =3D cris_tr_disas_log, diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index b23d36adf5..54fdcaa5e8 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -540,22 +540,6 @@ static void hexagon_tr_insn_start(DisasContextBase *dc= base, CPUState *cpu) tcg_gen_insn_start(ctx->base.pc_next); } =20 -static bool hexagon_tr_breakpoint_check(DisasContextBase *dcbase, CPUState= *cpu, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - gen_exception_end_tb(ctx, EXCP_DEBUG); - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be - * properly cleared -- thus we increment the PC here so that - * the logic setting tb->size below does the right thing. - */ - ctx->base.pc_next +=3D 4; - return true; -} - static bool pkt_crosses_page(CPUHexagonState *env, DisasContext *ctx) { target_ulong page_start =3D ctx->base.pc_first & TARGET_PAGE_MASK; @@ -631,7 +615,6 @@ static const TranslatorOps hexagon_tr_ops =3D { .init_disas_context =3D hexagon_tr_init_disas_context, .tb_start =3D hexagon_tr_tb_start, .insn_start =3D hexagon_tr_insn_start, - .breakpoint_check =3D hexagon_tr_breakpoint_check, .translate_insn =3D hexagon_tr_translate_packet, .tb_stop =3D hexagon_tr_tb_stop, .disas_log =3D hexagon_tr_disas_log, diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 2552747138..b18150ef8d 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -4159,16 +4159,6 @@ static void hppa_tr_insn_start(DisasContextBase *dcb= ase, CPUState *cs) tcg_gen_insn_start(ctx->iaoq_f, ctx->iaoq_b); } =20 -static bool hppa_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *c= s, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - gen_excp(ctx, EXCP_DEBUG); - ctx->base.pc_next +=3D 4; - return true; -} - static void hppa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx =3D container_of(dcbase, DisasContext, base); @@ -4330,7 +4320,6 @@ static const TranslatorOps hppa_tr_ops =3D { .init_disas_context =3D hppa_tr_init_disas_context, .tb_start =3D hppa_tr_tb_start, .insn_start =3D hppa_tr_insn_start, - .breakpoint_check =3D hppa_tr_breakpoint_check, .translate_insn =3D hppa_tr_translate_insn, .tb_stop =3D hppa_tr_tb_stop, .disas_log =3D hppa_tr_disas_log, diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 8520d5a1e2..aacb605eee 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2604,14 +2604,6 @@ static void gen_interrupt(DisasContext *s, int intno, s->base.is_jmp =3D DISAS_NORETURN; } =20 -static void gen_debug(DisasContext *s) -{ - gen_update_cc_op(s); - gen_jmp_im(s, s->base.pc_next - s->cs_base); - gen_helper_debug(cpu_env); - s->base.is_jmp =3D DISAS_NORETURN; -} - static void gen_set_hflag(DisasContext *s, uint32_t mask) { if ((s->flags & mask) =3D=3D 0) { @@ -8635,25 +8627,6 @@ static void i386_tr_insn_start(DisasContextBase *dcb= ase, CPUState *cpu) tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); } =20 -static bool i386_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *c= pu, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - /* If RF is set, suppress an internally generated breakpoint. */ - int flags =3D dc->base.tb->flags & HF_RF_MASK ? BP_GDB : BP_ANY; - if (bp->flags & flags) { - gen_debug(dc); - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the generic logic setting tb->size later does the right thing. = */ - dc->base.pc_next +=3D 1; - return true; - } else { - return false; - } -} - static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); @@ -8721,7 +8694,6 @@ static const TranslatorOps i386_tr_ops =3D { .init_disas_context =3D i386_tr_init_disas_context, .tb_start =3D i386_tr_tb_start, .insn_start =3D i386_tr_insn_start, - .breakpoint_check =3D i386_tr_breakpoint_check, .translate_insn =3D i386_tr_translate_insn, .tb_stop =3D i386_tr_tb_stop, .disas_log =3D i386_tr_disas_log, diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 1fee04b8dd..c34d9aed61 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -6208,23 +6208,6 @@ static void m68k_tr_insn_start(DisasContextBase *dcb= ase, CPUState *cpu) tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); } =20 -static bool m68k_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *c= pu, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - gen_exception(dc, dc->base.pc_next, EXCP_DEBUG); - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be - * properly cleared -- thus we increment the PC here so that - * the logic setting tb->size below does the right thing. - */ - dc->base.pc_next +=3D 2; - - return true; -} - static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); @@ -6310,7 +6293,6 @@ static const TranslatorOps m68k_tr_ops =3D { .init_disas_context =3D m68k_tr_init_disas_context, .tb_start =3D m68k_tr_tb_start, .insn_start =3D m68k_tr_insn_start, - .breakpoint_check =3D m68k_tr_breakpoint_check, .translate_insn =3D m68k_tr_translate_insn, .tb_stop =3D m68k_tr_tb_stop, .disas_log =3D m68k_tr_disas_log, diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index c68a84a219..a14ffed784 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1673,23 +1673,6 @@ static void mb_tr_insn_start(DisasContextBase *dcb, = CPUState *cs) dc->insn_start =3D tcg_last_op(); } =20 -static bool mb_tr_breakpoint_check(DisasContextBase *dcb, CPUState *cs, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcb, DisasContext, base); - - gen_raise_exception_sync(dc, EXCP_DEBUG); - - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be - * properly cleared -- thus we increment the PC here so that - * the logic setting tb->size below does the right thing. - */ - dc->base.pc_next +=3D 4; - return true; -} - static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) { DisasContext *dc =3D container_of(dcb, DisasContext, base); @@ -1854,7 +1837,6 @@ static const TranslatorOps mb_tr_ops =3D { .init_disas_context =3D mb_tr_init_disas_context, .tb_start =3D mb_tr_tb_start, .insn_start =3D mb_tr_insn_start, - .breakpoint_check =3D mb_tr_breakpoint_check, .translate_insn =3D mb_tr_translate_insn, .tb_stop =3D mb_tr_tb_stop, .disas_log =3D mb_tr_disas_log, diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index fd980ea966..5b03545f09 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -16178,24 +16178,6 @@ static void mips_tr_insn_start(DisasContextBase *d= cbase, CPUState *cs) ctx->btarget); } =20 -static bool mips_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *c= s, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - save_cpu_state(ctx, 1); - ctx->base.is_jmp =3D DISAS_NORETURN; - gen_helper_raise_exception_debug(cpu_env); - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be - * properly cleared -- thus we increment the PC here so that - * the logic setting tb->size below does the right thing. - */ - ctx->base.pc_next +=3D 4; - return true; -} - static void mips_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { CPUMIPSState *env =3D cs->env_ptr; @@ -16303,7 +16285,6 @@ static const TranslatorOps mips_tr_ops =3D { .init_disas_context =3D mips_tr_init_disas_context, .tb_start =3D mips_tr_tb_start, .insn_start =3D mips_tr_insn_start, - .breakpoint_check =3D mips_tr_breakpoint_check, .translate_insn =3D mips_tr_translate_insn, .tb_stop =3D mips_tr_tb_stop, .disas_log =3D mips_tr_disas_log, diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 17742cebc7..08d7ac5398 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -744,16 +744,6 @@ static const char * const regnames[] =3D { =20 #include "exec/gen-icount.h" =20 -static void gen_exception(DisasContext *dc, uint32_t excp) -{ - TCGv_i32 tmp =3D tcg_const_i32(excp); - - tcg_gen_movi_tl(cpu_R[R_PC], dc->pc); - gen_helper_raise_exception(cpu_env, tmp); - tcg_temp_free_i32(tmp); - dc->base.is_jmp =3D DISAS_NORETURN; -} - /* generate intermediate code for basic block 'tb'. */ static void nios2_tr_init_disas_context(DisasContextBase *dcbase, CPUState= *cs) { @@ -777,22 +767,6 @@ static void nios2_tr_insn_start(DisasContextBase *dcba= se, CPUState *cs) tcg_gen_insn_start(dcbase->pc_next); } =20 -static bool nios2_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *= cs, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - gen_exception(dc, EXCP_DEBUG); - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be - * properly cleared -- thus we increment the PC here so that - * the logic setting tb->size below does the right thing. - */ - dc->base.pc_next +=3D 4; - return true; -} - static void nios2_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); @@ -870,7 +844,6 @@ static const TranslatorOps nios2_tr_ops =3D { .init_disas_context =3D nios2_tr_init_disas_context, .tb_start =3D nios2_tr_tb_start, .insn_start =3D nios2_tr_insn_start, - .breakpoint_check =3D nios2_tr_breakpoint_check, .translate_insn =3D nios2_tr_translate_insn, .tb_stop =3D nios2_tr_tb_stop, .disas_log =3D nios2_tr_disas_log, diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 059da48475..d6ea536744 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -1609,22 +1609,6 @@ static void openrisc_tr_insn_start(DisasContextBase = *dcbase, CPUState *cs) | (dc->base.num_insns > 1 ? 2 : 0)); } =20 -static bool openrisc_tr_breakpoint_check(DisasContextBase *dcbase, CPUStat= e *cs, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - tcg_gen_movi_tl(cpu_pc, dc->base.pc_next); - gen_exception(dc, EXCP_DEBUG); - dc->base.is_jmp =3D DISAS_NORETURN; - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc->base.pc_next +=3D 4; - return true; -} - static void openrisc_tr_translate_insn(DisasContextBase *dcbase, CPUState = *cs) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); @@ -1727,7 +1711,6 @@ static const TranslatorOps openrisc_tr_ops =3D { .init_disas_context =3D openrisc_tr_init_disas_context, .tb_start =3D openrisc_tr_tb_start, .insn_start =3D openrisc_tr_insn_start, - .breakpoint_check =3D openrisc_tr_breakpoint_check, .translate_insn =3D openrisc_tr_translate_insn, .tb_stop =3D openrisc_tr_tb_stop, .disas_log =3D openrisc_tr_disas_log, diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 0a55cb7181..171b216e17 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -8565,23 +8565,6 @@ static void ppc_tr_insn_start(DisasContextBase *dcba= se, CPUState *cs) tcg_gen_insn_start(dcbase->pc_next); } =20 -static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - gen_update_nip(ctx, ctx->base.pc_next); - gen_debug_exception(ctx); - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be properly - * cleared -- thus we increment the PC here so that the logic - * setting tb->size below does the right thing. - */ - ctx->base.pc_next +=3D 4; - return true; -} - static bool is_prefix_insn(DisasContext *ctx, uint32_t insn) { REQUIRE_INSNS_FLAGS2(ctx, ISA310); @@ -8710,7 +8693,6 @@ static const TranslatorOps ppc_tr_ops =3D { .init_disas_context =3D ppc_tr_init_disas_context, .tb_start =3D ppc_tr_tb_start, .insn_start =3D ppc_tr_insn_start, - .breakpoint_check =3D ppc_tr_breakpoint_check, .translate_insn =3D ppc_tr_translate_insn, .tb_stop =3D ppc_tr_tb_stop, .disas_log =3D ppc_tr_disas_log, diff --git a/target/riscv/translate.c b/target/riscv/translate.c index deda0c8a44..6983be5723 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -961,22 +961,6 @@ static void riscv_tr_insn_start(DisasContextBase *dcba= se, CPUState *cpu) tcg_gen_insn_start(ctx->base.pc_next); } =20 -static bool riscv_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *= cpu, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); - ctx->base.is_jmp =3D DISAS_NORETURN; - gen_exception_debug(); - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - ctx->base.pc_next +=3D 4; - return true; -} - static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cp= u) { DisasContext *ctx =3D container_of(dcbase, DisasContext, base); @@ -1029,7 +1013,6 @@ static const TranslatorOps riscv_tr_ops =3D { .init_disas_context =3D riscv_tr_init_disas_context, .tb_start =3D riscv_tr_tb_start, .insn_start =3D riscv_tr_insn_start, - .breakpoint_check =3D riscv_tr_breakpoint_check, .translate_insn =3D riscv_tr_translate_insn, .tb_stop =3D riscv_tr_tb_stop, .disas_log =3D riscv_tr_disas_log, diff --git a/target/rx/translate.c b/target/rx/translate.c index 23a626438a..a3cf720455 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -2309,19 +2309,6 @@ static void rx_tr_insn_start(DisasContextBase *dcbas= e, CPUState *cs) tcg_gen_insn_start(ctx->base.pc_next); } =20 -static bool rx_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - /* We have hit a breakpoint - make sure PC is up-to-date */ - tcg_gen_movi_i32(cpu_pc, ctx->base.pc_next); - gen_helper_debug(cpu_env); - ctx->base.is_jmp =3D DISAS_NORETURN; - ctx->base.pc_next +=3D 1; - return true; -} - static void rx_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx =3D container_of(dcbase, DisasContext, base); @@ -2373,7 +2360,6 @@ static const TranslatorOps rx_tr_ops =3D { .init_disas_context =3D rx_tr_init_disas_context, .tb_start =3D rx_tr_tb_start, .insn_start =3D rx_tr_insn_start, - .breakpoint_check =3D rx_tr_breakpoint_check, .translate_insn =3D rx_tr_translate_insn, .tb_stop =3D rx_tr_tb_stop, .disas_log =3D rx_tr_disas_log, diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 92fa7656c2..0632b0374b 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -6552,29 +6552,6 @@ static void s390x_tr_insn_start(DisasContextBase *dc= base, CPUState *cs) { } =20 -static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *= cs, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - /* - * Emit an insn_start to accompany the breakpoint exception. - * The ILEN value is a dummy, since this does not result in - * an s390x exception, but an internal qemu exception which - * brings us back to interact with the gdbstub. - */ - tcg_gen_insn_start(dc->base.pc_next, dc->cc_op, 2); - - dc->base.is_jmp =3D DISAS_PC_STALE; - dc->do_debug =3D true; - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size does the right thing. */ - dc->base.pc_next +=3D 2; - return true; -} - static void s390x_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { CPUS390XState *env =3D cs->env_ptr; @@ -6642,7 +6619,6 @@ static const TranslatorOps s390x_tr_ops =3D { .init_disas_context =3D s390x_tr_init_disas_context, .tb_start =3D s390x_tr_tb_start, .insn_start =3D s390x_tr_insn_start, - .breakpoint_check =3D s390x_tr_breakpoint_check, .translate_insn =3D s390x_tr_translate_insn, .tb_stop =3D s390x_tr_tb_stop, .disas_log =3D s390x_tr_disas_log, diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 40898e2393..8704fea1ca 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -2289,23 +2289,6 @@ static void sh4_tr_insn_start(DisasContextBase *dcba= se, CPUState *cs) tcg_gen_insn_start(ctx->base.pc_next, ctx->envflags); } =20 -static bool sh4_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - - /* We have hit a breakpoint - make sure PC is up-to-date */ - gen_save_cpu_state(ctx, true); - gen_helper_debug(cpu_env); - ctx->base.is_jmp =3D DISAS_NORETURN; - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - ctx->base.pc_next +=3D 2; - return true; -} - static void sh4_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { CPUSH4State *env =3D cs->env_ptr; @@ -2369,7 +2352,6 @@ static const TranslatorOps sh4_tr_ops =3D { .init_disas_context =3D sh4_tr_init_disas_context, .tb_start =3D sh4_tr_tb_start, .insn_start =3D sh4_tr_insn_start, - .breakpoint_check =3D sh4_tr_breakpoint_check, .translate_insn =3D sh4_tr_translate_insn, .tb_stop =3D sh4_tr_tb_stop, .disas_log =3D sh4_tr_disas_log, diff --git a/target/sparc/translate.c b/target/sparc/translate.c index e530cb4aa8..11de5a4963 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -5854,22 +5854,6 @@ static void sparc_tr_insn_start(DisasContextBase *dc= base, CPUState *cs) } } =20 -static bool sparc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *= cs, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - if (dc->pc !=3D dc->base.pc_first) { - save_state(dc); - } - gen_helper_debug(cpu_env); - tcg_gen_exit_tb(NULL, 0); - dc->base.is_jmp =3D DISAS_NORETURN; - /* update pc_next so that the current instruction is included in tb->s= ize */ - dc->base.pc_next +=3D 4; - return true; -} - static void sparc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); @@ -5932,7 +5916,6 @@ static const TranslatorOps sparc_tr_ops =3D { .init_disas_context =3D sparc_tr_init_disas_context, .tb_start =3D sparc_tr_tb_start, .insn_start =3D sparc_tr_insn_start, - .breakpoint_check =3D sparc_tr_breakpoint_check, .translate_insn =3D sparc_tr_translate_insn, .tb_stop =3D sparc_tr_tb_stop, .disas_log =3D sparc_tr_disas_log, diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 865020754d..a0cc0f1cb3 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -8810,21 +8810,6 @@ static void tricore_tr_insn_start(DisasContextBase *= dcbase, CPUState *cpu) tcg_gen_insn_start(ctx->base.pc_next); } =20 -static bool tricore_tr_breakpoint_check(DisasContextBase *dcbase, CPUState= *cpu, - const CPUBreakpoint *bp) -{ - DisasContext *ctx =3D container_of(dcbase, DisasContext, base); - generate_qemu_excp(ctx, EXCP_DEBUG); - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be - * properly cleared -- thus we increment the PC here so that - * the logic setting tb->size below does the right thing. - */ - ctx->base.pc_next +=3D 4; - return true; -} - static bool insn_crosses_page(CPUTriCoreState *env, DisasContext *ctx) { /* @@ -8898,7 +8883,6 @@ static const TranslatorOps tricore_tr_ops =3D { .init_disas_context =3D tricore_tr_init_disas_context, .tb_start =3D tricore_tr_tb_start, .insn_start =3D tricore_tr_insn_start, - .breakpoint_check =3D tricore_tr_breakpoint_check, .translate_insn =3D tricore_tr_translate_insn, .tb_stop =3D tricore_tr_tb_stop, .disas_log =3D tricore_tr_disas_log, diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 7094cfcf1d..20399d6a04 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -1232,22 +1232,6 @@ static void xtensa_tr_insn_start(DisasContextBase *d= cbase, CPUState *cpu) tcg_gen_insn_start(dcbase->pc_next); } =20 -static bool xtensa_tr_breakpoint_check(DisasContextBase *dcbase, CPUState = *cpu, - const CPUBreakpoint *bp) -{ - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - tcg_gen_movi_i32(cpu_pc, dc->base.pc_next); - gen_exception(dc, EXCP_DEBUG); - dc->base.is_jmp =3D DISAS_NORETURN; - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc->base.pc_next +=3D 2; - return true; -} - static void xtensa_tr_translate_insn(DisasContextBase *dcbase, CPUState *c= pu) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); @@ -1330,7 +1314,6 @@ static const TranslatorOps xtensa_translator_ops =3D { .init_disas_context =3D xtensa_tr_init_disas_context, .tb_start =3D xtensa_tr_tb_start, .insn_start =3D xtensa_tr_insn_start, - .breakpoint_check =3D xtensa_tr_breakpoint_check, .translate_insn =3D xtensa_tr_translate_insn, .tb_stop =3D xtensa_tr_tb_stop, .disas_log =3D xtensa_tr_disas_log, --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730028049274.5788843806771; Mon, 19 Jul 2021 14:27:08 -0700 (PDT) Received: from localhost ([::1]:34494 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5an4-00050L-V9 for importer@patchew.org; Mon, 19 Jul 2021 17:27:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60734) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5ajC-0004kR-89 for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:06 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]:39564) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5ajA-0000yH-Iy for qemu-devel@nongnu.org; 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[204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.23.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:23:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PNGGuAbGOXbZh1djyRYowe+1Bkitpoo3mG0dYZQDf8E=; b=B5W/Szyufhxasv3mMpCsxf2tkU8IT80c0ljF5ByNfGKDEGUimqY3bhaggkyG6wl2pG 86ldck98u6eKw2gUiBVZL/wgsjcLpO5Z34lWRKqs0NSnpVXYaZ39+TOyYY+kwnXAKexr kV1CN8D8xgTEir2PiaCExNWMXD/sshObMetv9tW7KTWLGAiR1t1fwIQGHQ2WXBrU9sZS xLr2bPZHXTASY1e5oN8mjr/GDnulJhmIqDgv6MDO4PxIIz4qY07aO89YEODKRbpxAZYX P399gB+/jKx6Cioc42sfpCw0yLm6z4hIyK4VYByNLZeHQMpatbdvLfQV8WRaA8UD0SXn +FhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PNGGuAbGOXbZh1djyRYowe+1Bkitpoo3mG0dYZQDf8E=; b=Cut4ZyUZlb2Zwd2IMX1KA/ZX5EtWzKEXawsX8tDZfBicj+wfdKQRzQF2mtXRRVbt5y IoEBBUHrzhNFbIDzSTh7Hd8EhNrt7FnBvfZdOurA7gKKtRxkyis7UdjUkzoNoJOp38zh HlXqvqmRHVIqWrB0X3eU9qPhWQaQ3zNopMpMmELuvZJRtqyk780/3OZZdII6ia2A0lkH x5RnGnVXRkdrTcJWV3EvBpNWNr/nq4mzopHZrLYvOXk2eXAW0dADklJhi+qux63RDWFZ gqQYSMasIP3nfdU0aCk7BJcYZ8eW2Pz9NftmhG7q1RsgpmxeTEXXSiRhWDt+vxwqanqk b+7w== X-Gm-Message-State: AOAM533LQFBtFDQJK4SANVlWoa+UG1pPhAIHRq1+u9/U6b2Fn6qXA+Ne /Uzy/+e+utTQl0KtrA+1VW1zXsH5Q/TQvw== X-Google-Smtp-Source: ABdhPJyzcWhrdArtbT10Dcee23xfrp3lX9ikorORoSa9x430IiRmlf1/kx2beQ3TnMJomHK2jRKzow== X-Received: by 2002:a63:ef57:: with SMTP id c23mr27072051pgk.60.1626729783233; Mon, 19 Jul 2021 14:23:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 14/15] accel/tcg: Hoist tb_cflags to a local in translator_loop Date: Mon, 19 Jul 2021 11:22:38 -1000 Message-Id: <20210719212239.428740-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730028585100001 The access internal to tb_cflags() is atomic. Avoid re-reading it as such for the multiple uses. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- accel/tcg/translator.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 4f3728c278..b45337f3ba 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -50,6 +50,7 @@ bool translator_use_goto_tb(DisasContextBase *db, target_= ulong dest) void translator_loop(const TranslatorOps *ops, DisasContextBase *db, CPUState *cpu, TranslationBlock *tb, int max_insns) { + uint32_t cflags =3D tb_cflags(tb); bool plugin_enabled; =20 /* Initialize DisasContext */ @@ -72,8 +73,7 @@ void translator_loop(const TranslatorOps *ops, DisasConte= xtBase *db, ops->tb_start(db, cpu); tcg_debug_assert(db->is_jmp =3D=3D DISAS_NEXT); /* no early exit */ =20 - plugin_enabled =3D plugin_gen_tb_start(cpu, tb, - tb_cflags(db->tb) & CF_MEMI_ONLY); + plugin_enabled =3D plugin_gen_tb_start(cpu, tb, cflags & CF_MEMI_ONLY); =20 while (true) { db->num_insns++; @@ -88,14 +88,13 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, update db->pc_next and db->is_jmp to indicate what should be done next -- either exiting this loop or locate the start of the next instruction. */ - if (db->num_insns =3D=3D db->max_insns - && (tb_cflags(db->tb) & CF_LAST_IO)) { + if (db->num_insns =3D=3D db->max_insns && (cflags & CF_LAST_IO)) { /* Accept I/O on the last instruction. */ gen_io_start(); ops->translate_insn(db, cpu); } else { /* we should only see CF_MEMI_ONLY for io_recompile */ - tcg_debug_assert(!(tb_cflags(db->tb) & CF_MEMI_ONLY)); + tcg_debug_assert(!(cflags & CF_MEMI_ONLY)); ops->translate_insn(db, cpu); } =20 --=20 2.25.1 From nobody Sat May 18 09:48:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626730580008914.9332438736491; Mon, 19 Jul 2021 14:36:20 -0700 (PDT) Received: from localhost ([::1]:60124 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5avz-00064u-2t for importer@patchew.org; Mon, 19 Jul 2021 17:36:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60750) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5ajD-0004pJ-AP for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:07 -0400 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]:46689) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m5ajB-0000yn-LN for qemu-devel@nongnu.org; Mon, 19 Jul 2021 17:23:07 -0400 Received: by mail-pg1-x52b.google.com with SMTP id r21so2343359pgv.13 for ; Mon, 19 Jul 2021 14:23:05 -0700 (PDT) Received: from localhost.localdomain (204-210-126-223.res.spectrum.com. [204.210.126.223]) by smtp.gmail.com with ESMTPSA id e4sm25008434pgi.94.2021.07.19.14.23.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:23:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qTk6nTCS3DCR8zWFD1IY+CDlAPgvIuL5FWh8To7K36Q=; b=C7BiHPvFHaTsv+rK9yWO7HMhf3pmODRQl1fmrKEb2rggjIdXbsGedvdvbjV2AJJsX7 lyPvojEnse6pjPupj4/IZqcQrARILmXRBsCaCBsop5htlOKpJtSSWe683ZlUc7uACehz a5fx4iq7lHU9K2SmkR+98Hmt28mCmZmPDw1tvht3ZcMO5x7cnN9tCoqaX3bOo7HH5rl4 b7g/0+QfIY49FJxDKWxncCAqKilPQFGOGnT91+4i+W/62J54NcqQX9bH7pG0K91pOsBg 2/v6mx+RE/Uo6KYMpQZUyH8WIH7p6y1XRQfDdMwUo8qrUGC7ubFYq3fEnG7Fa05x6HQB KN9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qTk6nTCS3DCR8zWFD1IY+CDlAPgvIuL5FWh8To7K36Q=; b=FmiMj9u06JCEaDKsZwYN20z9WSFSAHBCgmXG5LrQHmzfRBFx/mmRMY/wmIFSV5fiQG 0awMgsNCFkeQG4m42VAzY8rn1vWTov+pfZbcxmaLDHtLNj3Ys5beBFBl4mMwn2taU83b 5Rs81zdnd6MbRFpDGNTK5fynD36OGYQeKKAf2RxqeVmKhxZ0hsdqcsbyr1pkCy1qG/Wb iKpukD42ZuduF2J6oHdcvnUKX1alJ/T4aAE8h8B6kyvBwodDwz+uhMWny3LLCw9HDCJO hGXEjxF8N2jqxZBRTUILQyiKtbHgRfoHX7HF3wR4wUx993VD99mJCozvAa503Il1rXXc 2QBQ== X-Gm-Message-State: AOAM531NHvrh01YNlyzblOizEcC5rrQP19XQoy7yJww+wUDXNVSr2mSQ VsCskHY61MnAVXHBDKANaXF3+QV8BGGs5w== X-Google-Smtp-Source: ABdhPJxMqBhPrAvUjqlwsoRqaqmLkCyWXWnlNYFYy3hI2NGB9S3HsSFHBWZvauv5tREcyE3Q9sQP0g== X-Received: by 2002:a63:65c5:: with SMTP id z188mr27523443pgb.174.1626729784491; Mon, 19 Jul 2021 14:23:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-6.1 v4 15/15] accel/tcg: Record singlestep_enabled in tb->cflags Date: Mon, 19 Jul 2021 11:22:39 -1000 Message-Id: <20210719212239.428740-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210719212239.428740-1-richard.henderson@linaro.org> References: <20210719212239.428740-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626730581010100001 Content-Type: text/plain; charset="utf-8" Set CF_SINGLE_STEP when single-stepping is enabled. This avoids the need to flush all tb's when turning single-stepping on or off. Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 1 + accel/tcg/cpu-exec.c | 12 ++++++++++++ accel/tcg/translator.c | 7 +------ cpu.c | 4 ---- 4 files changed, 14 insertions(+), 10 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 6873cce8df..5d1b6d80fb 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -497,6 +497,7 @@ struct TranslationBlock { #define CF_COUNT_MASK 0x000001ff #define CF_NO_GOTO_TB 0x00000200 /* Do not chain with goto_tb */ #define CF_NO_GOTO_PTR 0x00000400 /* Do not chain with goto_ptr */ +#define CF_SINGLE_STEP 0x00000800 /* gdbstub single-step in effect */ #define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */ #define CF_MEMI_ONLY 0x00010000 /* Only instrument memory ops */ #define CF_USE_ICOUNT 0x00020000 diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 6710e15d8b..30a3be9ea7 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -272,6 +272,14 @@ static uint32_t cflags_for_breakpoints(CPUState *cpu, = target_ulong pc, } } =20 + if (unlikely(cpu->singlestep_enabled)) { + /* + * Record gdb single-step. We should be exiting the TB by raising + * EXCP_DEBUG, but to simplify other tests, disable chaining too. + */ + bflags =3D CF_NO_GOTO_TB | CF_NO_GOTO_PTR | CF_SINGLE_STEP | 1; + } + if (unlikely(bflags)) { cflags =3D (cflags & ~CF_COUNT_MASK) | bflags; } @@ -409,7 +417,11 @@ void cpu_exec_step_atomic(CPUState *cpu) * We only arrive in cpu_exec_step_atomic after beginning execution * of an insn that includes an atomic operation we can't handle. * Any breakpoint for this insn will have been recognized earlier. + * But do record single-stepping. */ + if (unlikely(cpu->singlestep_enabled)) { + cflags |=3D CF_SINGLE_STEP; + } =20 tb =3D tb_lookup(cpu, pc, cs_base, flags, cflags); if (tb =3D=3D NULL) { diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index b45337f3ba..c53a7f8e44 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -38,11 +38,6 @@ bool translator_use_goto_tb(DisasContextBase *db, target= _ulong dest) return false; } =20 - /* Suppress goto_tb in the case of single-steping. */ - if (db->singlestep_enabled) { - return false; - } - /* Check for the dest on the same page as the start of the TB. */ return ((db->pc_first ^ dest) & TARGET_PAGE_MASK) =3D=3D 0; } @@ -60,7 +55,7 @@ void translator_loop(const TranslatorOps *ops, DisasConte= xtBase *db, db->is_jmp =3D DISAS_NEXT; db->num_insns =3D 0; db->max_insns =3D max_insns; - db->singlestep_enabled =3D cpu->singlestep_enabled; + db->singlestep_enabled =3D cflags & CF_SINGLE_STEP; =20 ops->init_disas_context(db, cpu); tcg_debug_assert(db->is_jmp =3D=3D DISAS_NEXT); /* no early exit */ diff --git a/cpu.c b/cpu.c index 660b56f431..addcb5db9c 100644 --- a/cpu.c +++ b/cpu.c @@ -316,10 +316,6 @@ void cpu_single_step(CPUState *cpu, int enabled) cpu->singlestep_enabled =3D enabled; if (kvm_enabled()) { kvm_update_guest_debug(cpu, 0); - } else { - /* must flush all the translated code to avoid inconsistencies= */ - /* XXX: only flush what is necessary */ - tb_flush(cpu); } trace_breakpoint_singlestep(cpu->cpu_index, enabled); } --=20 2.25.1