From nobody Mon Feb 9 14:34:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626694947668556.9211114789877; Mon, 19 Jul 2021 04:42:27 -0700 (PDT) Received: from localhost ([::1]:41780 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m5RfG-0004M7-BB for importer@patchew.org; Mon, 19 Jul 2021 07:42:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54992) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5RQg-00045n-2l for qemu-devel@nongnu.org; Mon, 19 Jul 2021 07:27:22 -0400 Received: from mga09.intel.com ([134.134.136.24]:16161) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m5RQe-0005pV-AY for qemu-devel@nongnu.org; Mon, 19 Jul 2021 07:27:21 -0400 Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Jul 2021 04:27:19 -0700 Received: from icx-2s.bj.intel.com ([10.240.192.119]) by fmsmga006.fm.intel.com with ESMTP; 19 Jul 2021 04:27:17 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10049"; a="211035205" X-IronPort-AV: E=Sophos;i="5.84,252,1620716400"; d="scan'208";a="211035205" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,252,1620716400"; d="scan'208";a="656813578" From: Yang Zhong To: qemu-devel@nongnu.org Subject: [PATCH v4 08/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX Date: Mon, 19 Jul 2021 19:21:11 +0800 Message-Id: <20210719112136.57018-9-yang.zhong@intel.com> X-Mailer: git-send-email 2.29.2.334.gfaefdd61ec In-Reply-To: <20210719112136.57018-1-yang.zhong@intel.com> References: <20210719112136.57018-1-yang.zhong@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.24; envelope-from=yang.zhong@intel.com; helo=mga09.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, seanjc@google.com, kai.huang@intel.com, jarkko@kernel.org, pbonzini@redhat.com, eblake@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1626694948753100001 Content-Type: text/plain; charset="utf-8" From: Sean Christopherson CPUID leaf 12_0_EBX is an Intel-defined feature bits leaf enumerating the platform's SGX extended capabilities. Currently there is a single capabilitiy: - EXINFO: record information about #PFs and #GPs in the enclave's SSA Signed-off-by: Sean Christopherson Signed-off-by: Yang Zhong --- target/i386/cpu.c | 21 +++++++++++++++++++++ target/i386/cpu.h | 1 + 2 files changed, 22 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 13289e0547..0525a4cf7f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -654,6 +654,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendo= r1, CPUID_XSAVE_XSAVEC, CPUID_XSAVE_XSAVES */ #define TCG_14_0_ECX_FEATURES 0 #define TCG_SGX_12_0_EAX_FEATURES 0 +#define TCG_SGX_12_0_EBX_FEATURES 0 =20 FeatureWordInfo feature_word_info[FEATURE_WORDS] =3D { [FEAT_1_EDX] =3D { @@ -1201,6 +1202,26 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] =3D= { }, .tcg_features =3D TCG_SGX_12_0_EAX_FEATURES, }, + + [FEAT_SGX_12_0_EBX] =3D { + .type =3D CPUID_FEATURE_WORD, + .feat_names =3D { + "sgx-exinfo" , NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + }, + .cpuid =3D { + .eax =3D 0x12, + .needs_ecx =3D true, .ecx =3D 0, + .reg =3D R_EBX, + }, + .tcg_features =3D TCG_SGX_12_0_EBX_FEATURES, + }, }; =20 typedef struct FeatureMask { diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 21830b2d79..a71d1c8fd0 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -562,6 +562,7 @@ typedef enum FeatureWord { FEAT_VMX_VMFUNC, FEAT_14_0_ECX, FEAT_SGX_12_0_EAX, /* CPUID[EAX=3D0x12,ECX=3D0].EAX (SGX) */ + FEAT_SGX_12_0_EBX, /* CPUID[EAX=3D0x12,ECX=3D0].EBX (SGX MISCSELECT[3= 1:0]) */ FEATURE_WORDS, } FeatureWord; =20