From nobody Tue Feb 10 04:03:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1626193547755764.2218415580573; Tue, 13 Jul 2021 09:25:47 -0700 (PDT) Received: from localhost ([::1]:34650 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m3LEA-0000yf-Hb for importer@patchew.org; Tue, 13 Jul 2021 12:25:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36736) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m3L81-0003oW-Bj for qemu-devel@nongnu.org; Tue, 13 Jul 2021 12:19:27 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:57482) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m3L7z-0006xy-3C for qemu-devel@nongnu.org; Tue, 13 Jul 2021 12:19:25 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-226-10elKf_6NZGC6fU9eTPHvg-1; Tue, 13 Jul 2021 12:19:19 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 96C918015C6; Tue, 13 Jul 2021 16:19:18 +0000 (UTC) Received: from localhost (ovpn-113-28.rdu2.redhat.com [10.10.113.28]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8D94A5C1C5; Tue, 13 Jul 2021 16:19:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1626193161; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SdNhsy7o3104wP05E4ywfqm1n4wVUzK4agiNhE9tp/8=; b=Ba32A79rzSOFGpwO5Y06wKCcAb40skehRL7vxeFxfk2iMObrR4LMcxAWat1EPyD9mVBY3/ mJ+7VYi18ORieQcDVQBQrU8mM4ziwd+ex+CkBBufqmToEWRbGTmg+UX5ljLEFEioAIz5ee LtUvpUS9BKO4GZ7ZBIgrzPb55NPjg0E= X-MC-Unique: 10elKf_6NZGC6fU9eTPHvg-1 From: Eduardo Habkost To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 08/11] target/i386: suppress CPUID leaves not defined by the CPU vendor Date: Tue, 13 Jul 2021 12:09:54 -0400 Message-Id: <20210713160957.3269017-9-ehabkost@redhat.com> In-Reply-To: <20210713160957.3269017-1-ehabkost@redhat.com> References: <20210713160957.3269017-1-ehabkost@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=ehabkost@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.7, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , kvm@vger.kernel.org, "Michael S. Tsirkin" , Michael Roth , Marcelo Tosatti , Richard Henderson , "Dr. David Alan Gilbert" , zhenwei pi , Igor Mammedov , Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1626193548420100001 Content-Type: text/plain; charset="utf-8" From: Michael Roth Currently all built-in CPUs report cache information via CPUID leaves 2 and 4, but these have never been defined for AMD. In the case of SEV-SNP this can cause issues with CPUID enforcement. Address this by allowing CPU types to suppress these via a new "x-vendor-cpuid-only" CPU property, which is true by default, but switched off for older machine types to maintain compatibility. Cc: "Dr. David Alan Gilbert" Cc: Eduardo Habkost Cc: Richard Henderson Cc: Igor Mammedov Cc: zhenwei pi Suggested-by: Eduardo Habkost Signed-off-by: Michael Roth Message-Id: <20210708003623.18665-1-michael.roth@amd.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.h | 3 +++ hw/i386/pc.c | 1 + target/i386/cpu.c | 6 ++++++ 3 files changed, 10 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 8f3747dd285..950a991a71c 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1748,6 +1748,9 @@ struct X86CPU { /* Enable auto level-increase for all CPUID leaves */ bool full_cpuid_auto_level; =20 + /* Only advertise CPUID leaves defined by the vendor */ + bool vendor_cpuid_only; + /* Enable auto level-increase for Intel Processor Trace leave */ bool intel_pt_auto_level; =20 diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8e1220db728..aa79c5e0e6f 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -98,6 +98,7 @@ GlobalProperty pc_compat_6_0[] =3D { { "qemu64" "-" TYPE_X86_CPU, "family", "6" }, { "qemu64" "-" TYPE_X86_CPU, "model", "6" }, { "qemu64" "-" TYPE_X86_CPU, "stepping", "3" }, + { TYPE_X86_CPU, "x-vendor-cpuid-only", "off" }, }; const size_t pc_compat_6_0_len =3D G_N_ELEMENTS(pc_compat_6_0); =20 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 46befde3876..6b7043e4253 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5155,6 +5155,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, if (cpu->cache_info_passthrough) { host_cpuid(index, 0, eax, ebx, ecx, edx); break; + } else if (cpu->vendor_cpuid_only && IS_AMD_CPU(env)) { + *eax =3D *ebx =3D *ecx =3D *edx =3D 0; + break; } *eax =3D 1; /* Number of CPUID[EAX=3D2] calls required */ *ebx =3D 0; @@ -5176,6 +5179,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, if ((*eax & 31) && cs->nr_cores > 1) { *eax |=3D (cs->nr_cores - 1) << 26; } + } else if (cpu->vendor_cpuid_only && IS_AMD_CPU(env)) { + *eax =3D *ebx =3D *ecx =3D *edx =3D 0; } else { *eax =3D 0; switch (count) { @@ -6651,6 +6656,7 @@ static Property x86_cpu_properties[] =3D { DEFINE_PROP_BOOL("full-cpuid-auto-level", X86CPU, full_cpuid_auto_leve= l, true), DEFINE_PROP_STRING("hv-vendor-id", X86CPU, hyperv_vendor), DEFINE_PROP_BOOL("cpuid-0xb", X86CPU, enable_cpuid_0xb, true), + DEFINE_PROP_BOOL("x-vendor-cpuid-only", X86CPU, vendor_cpuid_only, tru= e), DEFINE_PROP_BOOL("lmce", X86CPU, enable_lmce, false), DEFINE_PROP_BOOL("l3-cache", X86CPU, enable_l3_cache, true), DEFINE_PROP_BOOL("kvm-no-smi-migration", X86CPU, kvm_no_smi_migration, --=20 2.31.1