From nobody Mon Feb 9 19:53:34 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1625830589839151.1368731125134; Fri, 9 Jul 2021 04:36:29 -0700 (PDT) Received: from localhost ([::1]:34086 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m1oo0-0005ah-PR for importer@patchew.org; Fri, 09 Jul 2021 07:36:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38576) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m1oTs-0008SE-Mh for qemu-devel@nongnu.org; Fri, 09 Jul 2021 07:15:40 -0400 Received: from mga06.intel.com ([134.134.136.31]:37176) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m1oTq-0005Av-V7 for qemu-devel@nongnu.org; Fri, 09 Jul 2021 07:15:40 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jul 2021 04:14:57 -0700 Received: from icx-2s.bj.intel.com ([10.240.192.119]) by orsmga002.jf.intel.com with ESMTP; 09 Jul 2021 04:14:55 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10039"; a="270800828" X-IronPort-AV: E=Sophos;i="5.84,226,1620716400"; d="scan'208";a="270800828" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,226,1620716400"; d="scan'208";a="428730271" From: Yang Zhong To: qemu-devel@nongnu.org Subject: [PATCH v3 22/33] hostmem-epc: Add the reset interface for EPC backend reset Date: Fri, 9 Jul 2021 19:09:44 +0800 Message-Id: <20210709110955.73256-23-yang.zhong@intel.com> X-Mailer: git-send-email 2.29.2.334.gfaefdd61ec In-Reply-To: <20210709110955.73256-1-yang.zhong@intel.com> References: <20210709110955.73256-1-yang.zhong@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.31; envelope-from=yang.zhong@intel.com; helo=mga06.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, seanjc@google.com, kai.huang@intel.com, jarkko@kernel.org, pbonzini@redhat.com, eblake@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZM-MESSAGEID: 1625830592134100001 Content-Type: text/plain; charset="utf-8" Add the sgx_memory_backend_reset() interface to handle EPC backend reset when VM is reset. This reset function will destroy previous backend memory region and re-mmap the EPC section for guest. Signed-off-by: Yang Zhong --- backends/hostmem-epc.c | 16 ++++++++++++++++ include/hw/i386/pc.h | 2 ++ 2 files changed, 18 insertions(+) diff --git a/backends/hostmem-epc.c b/backends/hostmem-epc.c index b512a68cb0..3bd1535d82 100644 --- a/backends/hostmem-epc.c +++ b/backends/hostmem-epc.c @@ -16,6 +16,7 @@ #include "qom/object_interfaces.h" #include "qapi/error.h" #include "sysemu/hostmem.h" +#include "hw/i386/pc.h" =20 #define TYPE_MEMORY_BACKEND_EPC "memory-backend-epc" =20 @@ -55,6 +56,21 @@ sgx_epc_backend_memory_alloc(HostMemoryBackend *backend,= Error **errp) g_free(name); } =20 +void sgx_memory_backend_reset(HostMemoryBackend *backend, int fd, + Error **errp) +{ + MemoryRegion *mr =3D &backend->mr; + + mr->enabled =3D false; + + /* destroy the old memory region if it exist */ + if (fd > 0 && mr->destructor) { + mr->destructor(mr); + } + + sgx_epc_backend_memory_alloc(backend, errp); +} + static void sgx_epc_backend_instance_init(Object *obj) { HostMemoryBackend *m =3D MEMORY_BACKEND(obj); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index c22f5eded6..f603e2f75a 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -202,6 +202,8 @@ extern const size_t pc_compat_6_0_len; =20 /* sgx-epc.c */ void pc_machine_init_sgx_epc(PCMachineState *pcms); +void sgx_memory_backend_reset(HostMemoryBackend *backend, int fd, + Error **errp); =20 extern GlobalProperty pc_compat_5_2[]; extern const size_t pc_compat_5_2_len; --=20 2.29.2.334.gfaefdd61ec