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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1625768915298100001 Content-Type: text/plain; charset="utf-8" A paste-o meant that we wrote back the existing value of the RX flag rather than changing it to TMP. Use tcg_constant_i64 while we're at it. Signed-off-by: Richard Henderson --- target/alpha/translate.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index f2922f5f8c..d8bd47de75 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -1116,15 +1116,11 @@ static void gen_msk_l(DisasContext *ctx, TCGv vc, T= CGv va, int rb, bool islit, =20 static void gen_rx(DisasContext *ctx, int ra, int set) { - TCGv tmp; - if (ra !=3D 31) { ld_flag_byte(ctx->ir[ra], ENV_FLAG_RX_SHIFT); } =20 - tmp =3D tcg_const_i64(set); - st_flag_byte(ctx->ir[ra], ENV_FLAG_RX_SHIFT); - tcg_temp_free(tmp); + st_flag_byte(tcg_constant_i64(set), ENV_FLAG_RX_SHIFT); } =20 static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode) --=20 2.25.1 From nobody Mon Feb 9 17:19:31 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 08 Jul 2021 11:25:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 2/4] target/alpha: Use dest_sink for HW_RET temporary Date: Thu, 8 Jul 2021 11:25:17 -0700 Message-Id: <20210708182519.750626-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210708182519.750626-1-richard.henderson@linaro.org> References: <20210708182519.750626-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1625770413309100001 Content-Type: text/plain; charset="utf-8" This temp is automatically freed, just like ctx->lit. But we're about to remove ctx->lit, so use sink instead. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/alpha/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index d8bd47de75..5ea091eef5 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -2749,7 +2749,7 @@ static DisasJumpType translate_one(DisasContext *ctx,= uint32_t insn) /* Pre-EV6 CPUs interpreted this as HW_REI, loading the return address from EXC_ADDR. This turns out to be useful for our emulation PALcode, so continue to accept it. */ - ctx->lit =3D vb =3D tcg_temp_new(); + vb =3D dest_sink(ctx); tcg_gen_ld_i64(vb, cpu_env, offsetof(CPUAlphaState, exc_addr)); } else { vb =3D load_gpr(ctx, rb); --=20 2.25.1 From nobody Mon Feb 9 17:19:31 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1625769134; cv=none; d=zohomail.com; s=zohoarc; b=mdoClTVgG2UOHECSLPRyfekaqpvwG32YGi6/hbL6QgTUxM8OOKr7Ia9lMyzdlT4aH0lWKoRTkjFsqDNxXhRuQO+ndRVBRQXG/SoQFwk+xTEQ+Hj0b7HnYlgIiV1/OTIhBtmoTVqBaIfNWD7viXXOJ+/7vaH6ufjEelnpX3di6t4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1625769134; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1625769135578100001 Content-Type: text/plain; charset="utf-8" These constant temps do not need to be freed, and therefore need less bookkeeping from tcg producers. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/alpha/translate.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 5ea091eef5..3fd66fb78d 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -67,8 +67,6 @@ struct DisasContext { /* Temporaries for $31 and $f31 as source and destination. */ TCGv zero; TCGv sink; - /* Temporary for immediate constants. */ - TCGv lit; }; =20 /* Target-specific return values from translate_one, indicating the @@ -158,7 +156,7 @@ void alpha_translate_init(void) static TCGv load_zero(DisasContext *ctx) { if (!ctx->zero) { - ctx->zero =3D tcg_const_i64(0); + ctx->zero =3D tcg_constant_i64(0); } return ctx->zero; } @@ -178,14 +176,6 @@ static void free_context_temps(DisasContext *ctx) tcg_temp_free(ctx->sink); ctx->sink =3D NULL; } - if (ctx->zero) { - tcg_temp_free(ctx->zero); - ctx->zero =3D NULL; - } - if (ctx->lit) { - tcg_temp_free(ctx->lit); - ctx->lit =3D NULL; - } } =20 static TCGv load_gpr(DisasContext *ctx, unsigned reg) @@ -201,8 +191,7 @@ static TCGv load_gpr_lit(DisasContext *ctx, unsigned re= g, uint8_t lit, bool islit) { if (islit) { - ctx->lit =3D tcg_const_i64(lit); - return ctx->lit; + return tcg_constant_i64(lit); } else if (likely(reg < 31)) { return ctx->ir[reg]; } else { @@ -3024,7 +3013,6 @@ static void alpha_tr_init_disas_context(DisasContextB= ase *dcbase, CPUState *cpu) =20 ctx->zero =3D NULL; ctx->sink =3D NULL; - ctx->lit =3D NULL; =20 /* Bound the number of insns to execute to those left on the page. */ if (in_superpage(ctx, ctx->base.pc_first)) { --=20 2.25.1 From nobody Mon Feb 9 17:19:31 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; 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Thu, 08 Jul 2021 11:25:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 4/4] target/alpha: Use tcg_constant_* elsewhere Date: Thu, 8 Jul 2021 11:25:19 -0700 Message-Id: <20210708182519.750626-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210708182519.750626-1-richard.henderson@linaro.org> References: <20210708182519.750626-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1625768926708100001 Content-Type: text/plain; charset="utf-8" Replace the remaining uses of tcg_const_*. These uses are all local, with the allocate and free close together. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/alpha/translate.c | 46 ++++++++++++---------------------------- 1 file changed, 14 insertions(+), 32 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 3fd66fb78d..cf5ad46853 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -251,11 +251,9 @@ static void gen_excp_1(int exception, int error_code) { TCGv_i32 tmp1, tmp2; =20 - tmp1 =3D tcg_const_i32(exception); - tmp2 =3D tcg_const_i32(error_code); + tmp1 =3D tcg_constant_i32(exception); + tmp2 =3D tcg_constant_i32(error_code); gen_helper_excp(cpu_env, tmp1, tmp2); - tcg_temp_free_i32(tmp2); - tcg_temp_free_i32(tmp1); } =20 static DisasJumpType gen_excp(DisasContext *ctx, int exception, int error_= code) @@ -506,15 +504,11 @@ static DisasJumpType gen_bcond_internal(DisasContext = *ctx, TCGCond cond, =20 return DISAS_NORETURN; } else { - TCGv_i64 z =3D tcg_const_i64(0); - TCGv_i64 d =3D tcg_const_i64(dest); - TCGv_i64 p =3D tcg_const_i64(ctx->base.pc_next); + TCGv_i64 z =3D load_zero(ctx); + TCGv_i64 d =3D tcg_constant_i64(dest); + TCGv_i64 p =3D tcg_constant_i64(ctx->base.pc_next); =20 tcg_gen_movcond_i64(cond, cpu_pc, cmp, z, d, p); - - tcg_temp_free_i64(z); - tcg_temp_free_i64(d); - tcg_temp_free_i64(p); return DISAS_PC_UPDATED; } } @@ -716,22 +710,19 @@ static void gen_fp_exc_raise(int rc, int fn11) if (!(fn11 & QUAL_I)) { ignore |=3D FPCR_INE; } - ign =3D tcg_const_i32(ignore); + ign =3D tcg_constant_i32(ignore); =20 /* ??? Pass in the regno of the destination so that the helper can set EXC_MASK, which contains a bitmask of destination registers that have caused arithmetic traps. A simple userspace emulation does not require this. We do need it for a guest kernel's entArith, or if we were to do something clever with imprecise exceptions. */ - reg =3D tcg_const_i32(rc + 32); + reg =3D tcg_constant_i32(rc + 32); if (fn11 & QUAL_S) { gen_helper_fp_exc_raise_s(cpu_env, ign, reg); } else { gen_helper_fp_exc_raise(cpu_env, ign, reg); } - - tcg_temp_free_i32(reg); - tcg_temp_free_i32(ign); } =20 static void gen_cvtlq(TCGv vc, TCGv vb) @@ -824,7 +815,7 @@ IEEE_INTCVT(cvtqt) =20 static void gen_cpy_mask(TCGv vc, TCGv va, TCGv vb, bool inv_a, uint64_t m= ask) { - TCGv vmask =3D tcg_const_i64(mask); + TCGv vmask =3D tcg_constant_i64(mask); TCGv tmp =3D tcg_temp_new_i64(); =20 if (inv_a) { @@ -836,7 +827,6 @@ static void gen_cpy_mask(TCGv vc, TCGv va, TCGv vb, boo= l inv_a, uint64_t mask) tcg_gen_andc_i64(vc, vb, vmask); tcg_gen_or_i64(vc, vc, tmp); =20 - tcg_temp_free(vmask); tcg_temp_free(tmp); } =20 @@ -1210,12 +1200,9 @@ static DisasJumpType gen_call_pal(DisasContext *ctx,= int palcode) =20 case 0x3E: /* WTINT */ - { - TCGv_i32 tmp =3D tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + - offsetof(CPUState, halted)); - tcg_temp_free_i32(tmp); - } + tcg_gen_st_i32(tcg_constant_i32(1), cpu_env, + -offsetof(AlphaCPU, env) + + offsetof(CPUState, halted)); tcg_gen_movi_i64(ctx->ir[IR_V0], 0); return gen_excp(ctx, EXCP_HALTED, 0); =20 @@ -1366,12 +1353,8 @@ static DisasJumpType gen_mtpr(DisasContext *ctx, TCG= v vb, int regno) =20 case 253: /* WAIT */ - { - TCGv_i32 tmp =3D tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + - offsetof(CPUState, halted)); - tcg_temp_free_i32(tmp); - } + tcg_gen_st_i32(tcg_constant_i32(1), cpu_env, + -offsetof(AlphaCPU, env) + offsetof(CPUState, halte= d)); return gen_excp(ctx, EXCP_HALTED, 0); =20 case 252: @@ -2744,9 +2727,8 @@ static DisasJumpType translate_one(DisasContext *ctx,= uint32_t insn) vb =3D load_gpr(ctx, rb); } tcg_gen_movi_i64(cpu_lock_addr, -1); + st_flag_byte(load_zero(ctx), ENV_FLAG_RX_SHIFT); tmp =3D tcg_temp_new(); - tcg_gen_movi_i64(tmp, 0); - st_flag_byte(tmp, ENV_FLAG_RX_SHIFT); tcg_gen_andi_i64(tmp, vb, 1); st_flag_byte(tmp, ENV_FLAG_PAL_SHIFT); tcg_temp_free(tmp); --=20 2.25.1