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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=ma.mandourr@gmail.com; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahmoud Mandour , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) Content-Type: text/plain; charset="utf-8" Added a cache modelling plugin that uses a static configuration used in many of the commercial microprocessors and uses random eviction policy. The purpose of the plugin is to identify the most cache-thrashing instructions for both instruction cache and data cache. Signed-off-by: Mahmoud Mandour --- contrib/plugins/Makefile | 1 + contrib/plugins/cache.c | 419 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 420 insertions(+) create mode 100644 contrib/plugins/cache.c diff --git a/contrib/plugins/Makefile b/contrib/plugins/Makefile index b9d7935e5e..2237b47f8b 100644 --- a/contrib/plugins/Makefile +++ b/contrib/plugins/Makefile @@ -18,6 +18,7 @@ NAMES +=3D hotpages NAMES +=3D howvec NAMES +=3D lockstep NAMES +=3D hwprofile +NAMES +=3D cache =20 SONAMES :=3D $(addsuffix .so,$(addprefix lib,$(NAMES))) =20 diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c new file mode 100644 index 0000000000..e9955cdc3a --- /dev/null +++ b/contrib/plugins/cache.c @@ -0,0 +1,419 @@ +/* + * Copyright (C) 2021, Mahmoud Mandour + * + * License: GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include +#include +#include + +#include + +QEMU_PLUGIN_EXPORT int qemu_plugin_version =3D QEMU_PLUGIN_VERSION; + +static enum qemu_plugin_mem_rw rw =3D QEMU_PLUGIN_MEM_RW; + +static GHashTable *miss_ht; + +static GMutex mtx; +static GRand *rng; + +static int limit; +static bool sys; + +static uint64_t dmem_accesses; +static uint64_t dmisses; + +static uint64_t imem_accesses; +static uint64_t imisses; + +/* + * A CacheSet is a set of cache blocks. A memory block that maps to a set = can be + * put in any of the blocks inside the set. The number of block per set is + * called the associativity (assoc). + * + * Each block contains the the stored tag and a valid bit. Since this is n= ot + * a functional simulator, the data itself is not stored. We only identify + * whether a block is in the cache or not by searching for its tag. + * + * In order to search for memory data in the cache, the set identifier and= tag + * are extracted from the address and the set is probed to see whether a t= ag + * match occur. + * + * An address is logically divided into three portions: The block offset, + * the set number, and the tag. + * + * The set number is used to identify the set in which the block may exist. + * The tag is compared against all the tags of a set to search for a match= . If a + * match is found, then the access is a hit. + */ + +typedef struct { + uint64_t tag; + bool valid; +} CacheBlock; + +typedef struct { + CacheBlock *blocks; +} CacheSet; + +typedef struct { + CacheSet *sets; + int num_sets; + int cachesize; + int assoc; + int blksize_shift; + uint64_t set_mask; + uint64_t tag_mask; +} Cache; + +typedef struct { + char *disas_str; + const char *symbol; + uint64_t addr; + uint64_t dmisses; + uint64_t imisses; +} InsnData; + +Cache *dcache, *icache; + +static int pow_of_two(int num) +{ + g_assert((num & (num - 1)) =3D=3D 0); + int ret =3D 0; + while (num /=3D 2) { + ret++; + } + return ret; +} + +static inline uint64_t extract_tag(Cache *cache, uint64_t addr) +{ + return addr & cache->tag_mask; +} + +static inline uint64_t extract_set(Cache *cache, uint64_t addr) +{ + return (addr & cache->set_mask) >> cache->blksize_shift; +} + +static Cache *cache_init(int blksize, int assoc, int cachesize) +{ + Cache *cache; + int i; + uint64_t blk_mask; + + cache =3D g_new(Cache, 1); + cache->assoc =3D assoc; + cache->cachesize =3D cachesize; + cache->num_sets =3D cachesize / (blksize * assoc); + cache->sets =3D g_new(CacheSet, cache->num_sets); + cache->blksize_shift =3D pow_of_two(blksize); + + for (i =3D 0; i < cache->num_sets; i++) { + cache->sets[i].blocks =3D g_new0(CacheBlock, assoc); + } + + blk_mask =3D blksize - 1; + cache->set_mask =3D ((cache->num_sets - 1) << cache->blksize_shift); + cache->tag_mask =3D ~(cache->set_mask | blk_mask); + return cache; +} + +static int get_invalid_block(Cache *cache, uint64_t set) +{ + int i; + + for (i =3D 0; i < cache->assoc; i++) { + if (!cache->sets[set].blocks[i].valid) { + return i; + } + } + + return -1; +} + +static int get_replaced_block(Cache *cache) +{ + return g_rand_int_range(rng, 0, cache->assoc); +} + +static bool in_cache(Cache *cache, uint64_t addr) +{ + int i; + uint64_t tag, set; + + tag =3D extract_tag(cache, addr); + set =3D extract_set(cache, addr); + + for (i =3D 0; i < cache->assoc; i++) { + if (cache->sets[set].blocks[i].tag =3D=3D tag && + cache->sets[set].blocks[i].valid) { + return true; + } + } + + return false; +} + +/** + * access_cache(): Simulate a cache access + * @cache: The cache under simulation + * @addr: The address of the requested memory location + * + * Returns true if the requsted data is hit in the cache and false when mi= ssed. + * The cache is updated on miss for the next access. + */ +static bool access_cache(Cache *cache, uint64_t addr) +{ + uint64_t tag, set; + int replaced_blk; + + if (in_cache(cache, addr)) { + return true; + } + + tag =3D extract_tag(cache, addr); + set =3D extract_set(cache, addr); + + replaced_blk =3D get_invalid_block(cache, set); + + if (replaced_blk =3D=3D -1) { + replaced_blk =3D get_replaced_block(cache); + } + + cache->sets[set].blocks[replaced_blk].tag =3D tag; + cache->sets[set].blocks[replaced_blk].valid =3D true; + + return false; +} + +static void vcpu_mem_access(unsigned int vcpu_index, qemu_plugin_meminfo_t= info, + uint64_t vaddr, void *userdata) +{ + uint64_t effective_addr; + struct qemu_plugin_hwaddr *hwaddr; + InsnData *insn; + + g_mutex_lock(&mtx); + hwaddr =3D qemu_plugin_get_hwaddr(info, vaddr); + if (hwaddr && qemu_plugin_hwaddr_is_io(hwaddr)) { + g_mutex_unlock(&mtx); + return; + } + + effective_addr =3D hwaddr ? qemu_plugin_hwaddr_phys_addr(hwaddr) : vad= dr; + + if (!access_cache(dcache, effective_addr)) { + insn =3D (InsnData *) userdata; + insn->dmisses++; + dmisses++; + } + dmem_accesses++; + g_mutex_unlock(&mtx); +} + +static void vcpu_insn_exec(unsigned int vcpu_index, void *userdata) +{ + uint64_t insn_addr; + InsnData *insn; + + g_mutex_lock(&mtx); + insn_addr =3D ((InsnData *) userdata)->addr; + + if (!access_cache(icache, insn_addr)) { + insn =3D (InsnData *) userdata; + insn->imisses++; + imisses++; + } + imem_accesses++; + g_mutex_unlock(&mtx); +} + +static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) +{ + size_t n_insns; + size_t i; + InsnData *data; + + n_insns =3D qemu_plugin_tb_n_insns(tb); + for (i =3D 0; i < n_insns; i++) { + struct qemu_plugin_insn *insn =3D qemu_plugin_tb_get_insn(tb, i); + uint64_t effective_addr; + + if (sys) { + effective_addr =3D (uint64_t) qemu_plugin_insn_haddr(insn); + } else { + effective_addr =3D (uint64_t) qemu_plugin_insn_vaddr(insn); + } + + /* + * Instructions might get translated multiple times, we do not cre= ate + * new entries for those instructions. Instead, we fetch the same + * entry from the hash table and register it for the callback agai= n. + */ + g_mutex_lock(&mtx); + data =3D g_hash_table_lookup(miss_ht, GUINT_TO_POINTER(effective_a= ddr)); + if (data =3D=3D NULL) { + data =3D g_new0(InsnData, 1); + data->disas_str =3D qemu_plugin_insn_disas(insn); + data->symbol =3D qemu_plugin_insn_symbol(insn); + data->addr =3D effective_addr; + g_hash_table_insert(miss_ht, GUINT_TO_POINTER(effective_addr), + (gpointer) data); + } + g_mutex_unlock(&mtx); + + qemu_plugin_register_vcpu_mem_cb(insn, vcpu_mem_access, + QEMU_PLUGIN_CB_NO_REGS, + rw, data); + + qemu_plugin_register_vcpu_insn_exec_cb(insn, vcpu_insn_exec, + QEMU_PLUGIN_CB_NO_REGS, dat= a); + } +} + +static void insn_free(gpointer data) +{ + InsnData *insn =3D (InsnData *) data; + g_free(insn->disas_str); + g_free(insn); +} + +static void cache_free(Cache *cache) +{ + for (int i =3D 0; i < cache->num_sets; i++) { + g_free(cache->sets[i].blocks); + } + + g_free(cache->sets); + g_free(cache); +} + +static int dcmp(gconstpointer a, gconstpointer b) +{ + InsnData *insn_a =3D (InsnData *) a; + InsnData *insn_b =3D (InsnData *) b; + + return insn_a->dmisses < insn_b->dmisses ? 1 : -1; +} + +static int icmp(gconstpointer a, gconstpointer b) +{ + InsnData *insn_a =3D (InsnData *) a; + InsnData *insn_b =3D (InsnData *) b; + + return insn_a->imisses < insn_b->imisses ? 1 : -1; +} + +static void log_stats() +{ + g_autoptr(GString) rep =3D g_string_new(""); + g_string_append_printf(rep, + "Data accesses: %lu, Misses: %lu\nMiss rate: %lf%%\n\n", + dmem_accesses, + dmisses, + ((double) dmisses / (double) dmem_accesses) * 100.0); + + g_string_append_printf(rep, + "Instruction accesses: %lu, Misses: %lu\nMiss rate: %lf%%\n\n", + imem_accesses, + imisses, + ((double) imisses / (double) imem_accesses) * 100.0); + + qemu_plugin_outs(rep->str); +} + +static void log_top_insns() +{ + int i; + GList *curr, *miss_insns; + InsnData *insn; + + miss_insns =3D g_hash_table_get_values(miss_ht); + miss_insns =3D g_list_sort(miss_insns, dcmp); + g_autoptr(GString) rep =3D g_string_new(""); + g_string_append_printf(rep, "%s", "address, data misses, instruction\n= "); + + for (curr =3D miss_insns, i =3D 0; curr && i < limit; i++, curr =3D cu= rr->next) { + insn =3D (InsnData *) curr->data; + g_string_append_printf(rep, "0x%" PRIx64, insn->addr); + if (insn->symbol) { + g_string_append_printf(rep, " (%s)", insn->symbol); + } + g_string_append_printf(rep, ", %ld, %s\n", insn->dmisses, + insn->disas_str); + } + + miss_insns =3D g_list_sort(miss_insns, icmp); + g_string_append_printf(rep, "%s", "\naddress, fetch misses, instructio= n\n"); + + for (curr =3D miss_insns, i =3D 0; curr && i < limit; i++, curr =3D cu= rr->next) { + insn =3D (InsnData *) curr->data; + g_string_append_printf(rep, "0x%" PRIx64, insn->addr); + if (insn->symbol) { + g_string_append_printf(rep, " (%s)", insn->symbol); + } + g_string_append_printf(rep, ", %ld, %s\n", insn->imisses, + insn->disas_str); + } + + qemu_plugin_outs(rep->str); + g_list_free(miss_insns); +} + +static void plugin_exit(qemu_plugin_id_t id, void *p) +{ + log_stats(); + log_top_insns(); + + cache_free(dcache); + cache_free(icache); + + g_hash_table_destroy(miss_ht); +} + +QEMU_PLUGIN_EXPORT +int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info, + int argc, char **argv) +{ + int i; + int iassoc, iblksize, icachesize; + int dassoc, dblksize, dcachesize; + + limit =3D 32; + sys =3D info->system_emulation; + + dassoc =3D 8; + dblksize =3D 64; + dcachesize =3D dblksize * dassoc * 32; + + iassoc =3D 8; + iblksize =3D 64; + icachesize =3D iblksize * iassoc * 32; + + + for (i =3D 0; i < argc; i++) { + char *opt =3D argv[i]; + if (g_str_has_prefix(opt, "limit=3D")) { + limit =3D g_ascii_strtoll(opt + 6, NULL, 10); + } else { + fprintf(stderr, "option parsing failed: %s\n", opt); + return -1; + } + } + + dcache =3D cache_init(dblksize, dassoc, dcachesize); + icache =3D cache_init(iblksize, iassoc, icachesize); + + rng =3D g_rand_new(); + + qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); + qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); + + miss_ht =3D g_hash_table_new_full(NULL, g_direct_equal, NULL, insn_fre= e); + + return 0; +} --=20 2.25.1 From nobody Fri Apr 26 16:23:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1624453055; cv=none; d=zohomail.com; s=zohoarc; b=C322IEB6LDIPgWuIb+8jXxN3A+/9qgZT6EtkAiYzoHFS12w8lAMygNQ3pDSeJz1vxnhVwHWC394eDzvZQBY77AntqUPD3fakBtWuITl7HhvWdXbpj5GLEInqZduGn9ypG33haDgguo0s4JIUDDXplr3V84AbL1Gp7yYSTBgnnJk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1624453055; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=ma.mandourr@gmail.com; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahmoud Mandour , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) Content-Type: text/plain; charset="utf-8" Enabled configuring both icache and dcache parameters using plugin parameters. Signed-off-by: Mahmoud Mandour --- contrib/plugins/cache.c | 47 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 46 insertions(+), 1 deletion(-) diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c index e9955cdc3a..b550ef31b0 100644 --- a/contrib/plugins/cache.c +++ b/contrib/plugins/cache.c @@ -99,8 +99,28 @@ static inline uint64_t extract_set(Cache *cache, uint64_= t addr) return (addr & cache->set_mask) >> cache->blksize_shift; } =20 +static const char *cache_config_error(int blksize, int assoc, int cachesiz= e) +{ + if (cachesize % blksize !=3D 0) { + return "cache size must be divisible by block size"; + } else if (cachesize % (blksize * assoc) !=3D 0) { + return "cache size must be divisible by set size (assoc * block si= ze)"; + } else { + return NULL; + } +} + +static bool bad_cache_params(int blksize, int assoc, int cachesize) +{ + return (cachesize % blksize) !=3D 0 || (cachesize % (blksize * assoc) = !=3D 0); +} + static Cache *cache_init(int blksize, int assoc, int cachesize) { + if (bad_cache_params(blksize, assoc, cachesize)) { + return NULL; + } + Cache *cache; int i; uint64_t blk_mask; @@ -397,7 +417,19 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qem= u_info_t *info, =20 for (i =3D 0; i < argc; i++) { char *opt =3D argv[i]; - if (g_str_has_prefix(opt, "limit=3D")) { + if (g_str_has_prefix(opt, "iblksize=3D")) { + iblksize =3D g_ascii_strtoll(opt + 9, NULL, 10); + } else if (g_str_has_prefix(opt, "iassoc=3D")) { + iassoc =3D g_ascii_strtoll(opt + 7, NULL, 10); + } else if (g_str_has_prefix(opt, "icachesize=3D")) { + icachesize =3D g_ascii_strtoll(opt + 11, NULL, 10); + } else if (g_str_has_prefix(opt, "dblksize=3D")) { + dblksize =3D g_ascii_strtoll(opt + 9, NULL, 10); + } else if (g_str_has_prefix(opt, "dassoc=3D")) { + dassoc =3D g_ascii_strtoll(opt + 7, NULL, 10); + } else if (g_str_has_prefix(opt, "dcachesize=3D")) { + dcachesize =3D g_ascii_strtoll(opt + 11, NULL, 10); + } else if (g_str_has_prefix(opt, "limit=3D")) { limit =3D g_ascii_strtoll(opt + 6, NULL, 10); } else { fprintf(stderr, "option parsing failed: %s\n", opt); @@ -406,7 +438,20 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qem= u_info_t *info, } =20 dcache =3D cache_init(dblksize, dassoc, dcachesize); + if (!dcache) { + const char *err =3D cache_config_error(dblksize, dassoc, dcachesiz= e); + fprintf(stderr, "dcache cannot be constructed from given parameter= s\n"); + fprintf(stderr, "%s\n", err); + return -1; + } + icache =3D cache_init(iblksize, iassoc, icachesize); + if (!icache) { + const char *err =3D cache_config_error(iblksize, iassoc, icachesiz= e); + fprintf(stderr, "icache cannot be constructed from given parameter= s\n"); + fprintf(stderr, "%s\n", err); + return -1; + } =20 rng =3D g_rand_new(); =20 --=20 2.25.1 From nobody Fri Apr 26 16:23:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; 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Wed, 23 Jun 2021 05:55:36 -0700 (PDT) From: Mahmoud Mandour To: qemu-devel@nongnu.org Subject: [PATCH v4 3/5] plugins/cache: Added FIFO and LRU eviction policies Date: Wed, 23 Jun 2021 14:54:55 +0200 Message-Id: <20210623125458.450462-4-ma.mandourr@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210623125458.450462-1-ma.mandourr@gmail.com> References: <20210623125458.450462-1-ma.mandourr@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=ma.mandourr@gmail.com; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahmoud Mandour , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) Content-Type: text/plain; charset="utf-8" Implemented FIFO and LRU eviction policies. Now one of the three eviction policies can be chosen as an argument. On not specifying an argument, LRU is used by default. Signed-off-by: Mahmoud Mandour --- contrib/plugins/cache.c | 203 +++++++++++++++++++++++++++++++++++++--- 1 file changed, 190 insertions(+), 13 deletions(-) diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c index b550ef31b0..bf0d2f6097 100644 --- a/contrib/plugins/cache.c +++ b/contrib/plugins/cache.c @@ -29,6 +29,14 @@ static uint64_t dmisses; static uint64_t imem_accesses; static uint64_t imisses; =20 +enum EvictionPolicy { + LRU, + FIFO, + RAND, +}; + +enum EvictionPolicy policy; + /* * A CacheSet is a set of cache blocks. A memory block that maps to a set = can be * put in any of the blocks inside the set. The number of block per set is @@ -48,6 +56,8 @@ static uint64_t imisses; * The set number is used to identify the set in which the block may exist. * The tag is compared against all the tags of a set to search for a match= . If a * match is found, then the access is a hit. + * + * The CacheSet also contains bookkeaping information about eviction detai= ls. */ =20 typedef struct { @@ -57,6 +67,9 @@ typedef struct { =20 typedef struct { CacheBlock *blocks; + uint64_t *lru_priorities; + uint64_t lru_gen_counter; + GQueue *fifo_queue; } CacheSet; =20 typedef struct { @@ -77,6 +90,12 @@ typedef struct { uint64_t imisses; } InsnData; =20 +void (*update_hit)(Cache *cache, int set, int blk); +void (*update_miss)(Cache *cache, int set, int blk); + +void (*metadata_init)(Cache *cache); +void (*metadata_destroy)(Cache *cache); + Cache *dcache, *icache; =20 static int pow_of_two(int num) @@ -89,6 +108,103 @@ static int pow_of_two(int num) return ret; } =20 +/* + * LRU evection policy: For each set, a generation counter is maintained + * alongside a priority array. + * + * On each set access, the generation counter is incremented. + * + * On a cache hit: The hit-block is assigned the current generation counte= r, + * indicating that it is the most recently used block. + * + * On a cache miss: The block with the least priority is searched and repl= aced + * with the newly-cached block, of which the priority is set to the current + * generation number. + */ + +static void lru_priorities_init(Cache *cache) +{ + int i; + + for (i =3D 0; i < cache->num_sets; i++) { + cache->sets[i].lru_priorities =3D g_new0(uint64_t, cache->assoc); + cache->sets[i].lru_gen_counter =3D 0; + } +} + +static void lru_update_blk(Cache *cache, int set_idx, int blk_idx) +{ + CacheSet *set =3D &cache->sets[set_idx]; + set->lru_priorities[blk_idx] =3D cache->sets[set_idx].lru_gen_counter; + set->lru_gen_counter++; +} + +static int lru_get_lru_block(Cache *cache, int set_idx) +{ + int i, min_idx, min_priority; + + min_priority =3D cache->sets[set_idx].lru_priorities[0]; + min_idx =3D 0; + + for (i =3D 1; i < cache->assoc; i++) { + if (cache->sets[set_idx].lru_priorities[i] < min_priority) { + min_priority =3D cache->sets[set_idx].lru_priorities[i]; + min_idx =3D i; + } + } + return min_idx; +} + +static void lru_priorities_destroy(Cache *cache) +{ + int i; + + for (i =3D 0; i < cache->num_sets; i++) { + g_free(cache->sets[i].lru_priorities); + } +} + +/* + * FIFO eviction policy: a FIFO queue is maintained for each CacheSet that + * stores accesses to the cache. + * + * On a compulsory miss: The block index is enqueued to the fifo_queue to + * indicate that it's the latest cached block. + * + * On a conflict miss: The first-in block is removed from the cache and th= e new + * block is put in its place and enqueued to the FIFO queue. + */ + +static void fifo_init(Cache *cache) +{ + int i; + + for (i =3D 0; i < cache->num_sets; i++) { + cache->sets[i].fifo_queue =3D g_queue_new(); + } +} + +static int fifo_get_first_block(Cache *cache, int set) +{ + GQueue *q =3D cache->sets[set].fifo_queue; + return GPOINTER_TO_INT(g_queue_pop_tail(q)); +} + +static void fifo_update_on_miss(Cache *cache, int set, int blk_idx) +{ + GQueue *q =3D cache->sets[set].fifo_queue; + g_queue_push_head(q, GINT_TO_POINTER(blk_idx)); +} + +static void fifo_destroy(Cache *cache) +{ + int i; + + for (i =3D 0; i < cache->assoc; i++) { + g_queue_free(cache->sets[i].fifo_queue); + } +} + static inline uint64_t extract_tag(Cache *cache, uint64_t addr) { return addr & cache->tag_mask; @@ -139,6 +255,11 @@ static Cache *cache_init(int blksize, int assoc, int c= achesize) blk_mask =3D blksize - 1; cache->set_mask =3D ((cache->num_sets - 1) << cache->blksize_shift); cache->tag_mask =3D ~(cache->set_mask | blk_mask); + + if (metadata_init) { + metadata_init(cache); + } + return cache; } =20 @@ -155,12 +276,21 @@ static int get_invalid_block(Cache *cache, uint64_t s= et) return -1; } =20 -static int get_replaced_block(Cache *cache) +static int get_replaced_block(Cache *cache, int set) { - return g_rand_int_range(rng, 0, cache->assoc); + switch (policy) { + case RAND: + return g_rand_int_range(rng, 0, cache->assoc); + case LRU: + return lru_get_lru_block(cache, set); + case FIFO: + return fifo_get_first_block(cache, set); + default: + g_assert_not_reached(); + } } =20 -static bool in_cache(Cache *cache, uint64_t addr) +static int in_cache(Cache *cache, uint64_t addr) { int i; uint64_t tag, set; @@ -171,11 +301,11 @@ static bool in_cache(Cache *cache, uint64_t addr) for (i =3D 0; i < cache->assoc; i++) { if (cache->sets[set].blocks[i].tag =3D=3D tag && cache->sets[set].blocks[i].valid) { - return true; + return i; } } =20 - return false; + return -1; } =20 /** @@ -188,20 +318,28 @@ static bool in_cache(Cache *cache, uint64_t addr) */ static bool access_cache(Cache *cache, uint64_t addr) { + int hit_blk, replaced_blk; uint64_t tag, set; - int replaced_blk; - - if (in_cache(cache, addr)) { - return true; - } =20 tag =3D extract_tag(cache, addr); set =3D extract_set(cache, addr); =20 + hit_blk =3D in_cache(cache, addr); + if (hit_blk !=3D -1) { + if (update_hit) { + update_hit(cache, set, hit_blk); + } + return true; + } + replaced_blk =3D get_invalid_block(cache, set); =20 if (replaced_blk =3D=3D -1) { - replaced_blk =3D get_replaced_block(cache); + replaced_blk =3D get_replaced_block(cache, set); + } + + if (update_miss) { + update_miss(cache, set, replaced_blk); } =20 cache->sets[set].blocks[replaced_blk].tag =3D tag; @@ -308,6 +446,10 @@ static void cache_free(Cache *cache) g_free(cache->sets[i].blocks); } =20 + if (metadata_destroy) { + metadata_destroy(cache); + } + g_free(cache->sets); g_free(cache); } @@ -395,6 +537,28 @@ static void plugin_exit(qemu_plugin_id_t id, void *p) g_hash_table_destroy(miss_ht); } =20 +static void policy_init() +{ + switch (policy) { + case LRU: + update_hit =3D lru_update_blk; + update_miss =3D lru_update_blk; + metadata_init =3D lru_priorities_init; + metadata_destroy =3D lru_priorities_destroy; + break; + case FIFO: + update_miss =3D fifo_update_on_miss; + metadata_init =3D fifo_init; + metadata_destroy =3D fifo_destroy; + break; + case RAND: + rng =3D g_rand_new(); + break; + default: + g_assert_not_reached(); + } +} + QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info, int argc, char **argv) @@ -414,6 +578,7 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qemu= _info_t *info, iblksize =3D 64; icachesize =3D iblksize * iassoc * 32; =20 + policy =3D LRU; =20 for (i =3D 0; i < argc; i++) { char *opt =3D argv[i]; @@ -431,12 +596,26 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qe= mu_info_t *info, dcachesize =3D g_ascii_strtoll(opt + 11, NULL, 10); } else if (g_str_has_prefix(opt, "limit=3D")) { limit =3D g_ascii_strtoll(opt + 6, NULL, 10); + } else if (g_str_has_prefix(opt, "evict=3D")) { + gchar *p =3D opt + 6; + if (g_strcmp0(p, "rand") =3D=3D 0) { + policy =3D RAND; + } else if (g_strcmp0(p, "lru") =3D=3D 0) { + policy =3D LRU; + } else if (g_strcmp0(p, "fifo") =3D=3D 0) { + policy =3D FIFO; + } else { + fprintf(stderr, "invalid eviction policy: %s\n", opt); + return -1; + } } else { fprintf(stderr, "option parsing failed: %s\n", opt); return -1; } } =20 + policy_init(); + dcache =3D cache_init(dblksize, dassoc, dcachesize); if (!dcache) { const char *err =3D cache_config_error(dblksize, dassoc, dcachesiz= e); @@ -453,8 +632,6 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qemu= _info_t *info, return -1; } =20 - rng =3D g_rand_new(); - qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); =20 --=20 2.25.1 From nobody Fri Apr 26 16:23:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; 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Wed, 23 Jun 2021 05:55:38 -0700 (PDT) From: Mahmoud Mandour To: qemu-devel@nongnu.org Subject: [PATCH v4 4/5] docs/devel: Added cache plugin to the plugins docs Date: Wed, 23 Jun 2021 14:54:56 +0200 Message-Id: <20210623125458.450462-5-ma.mandourr@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210623125458.450462-1-ma.mandourr@gmail.com> References: <20210623125458.450462-1-ma.mandourr@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=ma.mandourr@gmail.com; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahmoud Mandour , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) Content-Type: text/plain; charset="utf-8" Signed-off-by: Mahmoud Mandour --- docs/devel/tcg-plugins.rst | 60 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst index 18c6581d85..9d90110cbf 100644 --- a/docs/devel/tcg-plugins.rst +++ b/docs/devel/tcg-plugins.rst @@ -319,3 +319,63 @@ the user to see what hardware is accessed how often. I= t has a number of options: off:0000001c, 1, 2 off:00000020, 1, 2 ... + +- contrib/plugins/cache + +Cache modelling plugin that measures the performance of a given cache +configuration when a given working set is run:: + + ./qemu-x86_64 -plugin ./libcache.so -d plugin -D cache.log \ + ./build/tests/tcg/x86_64-linux-user/float_convs + + +will report the following:: + + Data accesses: 996479, Misses: 507 + Miss rate: 0.050879% + + Instruction accesses: 2641737, Misses: 18617 + Miss rate: 0.704726% + + address, data misses, instruction + 0x424f1e (_int_malloc), 109, movq %rax, 8(%rcx) + 0x41f395 (_IO_default_xsputn), 49, movb %dl, (%rdi, %rax) + 0x42584d (ptmalloc_init.part.0), 33, movaps %xmm0, (%rax) + 0x454d48 (__tunables_init), 20, cmpb $0, (%r8) + ... + + address, fetch misses, instruction + 0x4160a0 (__vfprintf_internal), 744, movl $1, %ebx + 0x41f0a0 (_IO_setb), 744, endbr64 + 0x415882 (__vfprintf_internal), 744, movq %r12, %rdi + 0x4268a0 (__malloc), 696, andq $0xfffffffffffffff0, %rax + ... + +The plugin has a number of arguments, all of them are optional: + + * arg=3D"limit=3DN" + + Print top N icache and dcache thrashing instructions along with their + address, number of misses, and its disassembly. (default: 32) + + * arg=3D"icachesize=3DN" + * arg=3D"iblksize=3DB" + * arg=3D"iassoc=3DA" + + Instruction cache configuration arguments. They specify the cache size, = block + size, and associativity of the instruction cache, respectively. + (default: N =3D 16384, B =3D 64, A =3D 8) + + * arg=3D"dcachesize=3DN" + * arg=3D"dblksize=3DB" + * arg=3D"dassoc=3DA" + + Data cache configuration arguments. They specify the cache size, block s= ize, + and associativity of the data cache, respectively. + (default: N =3D 16384, B =3D 64, A =3D 8) + + * arg=3D"evict=3DPOLICY" + + Sets the eviction policy to POLICY. Available policies are: :code:`lru`, + :code:`fifo`, and :code:`rand`. The plugin will use the specified policy= for + both instruction and data caches. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=ma.mandourr@gmail.com; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahmoud Mandour Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @gmail.com) Signed-off-by: Mahmoud Mandour --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5f55404f2f..1c4970c88b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2966,6 +2966,7 @@ F: include/tcg/ =20 TCG Plugins M: Alex Benn=C3=A9e +R: Mahmoud Mandour S: Maintained F: docs/devel/tcg-plugins.rst F: plugins/ --=20 2.25.1