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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/cris/translate.c | 320 ++++++++++++++++++++++------------------ 1 file changed, 177 insertions(+), 143 deletions(-) diff --git a/target/cris/translate.c b/target/cris/translate.c index 24dbae6d58..8c24053f5e 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -3119,17 +3119,11 @@ static unsigned int crisv32_decoder(CPUCRISState *e= nv, DisasContext *dc) * */ =20 -/* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_ins= ns) +static void cris_tr_init_disas_context(DisasContextBase *dcbase, CPUState = *cs) { + DisasContext *dc =3D container_of(dcbase, DisasContext, base); CPUCRISState *env =3D cs->env_ptr; - uint32_t pc_start; - unsigned int insn_len; - struct DisasContext ctx; - struct DisasContext *dc =3D &ctx; - uint32_t page_start; - target_ulong npc; - int num_insns; + uint32_t tb_flags; =20 if (env->pregs[PR_VR] =3D=3D 32) { dc->decoder =3D crisv32_decoder; @@ -3139,23 +3133,21 @@ void gen_intermediate_code(CPUState *cs, Translatio= nBlock *tb, int max_insns) dc->clear_locked_irq =3D 1; } =20 - /* Odd PC indicates that branch is rexecuting due to exception in the + /* + * Odd PC indicates that branch is rexecuting due to exception in the * delayslot, like in real hw. */ - pc_start =3D tb->pc & ~1; - - dc->base.tb =3D tb; - dc->base.pc_first =3D pc_start; - dc->base.pc_next =3D pc_start; - dc->base.is_jmp =3D DISAS_NEXT; - dc->base.singlestep_enabled =3D cs->singlestep_enabled; + dc->base.pc_first &=3D ~1; + dc->base.pc_next &=3D ~1; =20 dc->cpu =3D env_archcpu(env); - dc->ppc =3D pc_start; - dc->pc =3D pc_start; + dc->ppc =3D dc->base.pc_next; + dc->pc =3D dc->base.pc_next; dc->flags_uptodate =3D 1; dc->flagx_known =3D 1; - dc->flags_x =3D tb->flags & X_FLAG; + tb_flags =3D dc->base.tb->flags; + dc->tb_flags =3D tb_flags & (S_FLAG | P_FLAG | U_FLAG | X_FLAG | PFIX_= FLAG); + dc->flags_x =3D tb_flags & X_FLAG; dc->cc_x_uptodate =3D 0; dc->cc_mask =3D 0; dc->update_cc =3D 0; @@ -3165,9 +3157,7 @@ void gen_intermediate_code(CPUState *cs, TranslationB= lock *tb, int max_insns) dc->cc_size_uptodate =3D -1; =20 /* Decode TB flags. */ - dc->tb_flags =3D tb->flags & (S_FLAG | P_FLAG | U_FLAG \ - | X_FLAG | PFIX_FLAG); - dc->delayed_branch =3D !!(tb->flags & 7); + dc->delayed_branch =3D !!(tb_flags & 7); if (dc->delayed_branch) { dc->jmp =3D JMP_INDIRECT; } else { @@ -3176,113 +3166,146 @@ void gen_intermediate_code(CPUState *cs, Translat= ionBlock *tb, int max_insns) =20 dc->cpustate_changed =3D 0; =20 - page_start =3D pc_start & TARGET_PAGE_MASK; - num_insns =3D 0; + if ((dc->base.singlestep_enabled || singlestep) + && dc->base.max_insns > 1) { + /* If re-executing a branch, execute both. */ + dc->base.max_insns =3D 1 + (dc->base.tb->pc & 1); + } +} =20 - gen_tb_start(tb); - do { - tcg_gen_insn_start(dc->delayed_branch =3D=3D 1 - ? dc->ppc | 1 : dc->pc); - num_insns++; +static void cris_tr_tb_start(DisasContextBase *db, CPUState *cpu) +{ +} =20 - if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) { - cris_evaluate_flags(dc); - tcg_gen_movi_tl(env_pc, dc->pc); - t_gen_raise_exception(EXCP_DEBUG); - dc->base.is_jmp =3D DISAS_NORETURN; - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc->pc +=3D 2; - break; - } +static void cris_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc =3D container_of(dcbase, DisasContext, base); =20 - /* Pretty disas. */ - LOG_DIS("%8.8x:\t", dc->pc); + tcg_gen_insn_start(dc->delayed_branch =3D=3D 1 ? dc->ppc | 1 : dc->pc); +} =20 - if (num_insns =3D=3D max_insns && (tb_cflags(tb) & CF_LAST_IO)) { - gen_io_start(); - } - dc->clear_x =3D 1; +static bool cris_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *c= pu, + const CPUBreakpoint *bp) +{ + DisasContext *dc =3D container_of(dcbase, DisasContext, base); =20 - insn_len =3D dc->decoder(env, dc); - dc->ppc =3D dc->pc; - dc->pc +=3D insn_len; - if (dc->clear_x) { - cris_clear_x_flag(dc); - } + cris_evaluate_flags(dc); + tcg_gen_movi_tl(env_pc, dc->pc); + t_gen_raise_exception(EXCP_DEBUG); + dc->base.is_jmp =3D DISAS_NORETURN; + /* + * The address covered by the breakpoint must be included in + * [tb->pc, tb->pc + tb->size) in order to for it to be + * properly cleared -- thus we increment the PC here so that + * the logic setting tb->size below does the right thing. + */ + dc->pc +=3D 2; + return true; +} =20 - /* Check for delayed branches here. If we do it before - actually generating any host code, the simulator will just - loop doing nothing for on this program location. */ - if (dc->delayed_branch) { - dc->delayed_branch--; - if (dc->delayed_branch =3D=3D 0) { - if (tb->flags & 7) { - t_gen_movi_env_TN(dslot, 0); - } - if (dc->cpustate_changed || !dc->flagx_known - || (dc->flags_x !=3D (tb->flags & X_FLAG))) { - cris_store_direct_jmp(dc); - } +static void cris_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) +{ + DisasContext *dc =3D container_of(dcbase, DisasContext, base); + CPUCRISState *env =3D cs->env_ptr; + unsigned int insn_len; =20 - if (dc->clear_locked_irq) { - dc->clear_locked_irq =3D 0; - t_gen_movi_env_TN(locked_irq, 0); - } + /* Pretty disas. */ + LOG_DIS("%8.8x:\t", dc->pc); =20 - if (dc->jmp =3D=3D JMP_DIRECT_CC) { - TCGLabel *l1 =3D gen_new_label(); - cris_evaluate_flags(dc); + dc->clear_x =3D 1; =20 - /* Conditional jmp. */ - tcg_gen_brcondi_tl(TCG_COND_EQ, - env_btaken, 0, l1); - gen_goto_tb(dc, 1, dc->jmp_pc); - gen_set_label(l1); - gen_goto_tb(dc, 0, dc->pc); - dc->base.is_jmp =3D DISAS_NORETURN; - dc->jmp =3D JMP_NOJMP; - } else if (dc->jmp =3D=3D JMP_DIRECT) { - cris_evaluate_flags(dc); - gen_goto_tb(dc, 0, dc->jmp_pc); - dc->base.is_jmp =3D DISAS_NORETURN; - dc->jmp =3D JMP_NOJMP; - } else { - TCGv c =3D tcg_const_tl(dc->pc); - t_gen_cc_jmp(env_btarget, c); - tcg_temp_free(c); - dc->base.is_jmp =3D DISAS_JUMP; - } - break; + insn_len =3D dc->decoder(env, dc); + dc->ppc =3D dc->pc; + dc->pc +=3D insn_len; + dc->base.pc_next +=3D insn_len; + + if (dc->clear_x) { + cris_clear_x_flag(dc); + } + + /* + * Check for delayed branches here. If we do it before + * actually generating any host code, the simulator will just + * loop doing nothing for on this program location. + */ + if (dc->delayed_branch) { + dc->delayed_branch--; + if (dc->delayed_branch =3D=3D 0) { + if (dc->base.tb->flags & 7) { + t_gen_movi_env_TN(dslot, 0); + } + + if (dc->cpustate_changed + || !dc->flagx_known + || (dc->flags_x !=3D (dc->base.tb->flags & X_FLAG))) { + cris_store_direct_jmp(dc); + } + + if (dc->clear_locked_irq) { + dc->clear_locked_irq =3D 0; + t_gen_movi_env_TN(locked_irq, 0); + } + + if (dc->jmp =3D=3D JMP_DIRECT_CC) { + TCGLabel *l1 =3D gen_new_label(); + cris_evaluate_flags(dc); + + /* Conditional jmp. */ + tcg_gen_brcondi_tl(TCG_COND_EQ, env_btaken, 0, l1); + gen_goto_tb(dc, 1, dc->jmp_pc); + gen_set_label(l1); + gen_goto_tb(dc, 0, dc->pc); + dc->base.is_jmp =3D DISAS_NORETURN; + dc->jmp =3D JMP_NOJMP; + } else if (dc->jmp =3D=3D JMP_DIRECT) { + cris_evaluate_flags(dc); + gen_goto_tb(dc, 0, dc->jmp_pc); + dc->base.is_jmp =3D DISAS_NORETURN; + dc->jmp =3D JMP_NOJMP; + } else { + TCGv c =3D tcg_const_tl(dc->pc); + t_gen_cc_jmp(env_btarget, c); + tcg_temp_free(c); + dc->base.is_jmp =3D DISAS_JUMP; } } + } =20 - /* If we are rexecuting a branch due to exceptions on - delay slots don't break. */ - if (!(tb->pc & 1) && cs->singlestep_enabled) { - break; - } - } while (!dc->base.is_jmp && !dc->cpustate_changed - && !tcg_op_buf_full() - && !singlestep - && (dc->pc - page_start < TARGET_PAGE_SIZE) - && num_insns < max_insns); + /* Force an update if the per-tb cpu state has changed. */ + if (dc->base.is_jmp =3D=3D DISAS_NEXT + && (dc->cpustate_changed + || !dc->flagx_known + || (dc->flags_x !=3D (dc->base.tb->flags & X_FLAG)))) { + dc->base.is_jmp =3D DISAS_UPDATE; + tcg_gen_movi_tl(env_pc, dc->pc); + } + + /* + * FIXME: Only the first insn in the TB should cross a page boundary. + * If we can detect the length of the next insn easily, we should. + * In the meantime, simply stop when we do cross. + */ + if (dc->base.is_jmp =3D=3D DISAS_NEXT + && ((dc->pc ^ dc->base.pc_first) & TARGET_PAGE_MASK) !=3D 0) { + dc->base.is_jmp =3D DISAS_TOO_MANY; + } +} + +static void cris_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) +{ + DisasContext *dc =3D container_of(dcbase, DisasContext, base); + target_ulong npc =3D dc->pc; + + if (dc->base.is_jmp =3D=3D DISAS_NORETURN) { + /* If we have a broken branch+delayslot sequence, it's too late. */ + assert(dc->delayed_branch !=3D 1); + return; + } =20 if (dc->clear_locked_irq) { t_gen_movi_env_TN(locked_irq, 0); } =20 - npc =3D dc->pc; - - /* Force an update if the per-tb cpu state has changed. */ - if (dc->base.is_jmp =3D=3D DISAS_NEXT - && (dc->cpustate_changed || !dc->flagx_known - || (dc->flags_x !=3D (tb->flags & X_FLAG)))) { - dc->base.is_jmp =3D DISAS_UPDATE; - tcg_gen_movi_tl(env_pc, npc); - } /* Broken branch+delayslot sequence. */ if (dc->delayed_branch =3D=3D 1) { /* Set env->dslot to the size of the branch insn. */ @@ -3292,45 +3315,56 @@ void gen_intermediate_code(CPUState *cs, Translatio= nBlock *tb, int max_insns) =20 cris_evaluate_flags(dc); =20 - if (unlikely(cs->singlestep_enabled)) { - if (dc->base.is_jmp =3D=3D DISAS_NEXT) { - tcg_gen_movi_tl(env_pc, npc); - } - t_gen_raise_exception(EXCP_DEBUG); - } else { + if (unlikely(dc->base.singlestep_enabled)) { switch (dc->base.is_jmp) { - case DISAS_NEXT: - gen_goto_tb(dc, 1, npc); - break; - default: + case DISAS_TOO_MANY: + tcg_gen_movi_tl(env_pc, npc); + /* fall through */ case DISAS_JUMP: case DISAS_UPDATE: - /* indicate that the hash table must be used - to find the next TB */ + t_gen_raise_exception(EXCP_DEBUG); + break; + default: + g_assert_not_reached(); + } + } else { + switch (dc->base.is_jmp) { + case DISAS_TOO_MANY: + gen_goto_tb(dc, 1, npc); + break; + case DISAS_JUMP: + case DISAS_UPDATE: + /* indicate that the hash table must be used to find the next = TB */ tcg_gen_exit_tb(NULL, 0); break; - case DISAS_NORETURN: - /* nothing more to generate */ - break; + default: + g_assert_not_reached(); } } - gen_tb_end(tb, num_insns); +} =20 - tb->size =3D dc->pc - pc_start; - tb->icount =3D num_insns; - -#ifdef DEBUG_DISAS -#if !DISAS_CRIS - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) - && qemu_log_in_addr_range(pc_start)) { - FILE *logfile =3D qemu_log_lock(); - qemu_log("--------------\n"); - qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, dc->pc - pc_start); - qemu_log_unlock(logfile); +static void cris_tr_disas_log(const DisasContextBase *dcbase, CPUState *cp= u) +{ + if (!DISAS_CRIS) { + qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first)); + log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size); } -#endif -#endif +} + +static const TranslatorOps cris_tr_ops =3D { + .init_disas_context =3D cris_tr_init_disas_context, + .tb_start =3D cris_tr_tb_start, + .insn_start =3D cris_tr_insn_start, + .breakpoint_check =3D cris_tr_breakpoint_check, + .translate_insn =3D cris_tr_translate_insn, + .tb_stop =3D cris_tr_tb_stop, + .disas_log =3D cris_tr_disas_log, +}; + +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_ins= ns) +{ + DisasContext dc; + translator_loop(&cris_tr_ops, &dc.base, cs, tb, max_insns); } =20 void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags) --=20 2.25.1