From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623957585862305.4699591946427; Thu, 17 Jun 2021 12:19:45 -0700 (PDT) Received: from localhost ([::1]:51154 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxYG-0003xa-LH for importer@patchew.org; Thu, 17 Jun 2021 15:19:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56266) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM2-0002NU-CA; Thu, 17 Jun 2021 15:07:06 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:39035) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM0-0002uM-7D; Thu, 17 Jun 2021 15:07:06 -0400 Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 700615C016D; Thu, 17 Jun 2021 15:07:03 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Thu, 17 Jun 2021 15:07:03 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:00 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=P+aHwM71llAK/ LvicYvkLVH+gYq9Ej4RfHYC6EMfLK0=; b=JBgDrp35SSnIqbXyIiNqdLEwkn+CH +ui03w+K0POwRd8W+/LHYd3nHUcXISjdwsfV2GplE+qDB2vVSL69dugj8HLOWHW6 Zu44md2/KD+A/vS1kkRLWx1JBFyOExntZQ1nhCv0CMLM2jAo9aI+PFydI+rlF+cz vufFyIExHvbIVKPdDQdOc67NYb1Dt0DZ+Z2dp8/gcvY2uoO2qi/ldv5uE17JaLy/ xrVNpXS3InIhl5XZBeV6zyN6dAIKI0jiybRG0cKa2J6k0DofIF6/gyhItAudmQNI EkI97GfO8Xh68oBCswNJ63lK+CK8VTD9ysc57iRkBk/o2kE0iMllh34DA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=P+aHwM71llAK/LvicYvkLVH+gYq9Ej4RfHYC6EMfLK0=; b=eXOW6zCA u7XiBanwRlhcsY1xqHH/JOEq+MiiXDzFjejbift/ZhlxOWOD3brtIkf5ushJJwgr AKSahfX/Mqrf9/Mm1q2PcjASxlSodK9lP3XUOfE7bsv9jzWUnr5IxHkAuvyuoGC3 eM+4SNYmRdslfEAgoWE6oX35mR/zAnOIi3ROWHNU5kNRefSqz2rFVbPUcrbc0FdV 4c6Ec9M3YiCH2kNmCbusnXNOtp9cANX4Dm4P4/GLtVbWEdVfBEBZiOxIupy+dY8L qNNA9jlH/W2LtlhaZF8WrCZFRCG77bEQE213/OftcYOP2c2c44+dDUlBPoKqp27o bXtbZ+7InFIFwg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 01/11] hw/nvme: reimplement flush to allow cancellation Date: Thu, 17 Jun 2021 21:06:47 +0200 Message-Id: <20210617190657.110823-2-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Prior to this patch, a broadcast flush would result in submitting multiple "fire and forget" aios (no reference saved to the aiocbs returned from the blk_aio_flush calls). Fix this by issuing the flushes one after another. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/nvme.h | 2 + hw/nvme/ctrl.c | 206 ++++++++++++++++++++++++++----------------- hw/nvme/trace-events | 6 +- 3 files changed, 130 insertions(+), 84 deletions(-) diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h index 93a7e0e5380e..19376570c91e 100644 --- a/hw/nvme/nvme.h +++ b/hw/nvme/nvme.h @@ -27,6 +27,8 @@ #define NVME_MAX_CONTROLLERS 32 #define NVME_MAX_NAMESPACES 256 =20 +QEMU_BUILD_BUG_ON(NVME_MAX_NAMESPACES > NVME_NSID_BROADCAST - 1); + typedef struct NvmeCtrl NvmeCtrl; typedef struct NvmeNamespace NvmeNamespace; =20 diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 7dea64b72e6a..9f81ab99d484 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -1788,22 +1788,19 @@ static inline bool nvme_is_write(NvmeRequest *req) rw->opcode =3D=3D NVME_CMD_WRITE_ZEROES; } =20 +static AioContext *nvme_get_aio_context(BlockAIOCB *acb) +{ + return qemu_get_aio_context(); +} + static void nvme_misc_cb(void *opaque, int ret) { NvmeRequest *req =3D opaque; - NvmeNamespace *ns =3D req->ns; =20 - BlockBackend *blk =3D ns->blkconf.blk; - BlockAcctCookie *acct =3D &req->acct; - BlockAcctStats *stats =3D blk_get_stats(blk); - - trace_pci_nvme_misc_cb(nvme_cid(req), blk_name(blk)); + trace_pci_nvme_misc_cb(nvme_cid(req)); =20 if (ret) { - block_acct_failed(stats, acct); nvme_aio_err(req, ret); - } else { - block_acct_done(stats, acct); } =20 nvme_enqueue_req_completion(nvme_cq(req), req); @@ -1919,41 +1916,6 @@ static void nvme_aio_format_cb(void *opaque, int ret) nvme_enqueue_req_completion(nvme_cq(req), req); } =20 -struct nvme_aio_flush_ctx { - NvmeRequest *req; - NvmeNamespace *ns; - BlockAcctCookie acct; -}; - -static void nvme_aio_flush_cb(void *opaque, int ret) -{ - struct nvme_aio_flush_ctx *ctx =3D opaque; - NvmeRequest *req =3D ctx->req; - uintptr_t *num_flushes =3D (uintptr_t *)&req->opaque; - - BlockBackend *blk =3D ctx->ns->blkconf.blk; - BlockAcctCookie *acct =3D &ctx->acct; - BlockAcctStats *stats =3D blk_get_stats(blk); - - trace_pci_nvme_aio_flush_cb(nvme_cid(req), blk_name(blk)); - - if (!ret) { - block_acct_done(stats, acct); - } else { - block_acct_failed(stats, acct); - nvme_aio_err(req, ret); - } - - (*num_flushes)--; - g_free(ctx); - - if (*num_flushes) { - return; - } - - nvme_enqueue_req_completion(nvme_cq(req), req); -} - static void nvme_verify_cb(void *opaque, int ret) { NvmeBounceContext *ctx =3D opaque; @@ -2868,56 +2830,138 @@ static uint16_t nvme_compare(NvmeCtrl *n, NvmeRequ= est *req) return NVME_NO_COMPLETE; } =20 +typedef struct NvmeFlushAIOCB { + BlockAIOCB common; + BlockAIOCB *aiocb; + NvmeRequest *req; + QEMUBH *bh; + int ret; + + NvmeNamespace *ns; + uint32_t nsid; + bool broadcast; +} NvmeFlushAIOCB; + +static void nvme_flush_cancel(BlockAIOCB *acb) +{ + NvmeFlushAIOCB *iocb =3D container_of(acb, NvmeFlushAIOCB, common); + + iocb->ret =3D -ECANCELED; + + if (iocb->aiocb) { + blk_aio_cancel_async(iocb->aiocb); + } +} + +static const AIOCBInfo nvme_flush_aiocb_info =3D { + .aiocb_size =3D sizeof(NvmeFlushAIOCB), + .cancel_async =3D nvme_flush_cancel, + .get_aio_context =3D nvme_get_aio_context, +}; + +static void nvme_flush_ns_cb(void *opaque, int ret) +{ + NvmeFlushAIOCB *iocb =3D opaque; + NvmeNamespace *ns =3D iocb->ns; + + if (ret < 0) { + iocb->ret =3D ret; + goto out; + } else if (iocb->ret < 0) { + goto out; + } + + if (ns) { + trace_pci_nvme_flush_ns(iocb->nsid); + + iocb->ns =3D NULL; + iocb->aiocb =3D blk_aio_flush(ns->blkconf.blk, nvme_flush_ns_cb, i= ocb); + return; + } + +out: + iocb->aiocb =3D NULL; + qemu_bh_schedule(iocb->bh); +} + +static void nvme_flush_bh(void *opaque) +{ + NvmeFlushAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeCtrl *n =3D nvme_ctrl(req); + int i; + + if (iocb->ret < 0) { + goto done; + } + + if (iocb->broadcast) { + for (i =3D iocb->nsid + 1; i <=3D NVME_MAX_NAMESPACES; i++) { + iocb->ns =3D nvme_ns(n, i); + if (iocb->ns) { + iocb->nsid =3D i; + break; + } + } + } + + if (!iocb->ns) { + goto done; + } + + nvme_flush_ns_cb(iocb, 0); + return; + +done: + qemu_bh_delete(iocb->bh); + iocb->bh =3D NULL; + + iocb->common.cb(iocb->common.opaque, iocb->ret); + + qemu_aio_unref(iocb); + + return; +} + static uint16_t nvme_flush(NvmeCtrl *n, NvmeRequest *req) { + NvmeFlushAIOCB *iocb; uint32_t nsid =3D le32_to_cpu(req->cmd.nsid); - uintptr_t *num_flushes =3D (uintptr_t *)&req->opaque; uint16_t status; - struct nvme_aio_flush_ctx *ctx; - NvmeNamespace *ns; =20 - trace_pci_nvme_flush(nvme_cid(req), nsid); + iocb =3D qemu_aio_get(&nvme_flush_aiocb_info, NULL, nvme_misc_cb, req); =20 - if (nsid !=3D NVME_NSID_BROADCAST) { - req->ns =3D nvme_ns(n, nsid); - if (unlikely(!req->ns)) { - return NVME_INVALID_FIELD | NVME_DNR; + iocb->req =3D req; + iocb->bh =3D qemu_bh_new(nvme_flush_bh, iocb); + iocb->ret =3D 0; + iocb->ns =3D NULL; + iocb->nsid =3D 0; + iocb->broadcast =3D (nsid =3D=3D NVME_NSID_BROADCAST); + + if (!iocb->broadcast) { + if (!nvme_nsid_valid(n, nsid)) { + status =3D NVME_INVALID_NSID | NVME_DNR; + goto out; } =20 - block_acct_start(blk_get_stats(req->ns->blkconf.blk), &req->acct, = 0, - BLOCK_ACCT_FLUSH); - req->aiocb =3D blk_aio_flush(req->ns->blkconf.blk, nvme_misc_cb, r= eq); - return NVME_NO_COMPLETE; - } - - /* 1-initialize; see comment in nvme_dsm */ - *num_flushes =3D 1; - - for (int i =3D 1; i <=3D NVME_MAX_NAMESPACES; i++) { - ns =3D nvme_ns(n, i); - if (!ns) { - continue; + iocb->ns =3D nvme_ns(n, nsid); + if (!iocb->ns) { + status =3D NVME_INVALID_FIELD | NVME_DNR; + goto out; } =20 - ctx =3D g_new(struct nvme_aio_flush_ctx, 1); - ctx->req =3D req; - ctx->ns =3D ns; - - (*num_flushes)++; - - block_acct_start(blk_get_stats(ns->blkconf.blk), &ctx->acct, 0, - BLOCK_ACCT_FLUSH); - blk_aio_flush(ns->blkconf.blk, nvme_aio_flush_cb, ctx); + iocb->nsid =3D nsid; } =20 - /* account for the 1-initialization */ - (*num_flushes)--; + req->aiocb =3D &iocb->common; + qemu_bh_schedule(iocb->bh); =20 - if (*num_flushes) { - status =3D NVME_NO_COMPLETE; - } else { - status =3D req->status; - } + return NVME_NO_COMPLETE; + +out: + qemu_bh_delete(iocb->bh); + iocb->bh =3D NULL; + qemu_aio_unref(iocb); =20 return status; } diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events index ea33d0ccc383..ce6b6ffe9604 100644 --- a/hw/nvme/trace-events +++ b/hw/nvme/trace-events @@ -7,16 +7,16 @@ pci_nvme_map_addr(uint64_t addr, uint64_t len) "addr 0x%"= PRIx64" len %"PRIu64"" pci_nvme_map_addr_cmb(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %= "PRIu64"" pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t= prp2, int num_prps) "trans_len %"PRIu64" len %"PRIu32" prp1 0x%"PRIx64" pr= p2 0x%"PRIx64" num_prps %d" pci_nvme_map_sgl(uint8_t typ, uint64_t len) "type 0x%"PRIx8" len %"PRIu64"" -pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode= , const char *opname) "cid %"PRIu16" nsid %"PRIu32" sqid %"PRIu16" opc 0x%"= PRIx8" opname '%s'" +pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode= , const char *opname) "cid %"PRIu16" nsid 0x%"PRIx32" sqid %"PRIu16" opc 0x= %"PRIx8" opname '%s'" pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char= *opname) "cid %"PRIu16" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'" -pci_nvme_flush(uint16_t cid, uint32_t nsid) "cid %"PRIu16" nsid %"PRIu32"" +pci_nvme_flush_ns(uint32_t nsid) "nsid 0x%"PRIx32"" pci_nvme_format(uint16_t cid, uint32_t nsid, uint8_t lbaf, uint8_t mset, u= int8_t pi, uint8_t pil) "cid %"PRIu16" nsid %"PRIu32" lbaf %"PRIu8" mset %"= PRIu8" pi %"PRIu8" pil %"PRIu8"" pci_nvme_format_ns(uint16_t cid, uint32_t nsid, uint8_t lbaf, uint8_t mset= , uint8_t pi, uint8_t pil) "cid %"PRIu16" nsid %"PRIu32" lbaf %"PRIu8" mset= %"PRIu8" pi %"PRIu8" pil %"PRIu8"" pci_nvme_format_cb(uint16_t cid, uint32_t nsid) "cid %"PRIu16" nsid %"PRIu= 32"" pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, u= int64_t lba) "cid %"PRIu16" nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lb= a 0x%"PRIx64"" pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb= , uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" n= lb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64"" pci_nvme_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" -pci_nvme_misc_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s= '" +pci_nvme_misc_cb(uint16_t cid) "cid %"PRIu16"" pci_nvme_dif_rw(uint8_t pract, uint8_t prinfo) "pract 0x%"PRIx8" prinfo 0x= %"PRIx8"" pci_nvme_dif_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '= %s'" pci_nvme_dif_rw_mdata_in_cb(uint16_t cid, const char *blkname) "cid %"PRIu= 16" blk '%s'" --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623957941766429.0923874327317; Thu, 17 Jun 2021 12:25:41 -0700 (PDT) Received: from localhost ([::1]:35002 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxe0-000453-EJ for importer@patchew.org; Thu, 17 Jun 2021 15:25:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56300) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM4-0002PW-KI; Thu, 17 Jun 2021 15:07:08 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:48431) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM2-0002wX-46; Thu, 17 Jun 2021 15:07:08 -0400 Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.nyi.internal (Postfix) with ESMTP id 61D495C0163; Thu, 17 Jun 2021 15:07:05 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Thu, 17 Jun 2021 15:07:05 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:03 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=+FNOeI7fQoDKI wskRsFqxijv/G4Fvdc/vDZEjum4WgA=; b=Z6JWwnvC/Jb1Qzp2hK4eVepivor3/ uvqYX1Ys1Y6BT3mF4/vTYSVxuH8waFqSnXCrA6Gjo0MhBV9XLg8OsiwvZ74e4cOs 2pFpBOkG+nbjzoNBLgk4xYGw7+apcdAeAqwYJ9mUnFM2yCOMch75b8M3KEXBqobx Ql2FKWmkAvOo+uwwtjRdxQ/01D13EGzmxXqTw9hhaQg8PVETBZ3gd2aAD/T0LldI a7Bf9d5FqcPWDUYxrdKR2zbMM8tQE3EXGOBoBWFb82/oOTZxIwk9RsgGVD512E7R bz9ckCj64l+MYzDpbaM8TmlRRtNshUgnCtWoRfvDYrxTvujng3ighIo9Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=+FNOeI7fQoDKIwskRsFqxijv/G4Fvdc/vDZEjum4WgA=; b=VXPlBbjT pEdVEYI7gDhaD5TR80k6D1Dmemca8oVbpBgkZR5SgBN3pHu69R1E5GbOMZj4Nx+d /hnUfyMM90GiFP1pH37+iroVr4zgmqS9IKBRRH7Q1zbHpWYwlB7xreuxMv/Z1/Lj xc0/pvi+aCS5Onah7uF5xqlAgw1L/rzeS+12md9YVAdkqTni3BzcAC4SXL9PPGHK MK068yrXQUPRNVJX8SqBU0XycuD1Auc+rCA8QWWmhjX833hoAhUSIDB13HZwiol0 Ovw7gaFx8k3X5Q7DQvCe9DaLTNPcRlgFPWEx+RhH23HLoH56s5dr2m2hG/YtCKgh vlDQ8tqSdlAkEw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 02/11] hw/nvme: add nvme_block_status_all helper Date: Thu, 17 Jun 2021 21:06:48 +0200 Message-Id: <20210617190657.110823-3-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Pull the gist of nvme_check_dulbe() into a helper function. This is in preparation for dsm refactoring. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/ctrl.c | 41 ++++++++++++++++++++++++++++------------- 1 file changed, 28 insertions(+), 13 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 9f81ab99d484..2e36349ced28 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -1438,18 +1438,15 @@ static inline uint16_t nvme_check_bounds(NvmeNamesp= ace *ns, uint64_t slba, return NVME_SUCCESS; } =20 -static uint16_t nvme_check_dulbe(NvmeNamespace *ns, uint64_t slba, - uint32_t nlb) +static int nvme_block_status_all(NvmeNamespace *ns, uint64_t slba, + uint32_t nlb, int flags) { BlockDriverState *bs =3D blk_bs(ns->blkconf.blk); =20 int64_t pnum =3D 0, bytes =3D nvme_l2b(ns, nlb); int64_t offset =3D nvme_l2b(ns, slba); - bool zeroed; int ret; =20 - Error *local_err =3D NULL; - /* * `pnum` holds the number of bytes after offset that shares the same * allocation status as the byte at offset. If `pnum` is different from @@ -1461,23 +1458,41 @@ static uint16_t nvme_check_dulbe(NvmeNamespace *ns,= uint64_t slba, =20 ret =3D bdrv_block_status(bs, offset, bytes, &pnum, NULL, NULL); if (ret < 0) { - error_setg_errno(&local_err, -ret, "unable to get block status= "); - error_report_err(local_err); - - return NVME_INTERNAL_DEV_ERROR; + return ret; } =20 - zeroed =3D !!(ret & BDRV_BLOCK_ZERO); =20 - trace_pci_nvme_block_status(offset, bytes, pnum, ret, zeroed); + trace_pci_nvme_block_status(offset, bytes, pnum, ret, + !!(ret & BDRV_BLOCK_ZERO)); =20 - if (zeroed) { - return NVME_DULB; + if (!(ret & flags)) { + return 1; } =20 offset +=3D pnum; } while (pnum !=3D bytes); =20 + return 0; +} + +static uint16_t nvme_check_dulbe(NvmeNamespace *ns, uint64_t slba, + uint32_t nlb) +{ + int ret; + Error *err =3D NULL; + + ret =3D nvme_block_status_all(ns, slba, nlb, BDRV_BLOCK_DATA); + if (ret) { + if (ret < 0) { + error_setg_errno(&err, -ret, "unable to get block status"); + error_report_err(err); + + return NVME_INTERNAL_DEV_ERROR; + } + + return NVME_DULB; + } + return NVME_SUCCESS; } =20 --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623957117225239.24653857884607; Thu, 17 Jun 2021 12:11:57 -0700 (PDT) Received: from localhost ([::1]:42214 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxQh-0006Bd-Sn for importer@patchew.org; Thu, 17 Jun 2021 15:11:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56320) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM6-0002T4-I2; Thu, 17 Jun 2021 15:07:10 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:55351) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM4-0002yH-Dm; Thu, 17 Jun 2021 15:07:10 -0400 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 6B7115C012C; Thu, 17 Jun 2021 15:07:07 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Thu, 17 Jun 2021 15:07:07 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:05 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=y23M1K/vEcpTY tesj5qY5iTXz3ROlf8z0rNDeMEOuFo=; b=YJbWLpehy3zzncYDdyXfek2JWt5ra bd1H88GV0lnPnYo/9BIGfiF2u+YQaFqpKhXUg0CRZOEajGTiRurmhNBn0vC6eTtH Facf3p2EkZD9pXuko35y9G7O5RCTGxYQQi/Q4T3UuMB0qvJ0jS/4WQih6dzo+zHn 9SRTgp9A6VV6fJFyR3ba4f/yF9R9WJvg3EookXxBwjRZPjdlRq3iPGrjkFAaLYDF ROsvjdccRB4nlq4Amd52etBbJiZel9otlch/BMYdd3YkJQBvAQ5n24wZaHJ45zvK v8eFf6pCiL4tPahkvi4bcahjum5fjERxscb2EnOBoI5bnhq76gpTzVhEw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=y23M1K/vEcpTYtesj5qY5iTXz3ROlf8z0rNDeMEOuFo=; b=XKvFpbpZ 4IR7MLkzWDTBRDWcxSE2ub/TYxgyt7eClwmrM+oQi8FBYUXI82qkezxTynhNg7gs JLQ1V/2I/ESlXXYGsvrxu3dT9ogNUlXIJQtM17PMJMJZKVnwsXSzjJLAXgf9DUoS 8PB+dMpRNxFDPrlYS5TI78IM17IYaVLqkWHws6GB6uHtXV16uJAyOyeonGqugiOY mQY5tQ6PD7RJXYEjQChi+1/xpMOFUGBOpAkdVAj258Enkx45OD1Hq7IZx9x2aeJh c4YUAhgzUngI8uqTEky4aBzZIeUdxKLG/PSQd2SzS0KZCc5mb3LfI/U4n9rEiDmt ydC9FpVLzPBOYw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 03/11] hw/nvme: reimplement dsm to allow cancellation Date: Thu, 17 Jun 2021 21:06:49 +0200 Message-Id: <20210617190657.110823-4-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Prior to this patch, a loop was used to issue multiple "fire and forget" aios for each range in the command. Without a reference to the aiocb returned from the blk_aio_pdiscard calls, the aios cannot be canceled. Fix this by processing the ranges one after another. As a bonus, this fixes how metadata is cleared (i.e. we only zero it out if the data was succesfully discarded). Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/ctrl.c | 233 +++++++++++++++++++++++++++++-------------- hw/nvme/trace-events | 4 +- 2 files changed, 162 insertions(+), 75 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 2e36349ced28..1626ed29c76b 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -2015,26 +2015,6 @@ out: nvme_verify_cb(ctx, ret); } =20 -static void nvme_aio_discard_cb(void *opaque, int ret) -{ - NvmeRequest *req =3D opaque; - uintptr_t *discards =3D (uintptr_t *)&req->opaque; - - trace_pci_nvme_aio_discard_cb(nvme_cid(req)); - - if (ret) { - nvme_aio_err(req, ret); - } - - (*discards)--; - - if (*discards) { - return; - } - - nvme_enqueue_req_completion(nvme_cq(req), req); -} - struct nvme_zone_reset_ctx { NvmeRequest *req; NvmeZone *zone; @@ -2495,75 +2475,182 @@ out: nvme_enqueue_req_completion(nvme_cq(req), req); } =20 +typedef struct NvmeDSMAIOCB { + BlockAIOCB common; + BlockAIOCB *aiocb; + NvmeRequest *req; + QEMUBH *bh; + int ret; + + NvmeDsmRange *range; + unsigned int nr; + unsigned int idx; +} NvmeDSMAIOCB; + +static void nvme_dsm_cancel(BlockAIOCB *aiocb) +{ + NvmeDSMAIOCB *iocb =3D container_of(aiocb, NvmeDSMAIOCB, common); + + /* break nvme_dsm_cb loop */ + iocb->idx =3D iocb->nr; + iocb->ret =3D -ECANCELED; + + if (iocb->aiocb) { + blk_aio_cancel_async(iocb->aiocb); + iocb->aiocb =3D NULL; + } else { + /* + * We only reach this if nvme_dsm_cancel() has already been called= or + * the command ran to completion and nvme_dsm_bh is scheduled to r= un. + */ + assert(iocb->idx =3D=3D iocb->nr); + } +} + +static const AIOCBInfo nvme_dsm_aiocb_info =3D { + .aiocb_size =3D sizeof(NvmeDSMAIOCB), + .cancel_async =3D nvme_dsm_cancel, +}; + +static void nvme_dsm_bh(void *opaque) +{ + NvmeDSMAIOCB *iocb =3D opaque; + + iocb->common.cb(iocb->common.opaque, iocb->ret); + + qemu_bh_delete(iocb->bh); + iocb->bh =3D NULL; + qemu_aio_unref(iocb); +} + +static void nvme_dsm_cb(void *opaque, int ret); + +static void nvme_dsm_md_cb(void *opaque, int ret) +{ + NvmeDSMAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + NvmeDsmRange *range; + uint64_t slba; + uint32_t nlb; + + if (ret < 0) { + iocb->ret =3D ret; + goto done; + } + + if (!ns->lbaf.ms) { + nvme_dsm_cb(iocb, 0); + return; + } + + range =3D &iocb->range[iocb->idx - 1]; + slba =3D le64_to_cpu(range->slba); + nlb =3D le32_to_cpu(range->nlb); + + /* + * Check that all block were discarded (zeroed); otherwise we do not z= ero + * the metadata. + */ + + ret =3D nvme_block_status_all(ns, slba, nlb, BDRV_BLOCK_ZERO); + if (ret) { + if (ret < 0) { + iocb->ret =3D ret; + goto done; + } + + nvme_dsm_cb(iocb, 0); + } + + iocb->aiocb =3D blk_aio_pwrite_zeroes(ns->blkconf.blk, nvme_moff(ns, s= lba), + nvme_m2b(ns, nlb), BDRV_REQ_MAY_UN= MAP, + nvme_dsm_cb, iocb); + return; + +done: + iocb->aiocb =3D NULL; + qemu_bh_schedule(iocb->bh); +} + +static void nvme_dsm_cb(void *opaque, int ret) +{ + NvmeDSMAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeCtrl *n =3D nvme_ctrl(req); + NvmeNamespace *ns =3D req->ns; + NvmeDsmRange *range; + uint64_t slba; + uint32_t nlb; + + if (ret < 0) { + iocb->ret =3D ret; + goto done; + } + +next: + if (iocb->idx =3D=3D iocb->nr) { + goto done; + } + + range =3D &iocb->range[iocb->idx++]; + slba =3D le64_to_cpu(range->slba); + nlb =3D le32_to_cpu(range->nlb); + + trace_pci_nvme_dsm_deallocate(slba, nlb); + + if (nlb > n->dmrsl) { + trace_pci_nvme_dsm_single_range_limit_exceeded(nlb, n->dmrsl); + goto next; + } + + if (nvme_check_bounds(ns, slba, nlb)) { + trace_pci_nvme_err_invalid_lba_range(slba, nlb, + ns->id_ns.nsze); + goto next; + } + + iocb->aiocb =3D blk_aio_pdiscard(ns->blkconf.blk, nvme_l2b(ns, slba), + nvme_l2b(ns, nlb), + nvme_dsm_md_cb, iocb); + return; + +done: + iocb->aiocb =3D NULL; + qemu_bh_schedule(iocb->bh); +} + static uint16_t nvme_dsm(NvmeCtrl *n, NvmeRequest *req) { NvmeNamespace *ns =3D req->ns; NvmeDsmCmd *dsm =3D (NvmeDsmCmd *) &req->cmd; - uint32_t attr =3D le32_to_cpu(dsm->attributes); uint32_t nr =3D (le32_to_cpu(dsm->nr) & 0xff) + 1; - uint16_t status =3D NVME_SUCCESS; =20 - trace_pci_nvme_dsm(nvme_cid(req), nvme_nsid(ns), nr, attr); + trace_pci_nvme_dsm(nr, attr); =20 if (attr & NVME_DSMGMT_AD) { - int64_t offset; - size_t len; - NvmeDsmRange range[nr]; - uintptr_t *discards =3D (uintptr_t *)&req->opaque; + NvmeDSMAIOCB *iocb =3D blk_aio_get(&nvme_dsm_aiocb_info, ns->blkco= nf.blk, + nvme_misc_cb, req); =20 - status =3D nvme_h2c(n, (uint8_t *)range, sizeof(range), req); + iocb->req =3D req; + iocb->bh =3D qemu_bh_new(nvme_dsm_bh, iocb); + iocb->ret =3D 0; + iocb->range =3D g_new(NvmeDsmRange, nr); + iocb->nr =3D nr; + iocb->idx =3D 0; + + status =3D nvme_h2c(n, (uint8_t *)iocb->range, sizeof(NvmeDsmRange= ) * nr, + req); if (status) { return status; } =20 - /* - * AIO callbacks may be called immediately, so initialize discards= to 1 - * to make sure the the callback does not complete the request bef= ore - * all discards have been issued. - */ - *discards =3D 1; + req->aiocb =3D &iocb->common; + nvme_dsm_cb(iocb, 0); =20 - for (int i =3D 0; i < nr; i++) { - uint64_t slba =3D le64_to_cpu(range[i].slba); - uint32_t nlb =3D le32_to_cpu(range[i].nlb); - - if (nvme_check_bounds(ns, slba, nlb)) { - continue; - } - - trace_pci_nvme_dsm_deallocate(nvme_cid(req), nvme_nsid(ns), sl= ba, - nlb); - - if (nlb > n->dmrsl) { - trace_pci_nvme_dsm_single_range_limit_exceeded(nlb, n->dmr= sl); - } - - offset =3D nvme_l2b(ns, slba); - len =3D nvme_l2b(ns, nlb); - - while (len) { - size_t bytes =3D MIN(BDRV_REQUEST_MAX_BYTES, len); - - (*discards)++; - - blk_aio_pdiscard(ns->blkconf.blk, offset, bytes, - nvme_aio_discard_cb, req); - - offset +=3D bytes; - len -=3D bytes; - } - } - - /* account for the 1-initialization */ - (*discards)--; - - if (*discards) { - status =3D NVME_NO_COMPLETE; - } else { - status =3D req->status; - } + return NVME_NO_COMPLETE; } =20 return status; diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events index ce6b6ffe9604..eea4e31e46c4 100644 --- a/hw/nvme/trace-events +++ b/hw/nvme/trace-events @@ -37,8 +37,8 @@ pci_nvme_verify_mdata_in_cb(uint16_t cid, const char *blk= name) "cid %"PRIu16" bl pci_nvme_verify_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t= appmask, uint32_t reftag) "cid %"PRIu16" prinfo 0x%"PRIx8" apptag 0x%"PRIx= 16" appmask 0x%"PRIx16" reftag 0x%"PRIx32"" pci_nvme_rw_complete_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" = blk '%s'" pci_nvme_block_status(int64_t offset, int64_t bytes, int64_t pnum, int ret= , bool zeroed) "offset %"PRId64" bytes %"PRId64" pnum %"PRId64" ret 0x%x ze= roed %d" -pci_nvme_dsm(uint16_t cid, uint32_t nsid, uint32_t nr, uint32_t attr) "cid= %"PRIu16" nsid %"PRIu32" nr %"PRIu32" attr 0x%"PRIx32"" -pci_nvme_dsm_deallocate(uint16_t cid, uint32_t nsid, uint64_t slba, uint32= _t nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32"" +pci_nvme_dsm(uint32_t nr, uint32_t attr) "nr %"PRIu32" attr 0x%"PRIx32"" +pci_nvme_dsm_deallocate(uint64_t slba, uint32_t nlb) "slba %"PRIu64" nlb %= "PRIu32"" pci_nvme_dsm_single_range_limit_exceeded(uint32_t nlb, uint32_t dmrsl) "nl= b %"PRIu32" dmrsl %"PRIu32"" pci_nvme_compare(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb)= "cid %"PRIu16" nsid %"PRIu32" slba 0x%"PRIx64" nlb %"PRIu32"" pci_nvme_compare_data_cb(uint16_t cid) "cid %"PRIu16"" --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623957087579184.6378767208015; Thu, 17 Jun 2021 12:11:27 -0700 (PDT) Received: from localhost ([::1]:41472 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxQD-0005gB-DH for importer@patchew.org; Thu, 17 Jun 2021 15:11:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56328) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM7-0002US-MR; Thu, 17 Jun 2021 15:07:11 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:47775) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM5-0002z3-Qz; Thu, 17 Jun 2021 15:07:11 -0400 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 16F525C0068; Thu, 17 Jun 2021 15:07:09 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Thu, 17 Jun 2021 15:07:09 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:07 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=aDPLd5TEatCw9 8zj81ftVJGBolGT3X2yh8jIBw6I3GQ=; b=ZAKestVkpOsw+t9/nNMcXHRa6Sd73 5oTF8B38vK/nx9TTP7vWKO9cq3HoNvuG0sdE5wA0zLjth2eShiN7FwGP9Ko9jRc0 7MDtFQBI3v2I8JhwmpTvZ0Wl1I8hIk5dzc7XfNPnqqUsISQL3KcnubDZOsj5EPj/ p6Mkzkti+nxX/J2FVKcoTylv2YNCMnQ6bFVf+iFN0/uGHdG4Cg6+1DwyR/RbpBhw ctK1B1OpA1e6HZUTWXggRum3UZHVFmN2Dwh4tWqnGnPj5p3k8L+tBY6ma5G6lgZs 9yBBcpfkRO3yjvkZ2b2BWYKDMY7UbWr+ihPm1gILGGia2Hh3ePVYMVVNg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=aDPLd5TEatCw98zj81ftVJGBolGT3X2yh8jIBw6I3GQ=; b=YVRWbHGL 7DaUUxGI1rdzqhy/DWmb7MSKkqC2ovqUzsoOL/85DbCX42JWKduKKk7k/qbhXZb3 w68+/nxm5dSrhpLTQQIbjRxTIt5i4nQJ9+TTMFtT+9OiK5iL9u5DZFFy8gYyRrl7 YVcLB9MNy9NTE5VaLpBsxSdrJF7jgf+FbD4t74Mn8sTrXO/m7mg7qdMt5afpOfCU 16nTaOlAFeUt4il3UiAg3u6t6m9C43ohUqRIMZmuhk9evZB3XP6BgF42ibsRe6+t FFSBl7l2Gu95l5Tv1ipFZegRZ0G3Xl9wI447wxEiG7/gfMFFPft3JlRPP/em07aZ A3+W1UjkaiphxQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 04/11] hw/nvme: save reftag when generating pi Date: Thu, 17 Jun 2021 21:06:50 +0200 Message-Id: <20210617190657.110823-5-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Prepare nvme_dif_pract_generate_dif() and nvme_dif_check() to be callable in smaller increments by making the reftag a pointer parameter updated by the function. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/nvme.h | 4 ++-- hw/nvme/ctrl.c | 10 +++++----- hw/nvme/dif.c | 22 +++++++++++----------- 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h index 19376570c91e..6e43f3f3d128 100644 --- a/hw/nvme/nvme.h +++ b/hw/nvme/nvme.h @@ -539,11 +539,11 @@ uint16_t nvme_dif_mangle_mdata(NvmeNamespace *ns, uin= t8_t *mbuf, size_t mlen, uint64_t slba); void nvme_dif_pract_generate_dif(NvmeNamespace *ns, uint8_t *buf, size_t l= en, uint8_t *mbuf, size_t mlen, uint16_t appt= ag, - uint32_t reftag); + uint32_t *reftag); uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len, uint8_t *mbuf, size_t mlen, uint16_t ctrl, uint64_t slba, uint16_t apptag, - uint16_t appmask, uint32_t reftag); + uint16_t appmask, uint32_t *reftag); uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req); =20 =20 diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 1626ed29c76b..07e40107e86b 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -1968,7 +1968,7 @@ static void nvme_verify_cb(void *opaque, int ret) =20 req->status =3D nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov= .size, ctx->mdata.bounce, ctx->mdata.iov.siz= e, - ctrl, slba, apptag, appmask, reftag); + ctrl, slba, apptag, appmask, &reftag); } =20 out: @@ -2204,7 +2204,7 @@ static void nvme_copy_in_complete(NvmeRequest *req) reftag =3D le32_to_cpu(range->reftag); =20 status =3D nvme_dif_check(ns, buf, len, mbuf, mlen, prinfor, s= lba, - apptag, appmask, reftag); + apptag, appmask, &reftag); if (status) { goto invalid; } @@ -2227,10 +2227,10 @@ static void nvme_copy_in_complete(NvmeRequest *req) } =20 nvme_dif_pract_generate_dif(ns, ctx->bounce, len, ctx->mbounce, - mlen, apptag, reftag); + mlen, apptag, &reftag); } else { status =3D nvme_dif_check(ns, ctx->bounce, len, ctx->mbounce, = mlen, - prinfow, sdlba, apptag, appmask, refta= g); + prinfow, sdlba, apptag, appmask, &reft= ag); if (status) { goto invalid; } @@ -2370,7 +2370,7 @@ static void nvme_compare_mdata_cb(void *opaque, int r= et) =20 status =3D nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size, ctx->mdata.bounce, ctx->mdata.iov.size, ct= rl, - slba, apptag, appmask, reftag); + slba, apptag, appmask, &reftag); if (status) { req->status =3D status; goto out; diff --git a/hw/nvme/dif.c b/hw/nvme/dif.c index 88efcbe9bd60..f5f86f1c26ad 100644 --- a/hw/nvme/dif.c +++ b/hw/nvme/dif.c @@ -41,7 +41,7 @@ static uint16_t crc_t10dif(uint16_t crc, const unsigned c= har *buffer, =20 void nvme_dif_pract_generate_dif(NvmeNamespace *ns, uint8_t *buf, size_t l= en, uint8_t *mbuf, size_t mlen, uint16_t appt= ag, - uint32_t reftag) + uint32_t *reftag) { uint8_t *end =3D buf + len; int16_t pil =3D 0; @@ -51,7 +51,7 @@ void nvme_dif_pract_generate_dif(NvmeNamespace *ns, uint8= _t *buf, size_t len, } =20 trace_pci_nvme_dif_pract_generate_dif(len, ns->lbasz, ns->lbasz + pil, - apptag, reftag); + apptag, *reftag); =20 for (; buf < end; buf +=3D ns->lbasz, mbuf +=3D ns->lbaf.ms) { NvmeDifTuple *dif =3D (NvmeDifTuple *)(mbuf + pil); @@ -63,10 +63,10 @@ void nvme_dif_pract_generate_dif(NvmeNamespace *ns, uin= t8_t *buf, size_t len, =20 dif->guard =3D cpu_to_be16(crc); dif->apptag =3D cpu_to_be16(apptag); - dif->reftag =3D cpu_to_be32(reftag); + dif->reftag =3D cpu_to_be32(*reftag); =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) !=3D NVME_ID_NS_DPS_TYPE_3)= { - reftag++; + (*reftag)++; } } } @@ -132,13 +132,13 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, Nvm= eDifTuple *dif, uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len, uint8_t *mbuf, size_t mlen, uint16_t ctrl, uint64_t slba, uint16_t apptag, - uint16_t appmask, uint32_t reftag) + uint16_t appmask, uint32_t *reftag) { uint8_t *end =3D buf + len; int16_t pil =3D 0; uint16_t status; =20 - status =3D nvme_check_prinfo(ns, ctrl, slba, reftag); + status =3D nvme_check_prinfo(ns, ctrl, slba, *reftag); if (status) { return status; } @@ -153,13 +153,13 @@ uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *b= uf, size_t len, NvmeDifTuple *dif =3D (NvmeDifTuple *)(mbuf + pil); =20 status =3D nvme_dif_prchk(ns, dif, buf, mbuf, pil, ctrl, apptag, - appmask, reftag); + appmask, *reftag); if (status) { return status; } =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) !=3D NVME_ID_NS_DPS_TYPE_3)= { - reftag++; + (*reftag)++; } } =20 @@ -270,7 +270,7 @@ static void nvme_dif_rw_check_cb(void *opaque, int ret) =20 status =3D nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size, ctx->mdata.bounce, ctx->mdata.iov.size, ctrl, - slba, apptag, appmask, reftag); + slba, apptag, appmask, &reftag); if (status) { req->status =3D status; goto out; @@ -478,11 +478,11 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req) /* splice generated protection information into the buffer */ nvme_dif_pract_generate_dif(ns, ctx->data.bounce, ctx->data.iov.si= ze, ctx->mdata.bounce, ctx->mdata.iov.size, - apptag, reftag); + apptag, &reftag); } else { status =3D nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size, ctx->mdata.bounce, ctx->mdata.iov.size, ct= rl, - slba, apptag, appmask, reftag); + slba, apptag, appmask, &reftag); if (status) { goto err; } --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623957596264700.4853991479828; Thu, 17 Jun 2021 12:19:56 -0700 (PDT) Received: from localhost ([::1]:51452 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxYQ-0004B3-4d for importer@patchew.org; Thu, 17 Jun 2021 15:19:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56346) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM9-0002YK-Qw; Thu, 17 Jun 2021 15:07:13 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:40967) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxM8-000312-7l; Thu, 17 Jun 2021 15:07:13 -0400 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 7A5B55C016D; Thu, 17 Jun 2021 15:07:11 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Thu, 17 Jun 2021 15:07:11 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:09 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=X2URhhTEc9V3u IEpB3rSnGjo6T7Vo1A6SEUWGiaFDCA=; b=EX94f2tP/K9/2x2tmwuDphqmVEytP Zh6OYzigf96thhpCJWUWrtAO7cQikESIcs6WKoThDAxBXtwznE1ZcVioS3/5OxJA ZcNIFDsOP7XAgriP1amWQOefKfhmAT/1ukKKSsiilcLiNqwr9AT1Y2jLu3IOuIFV RExBVVh7d8HBxw2hv1gy8iXulM2uRBkozVzI94/Ik28WzfhyJbJXGrkAnz/2tuck pXZjwesNDiUeoYW35oV7Z9wvlEhOUZz5xa/OlAAOyg/buZV/ggqxbEDAGwpNW1Xr fW/qkJrp+HmeE/YTvNvqTYbcakojEDh9wwgPx3BW/xMZb7LI+Xb8h7NEA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=X2URhhTEc9V3uIEpB3rSnGjo6T7Vo1A6SEUWGiaFDCA=; b=L7LVFklc +hKf5XrqFed134f0+2u42pHmpK/34R7t9R3Hrl+Vbns3pocveZTgz+Mh6TDlQZSh O9HC6wNmDhNLbiz/nIAv8d+FJMYVFlgNNpMza6RUGCaE14fAGJ61VHaTgbZMXf5B FXrWli5oehgR18LNyHYkBBQ9xrHE2u3IdI/JdvG5QnZY0GfWud2+ygt6wMwOzh+3 J9Xqe/OeIlYnrkS6oqT+v58FkeJz/MWj0hdcuj3raejwczDw010E/11usMs0BBUn +1+WQRHLgzjtiRI9IzT/oJHqRBzlpE6bRH+RdfdUSKNoBBUEwo/FOKjUURuuMqSH 0hrJ8bRWTk/+zQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 05/11] hw/nvme: remove assert from nvme_get_zone_by_slba Date: Thu, 17 Jun 2021 21:06:51 +0200 Message-Id: <20210617190657.110823-6-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Make nvme_get_zone_by_slba() return NULL if the slba is out of range. This allows the function to be used without guarding the call with a call to nvme_check_bounds(), in preparation for the next patch. Add asserts after calling nvme_get_zone_by_slba() instead. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/ctrl.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 07e40107e86b..f1a36c2052d0 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -1542,7 +1542,10 @@ static inline NvmeZone *nvme_get_zone_by_slba(NvmeNa= mespace *ns, uint64_t slba) { uint32_t zone_idx =3D nvme_zone_idx(ns, slba); =20 - assert(zone_idx < ns->num_zones); + if (zone_idx >=3D ns->num_zones) { + return NULL; + } + return &ns->zone_array[zone_idx]; } =20 @@ -1619,11 +1622,16 @@ static uint16_t nvme_check_zone_state_for_read(Nvme= Zone *zone) static uint16_t nvme_check_zone_read(NvmeNamespace *ns, uint64_t slba, uint32_t nlb) { - NvmeZone *zone =3D nvme_get_zone_by_slba(ns, slba); - uint64_t bndry =3D nvme_zone_rd_boundary(ns, zone); - uint64_t end =3D slba + nlb; + NvmeZone *zone; + uint64_t bndry, end; uint16_t status; =20 + zone =3D nvme_get_zone_by_slba(ns, slba); + assert(zone); + + bndry =3D nvme_zone_rd_boundary(ns, zone); + end =3D slba + nlb; + status =3D nvme_check_zone_state_for_read(zone); if (status) { ; @@ -1790,6 +1798,7 @@ static void nvme_finalize_zoned_write(NvmeNamespace *= ns, NvmeRequest *req) slba =3D le64_to_cpu(rw->slba); nlb =3D le16_to_cpu(rw->nlb) + 1; zone =3D nvme_get_zone_by_slba(ns, slba); + assert(zone); =20 nvme_advance_zone_wp(ns, zone, nlb); } @@ -3186,6 +3195,7 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeReques= t *req, bool append, =20 if (ns->params.zoned) { zone =3D nvme_get_zone_by_slba(ns, slba); + assert(zone); =20 if (append) { bool piremap =3D !!(ctrl & NVME_RW_PIREMAP); --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623958325185523.6588113868569; Thu, 17 Jun 2021 12:32:05 -0700 (PDT) Received: from localhost ([::1]:49910 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxkB-0005tM-Sr for importer@patchew.org; Thu, 17 Jun 2021 15:32:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56376) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMD-0002dW-9z; Thu, 17 Jun 2021 15:07:17 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:35023) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMA-00033B-Ll; Thu, 17 Jun 2021 15:07:17 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id EFC465C00B3; Thu, 17 Jun 2021 15:07:13 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 17 Jun 2021 15:07:13 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:11 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=9rV8BYnmjySYc W66KzGk6JYbFZ1NWM3oGO+fhml+9eE=; b=LUaLEWSbO29XA6O/lSL4R2/Mx4nzG E3nHKe2RlwqFdZHXhydKVt74OU/4HT/1SVaNSvpHM3/DTCI61fqV/d1QSyXXv/al 9mm0GEssokF3VWMDOxBGEHCsCXc1uOqGPu1lkif6V9NkWfFoUwgY3KVQOiPKgkUY DCcRirC/ygumwWcL8bB5G2O6nTR9XqlbUeBzKSfBHoavGrBl8LDtN2YcvSAz8lx/ QskVoj11i8OcFgxHsWtup/B/nsQGDhCPuaQrXzbQ+pRgBU7Om2Dv6nPKzmAHDN+a k6uxHychoZAxnCNL3Ei4b1WGTXTN9oix9gv9RQQLaFC2MfLU/xllby2Rw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=9rV8BYnmjySYcW66KzGk6JYbFZ1NWM3oGO+fhml+9eE=; b=u6gWQgs9 tblzvTBSd2tIizLKJCF6GWOQL18qJY+hmUii0icgBVoR2tzXGYKDiTvl5J01SqGt 2MNk7u7MZttMSTfRHJtxfIxR+rqP7nRqtow9M5Uj+ULb1UaWuHE/xPEtciKGTGIl LBD2G7AFlSncTQISEZvNRON+i8+BdRg4rPs9OoAPkpU3pyVPKl8YSTO+IPoKotXh uZQc0H2lfleYRXmrIPdCYkAsGK89QiI8lPMXaF62LhPkKNkSfMVwWugFHAfHH/Da yGv+XiksTTug+roNQ1yzmO8nC/okk/EUhUCS1ipLsTFWzeInWTXcchdcRxqcVqcH oe/FRovVTcXxsw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 06/11] hw/nvme: use prinfo directly in nvme_check_prinfo and nvme_dif_check Date: Thu, 17 Jun 2021 21:06:52 +0200 Message-Id: <20210617190657.110823-7-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen The nvme_check_prinfo() and nvme_dif_check() functions operate on the 16 bit "control" member of the NvmeCmd. These functions do not otherwise operate on an NvmeCmd or an NvmeRequest, so change them to expect the actual 4 bit PRINFO field and add constants that work on this field as well. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/nvme.h | 4 +-- include/block/nvme.h | 8 ++++++ hw/nvme/ctrl.c | 67 +++++++++++++++++--------------------------- hw/nvme/dif.c | 44 ++++++++++++++--------------- 4 files changed, 57 insertions(+), 66 deletions(-) diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h index 6e43f3f3d128..7491157f56f6 100644 --- a/hw/nvme/nvme.h +++ b/hw/nvme/nvme.h @@ -533,7 +533,7 @@ static const uint16_t t10_dif_crc_table[256] =3D { 0xF0D8, 0x7B6F, 0x6C01, 0xE7B6, 0x42DD, 0xC96A, 0xDE04, 0x55B3 }; =20 -uint16_t nvme_check_prinfo(NvmeNamespace *ns, uint16_t ctrl, uint64_t slba, +uint16_t nvme_check_prinfo(NvmeNamespace *ns, uint8_t prinfo, uint64_t slb= a, uint32_t reftag); uint16_t nvme_dif_mangle_mdata(NvmeNamespace *ns, uint8_t *mbuf, size_t ml= en, uint64_t slba); @@ -541,7 +541,7 @@ void nvme_dif_pract_generate_dif(NvmeNamespace *ns, uin= t8_t *buf, size_t len, uint8_t *mbuf, size_t mlen, uint16_t appt= ag, uint32_t *reftag); uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len, - uint8_t *mbuf, size_t mlen, uint16_t ctrl, + uint8_t *mbuf, size_t mlen, uint8_t prinfo, uint64_t slba, uint16_t apptag, uint16_t appmask, uint32_t *reftag); uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req); diff --git a/include/block/nvme.h b/include/block/nvme.h index 333affdb8534..0fabe28b7bdd 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -708,6 +708,14 @@ enum { =20 #define NVME_RW_PRINFO(control) ((control >> 10) & 0xf) =20 +enum { + NVME_PRINFO_PRACT =3D 1 << 3, + NVME_PRINFO_PRCHK_GUARD =3D 1 << 2, + NVME_PRINFO_PRCHK_APP =3D 1 << 1, + NVME_PRINFO_PRCHK_REF =3D 1 << 0, + NVME_PRINFO_PRCHK_MASK =3D 7 << 0, +}; + typedef struct QEMU_PACKED NvmeDsmCmd { uint8_t opcode; uint8_t flags; diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index f1a36c2052d0..aca6cf068e2b 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -1010,16 +1010,12 @@ static uint16_t nvme_map_data(NvmeCtrl *n, uint32_t= nlb, NvmeRequest *req) { NvmeNamespace *ns =3D req->ns; NvmeRwCmd *rw =3D (NvmeRwCmd *)&req->cmd; - uint16_t ctrl =3D le16_to_cpu(rw->control); + bool pi =3D !!NVME_ID_NS_DPS_TYPE(ns->id_ns.dps); + bool pract =3D !!(le16_to_cpu(rw->control) & NVME_RW_PRINFO_PRACT); size_t len =3D nvme_l2b(ns, nlb); uint16_t status; =20 - if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) && - (ctrl & NVME_RW_PRINFO_PRACT && ns->lbaf.ms =3D=3D 8)) { - goto out; - } - - if (nvme_ns_ext(ns)) { + if (nvme_ns_ext(ns) && !(pi && pract && ns->lbaf.ms =3D=3D 8)) { NvmeSg sg; =20 len +=3D nvme_m2b(ns, nlb); @@ -1036,7 +1032,6 @@ static uint16_t nvme_map_data(NvmeCtrl *n, uint32_t n= lb, NvmeRequest *req) return NVME_SUCCESS; } =20 -out: return nvme_map_dptr(n, &req->sg, len, &req->cmd); } =20 @@ -1195,10 +1190,10 @@ uint16_t nvme_bounce_data(NvmeCtrl *n, uint8_t *ptr= , uint32_t len, { NvmeNamespace *ns =3D req->ns; NvmeRwCmd *rw =3D (NvmeRwCmd *)&req->cmd; - uint16_t ctrl =3D le16_to_cpu(rw->control); + bool pi =3D !!NVME_ID_NS_DPS_TYPE(ns->id_ns.dps); + bool pract =3D !!(le16_to_cpu(rw->control) & NVME_RW_PRINFO_PRACT); =20 - if (nvme_ns_ext(ns) && - !(ctrl & NVME_RW_PRINFO_PRACT && ns->lbaf.ms =3D=3D 8)) { + if (nvme_ns_ext(ns) && !(pi && pract && ns->lbaf.ms =3D=3D 8)) { return nvme_tx_interleaved(n, &req->sg, ptr, len, ns->lbasz, ns->lbaf.ms, 0, dir); } @@ -1950,14 +1945,13 @@ static void nvme_verify_cb(void *opaque, int ret) BlockAcctStats *stats =3D blk_get_stats(blk); NvmeRwCmd *rw =3D (NvmeRwCmd *)&req->cmd; uint64_t slba =3D le64_to_cpu(rw->slba); - uint16_t ctrl =3D le16_to_cpu(rw->control); + uint8_t prinfo =3D NVME_RW_PRINFO(le16_to_cpu(rw->control)); uint16_t apptag =3D le16_to_cpu(rw->apptag); uint16_t appmask =3D le16_to_cpu(rw->appmask); uint32_t reftag =3D le32_to_cpu(rw->reftag); uint16_t status; =20 - trace_pci_nvme_verify_cb(nvme_cid(req), NVME_RW_PRINFO(ctrl), apptag, - appmask, reftag); + trace_pci_nvme_verify_cb(nvme_cid(req), prinfo, apptag, appmask, refta= g); =20 if (ret) { block_acct_failed(stats, acct); @@ -1977,7 +1971,7 @@ static void nvme_verify_cb(void *opaque, int ret) =20 req->status =3D nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov= .size, ctx->mdata.bounce, ctx->mdata.iov.siz= e, - ctrl, slba, apptag, appmask, &reftag); + prinfo, slba, apptag, appmask, &refta= g); } =20 out: @@ -2183,8 +2177,8 @@ static void nvme_copy_in_complete(NvmeRequest *req) block_acct_done(blk_get_stats(ns->blkconf.blk), &req->acct); =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { - uint16_t prinfor =3D (copy->control[0] >> 4) & 0xf; - uint16_t prinfow =3D (copy->control[2] >> 2) & 0xf; + uint8_t prinfor =3D (copy->control[0] >> 4) & 0xf; + uint8_t prinfow =3D (copy->control[2] >> 2) & 0xf; uint16_t nr =3D copy->nr + 1; NvmeCopySourceRange *range; uint64_t slba; @@ -2195,13 +2189,6 @@ static void nvme_copy_in_complete(NvmeRequest *req) size_t len, mlen; int i; =20 - /* - * The dif helpers expects prinfo to be similar to the control fie= ld of - * the NvmeRwCmd, so shift by 10 to fake it. - */ - prinfor =3D prinfor << 10; - prinfow =3D prinfow << 10; - for (i =3D 0; i < nr; i++) { range =3D &ctx->ranges[i]; slba =3D le64_to_cpu(range->slba); @@ -2342,7 +2329,7 @@ static void nvme_compare_mdata_cb(void *opaque, int r= et) NvmeNamespace *ns =3D req->ns; NvmeCtrl *n =3D nvme_ctrl(req); NvmeRwCmd *rw =3D (NvmeRwCmd *)&req->cmd; - uint16_t ctrl =3D le16_to_cpu(rw->control); + uint8_t prinfo =3D NVME_RW_PRINFO(le16_to_cpu(rw->control)); uint16_t apptag =3D le16_to_cpu(rw->apptag); uint16_t appmask =3D le16_to_cpu(rw->appmask); uint32_t reftag =3D le32_to_cpu(rw->reftag); @@ -2378,7 +2365,7 @@ static void nvme_compare_mdata_cb(void *opaque, int r= et) int16_t pil =3D 0; =20 status =3D nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size, - ctx->mdata.bounce, ctx->mdata.iov.size, ct= rl, + ctx->mdata.bounce, ctx->mdata.iov.size, pr= info, slba, apptag, appmask, &reftag); if (status) { req->status =3D status; @@ -2674,7 +2661,7 @@ static uint16_t nvme_verify(NvmeCtrl *n, NvmeRequest = *req) uint32_t nlb =3D le16_to_cpu(rw->nlb) + 1; size_t len =3D nvme_l2b(ns, nlb); int64_t offset =3D nvme_l2b(ns, slba); - uint16_t ctrl =3D le16_to_cpu(rw->control); + uint8_t prinfo =3D NVME_RW_PRINFO(le16_to_cpu(rw->control)); uint32_t reftag =3D le32_to_cpu(rw->reftag); NvmeBounceContext *ctx =3D NULL; uint16_t status; @@ -2682,12 +2669,12 @@ static uint16_t nvme_verify(NvmeCtrl *n, NvmeReques= t *req) trace_pci_nvme_verify(nvme_cid(req), nvme_nsid(ns), slba, nlb); =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { - status =3D nvme_check_prinfo(ns, ctrl, slba, reftag); + status =3D nvme_check_prinfo(ns, prinfo, slba, reftag); if (status) { return status; } =20 - if (ctrl & NVME_RW_PRINFO_PRACT) { + if (prinfo & NVME_PRINFO_PRACT) { return NVME_INVALID_PROT_INFO | NVME_DNR; } } @@ -2731,13 +2718,8 @@ static uint16_t nvme_copy(NvmeCtrl *n, NvmeRequest *= req) =20 uint16_t nr =3D copy->nr + 1; uint8_t format =3D copy->control[0] & 0xf; - - /* - * Shift the PRINFOR/PRINFOW values by 10 to allow reusing the - * NVME_RW_PRINFO constants. - */ - uint16_t prinfor =3D ((copy->control[0] >> 4) & 0xf) << 10; - uint16_t prinfow =3D ((copy->control[2] >> 2) & 0xf) << 10; + uint8_t prinfor =3D (copy->control[0] >> 4) & 0xf; + uint8_t prinfow =3D (copy->control[2] >> 2) & 0xf; =20 uint32_t nlb =3D 0; uint8_t *bounce =3D NULL, *bouncep =3D NULL; @@ -2749,7 +2731,7 @@ static uint16_t nvme_copy(NvmeCtrl *n, NvmeRequest *r= eq) trace_pci_nvme_copy(nvme_cid(req), nvme_nsid(ns), nr, format); =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) && - ((prinfor & NVME_RW_PRINFO_PRACT) !=3D (prinfow & NVME_RW_PRINFO_P= RACT))) { + ((prinfor & NVME_PRINFO_PRACT) !=3D (prinfow & NVME_PRINFO_PRACT))= ) { return NVME_INVALID_FIELD | NVME_DNR; } =20 @@ -2886,7 +2868,7 @@ static uint16_t nvme_compare(NvmeCtrl *n, NvmeRequest= *req) BlockBackend *blk =3D ns->blkconf.blk; uint64_t slba =3D le64_to_cpu(rw->slba); uint32_t nlb =3D le16_to_cpu(rw->nlb) + 1; - uint16_t ctrl =3D le16_to_cpu(rw->control); + uint8_t prinfo =3D NVME_RW_PRINFO(le16_to_cpu(rw->control)); size_t data_len =3D nvme_l2b(ns, nlb); size_t len =3D data_len; int64_t offset =3D nvme_l2b(ns, slba); @@ -2895,7 +2877,7 @@ static uint16_t nvme_compare(NvmeCtrl *n, NvmeRequest= *req) =20 trace_pci_nvme_compare(nvme_cid(req), nvme_nsid(ns), slba, nlb); =20 - if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) && (ctrl & NVME_RW_PRINFO_PRACT= )) { + if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) && (prinfo & NVME_PRINFO_PRACT)= ) { return NVME_INVALID_PROT_INFO | NVME_DNR; } =20 @@ -3083,7 +3065,7 @@ static uint16_t nvme_read(NvmeCtrl *n, NvmeRequest *r= eq) NvmeNamespace *ns =3D req->ns; uint64_t slba =3D le64_to_cpu(rw->slba); uint32_t nlb =3D (uint32_t)le16_to_cpu(rw->nlb) + 1; - uint16_t ctrl =3D le16_to_cpu(rw->control); + uint8_t prinfo =3D NVME_RW_PRINFO(le16_to_cpu(rw->control)); uint64_t data_size =3D nvme_l2b(ns, nlb); uint64_t mapped_size =3D data_size; uint64_t data_offset; @@ -3094,7 +3076,7 @@ static uint16_t nvme_read(NvmeCtrl *n, NvmeRequest *r= eq) mapped_size +=3D nvme_m2b(ns, nlb); =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { - bool pract =3D ctrl & NVME_RW_PRINFO_PRACT; + bool pract =3D prinfo & NVME_PRINFO_PRACT; =20 if (pract && ns->lbaf.ms =3D=3D 8) { mapped_size =3D data_size; @@ -3158,6 +3140,7 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeReques= t *req, bool append, uint64_t slba =3D le64_to_cpu(rw->slba); uint32_t nlb =3D (uint32_t)le16_to_cpu(rw->nlb) + 1; uint16_t ctrl =3D le16_to_cpu(rw->control); + uint8_t prinfo =3D NVME_RW_PRINFO(ctrl); uint64_t data_size =3D nvme_l2b(ns, nlb); uint64_t mapped_size =3D data_size; uint64_t data_offset; @@ -3170,7 +3153,7 @@ static uint16_t nvme_do_write(NvmeCtrl *n, NvmeReques= t *req, bool append, mapped_size +=3D nvme_m2b(ns, nlb); =20 if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { - bool pract =3D ctrl & NVME_RW_PRINFO_PRACT; + bool pract =3D prinfo & NVME_PRINFO_PRACT; =20 if (pract && ns->lbaf.ms =3D=3D 8) { mapped_size -=3D nvme_m2b(ns, nlb); diff --git a/hw/nvme/dif.c b/hw/nvme/dif.c index f5f86f1c26ad..5dbd18b2a4a5 100644 --- a/hw/nvme/dif.c +++ b/hw/nvme/dif.c @@ -15,11 +15,11 @@ #include "nvme.h" #include "trace.h" =20 -uint16_t nvme_check_prinfo(NvmeNamespace *ns, uint16_t ctrl, uint64_t slba, +uint16_t nvme_check_prinfo(NvmeNamespace *ns, uint8_t prinfo, uint64_t slb= a, uint32_t reftag) { if ((NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) =3D=3D NVME_ID_NS_DPS_TYPE_1) = && - (ctrl & NVME_RW_PRINFO_PRCHK_REF) && (slba & 0xffffffff) !=3D reft= ag) { + (prinfo & NVME_PRINFO_PRCHK_REF) && (slba & 0xffffffff) !=3D refta= g) { return NVME_INVALID_PROT_INFO | NVME_DNR; } =20 @@ -73,7 +73,7 @@ void nvme_dif_pract_generate_dif(NvmeNamespace *ns, uint8= _t *buf, size_t len, =20 static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeDifTuple *dif, uint8_t *buf, uint8_t *mbuf, size_t pil, - uint16_t ctrl, uint16_t apptag, + uint8_t prinfo, uint16_t apptag, uint16_t appmask, uint32_t reftag) { switch (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { @@ -95,7 +95,7 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeDif= Tuple *dif, return NVME_SUCCESS; } =20 - if (ctrl & NVME_RW_PRINFO_PRCHK_GUARD) { + if (prinfo & NVME_PRINFO_PRCHK_GUARD) { uint16_t crc =3D crc_t10dif(0x0, buf, ns->lbasz); =20 if (pil) { @@ -109,7 +109,7 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeD= ifTuple *dif, } } =20 - if (ctrl & NVME_RW_PRINFO_PRCHK_APP) { + if (prinfo & NVME_PRINFO_PRCHK_APP) { trace_pci_nvme_dif_prchk_apptag(be16_to_cpu(dif->apptag), apptag, appmask); =20 @@ -118,7 +118,7 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeD= ifTuple *dif, } } =20 - if (ctrl & NVME_RW_PRINFO_PRCHK_REF) { + if (prinfo & NVME_PRINFO_PRCHK_REF) { trace_pci_nvme_dif_prchk_reftag(be32_to_cpu(dif->reftag), reftag); =20 if (be32_to_cpu(dif->reftag) !=3D reftag) { @@ -130,7 +130,7 @@ static uint16_t nvme_dif_prchk(NvmeNamespace *ns, NvmeD= ifTuple *dif, } =20 uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf, size_t len, - uint8_t *mbuf, size_t mlen, uint16_t ctrl, + uint8_t *mbuf, size_t mlen, uint8_t prinfo, uint64_t slba, uint16_t apptag, uint16_t appmask, uint32_t *reftag) { @@ -138,7 +138,7 @@ uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *buf= , size_t len, int16_t pil =3D 0; uint16_t status; =20 - status =3D nvme_check_prinfo(ns, ctrl, slba, *reftag); + status =3D nvme_check_prinfo(ns, prinfo, slba, *reftag); if (status) { return status; } @@ -147,12 +147,12 @@ uint16_t nvme_dif_check(NvmeNamespace *ns, uint8_t *b= uf, size_t len, pil =3D ns->lbaf.ms - sizeof(NvmeDifTuple); } =20 - trace_pci_nvme_dif_check(NVME_RW_PRINFO(ctrl), ns->lbasz + pil); + trace_pci_nvme_dif_check(prinfo, ns->lbasz + pil); =20 for (; buf < end; buf +=3D ns->lbasz, mbuf +=3D ns->lbaf.ms) { NvmeDifTuple *dif =3D (NvmeDifTuple *)(mbuf + pil); =20 - status =3D nvme_dif_prchk(ns, dif, buf, mbuf, pil, ctrl, apptag, + status =3D nvme_dif_prchk(ns, dif, buf, mbuf, pil, prinfo, apptag, appmask, *reftag); if (status) { return status; @@ -248,14 +248,14 @@ static void nvme_dif_rw_check_cb(void *opaque, int re= t) NvmeCtrl *n =3D nvme_ctrl(req); NvmeRwCmd *rw =3D (NvmeRwCmd *)&req->cmd; uint64_t slba =3D le64_to_cpu(rw->slba); - uint16_t ctrl =3D le16_to_cpu(rw->control); + uint8_t prinfo =3D NVME_RW_PRINFO(le16_to_cpu(rw->control)); uint16_t apptag =3D le16_to_cpu(rw->apptag); uint16_t appmask =3D le16_to_cpu(rw->appmask); uint32_t reftag =3D le32_to_cpu(rw->reftag); uint16_t status; =20 - trace_pci_nvme_dif_rw_check_cb(nvme_cid(req), NVME_RW_PRINFO(ctrl), ap= ptag, - appmask, reftag); + trace_pci_nvme_dif_rw_check_cb(nvme_cid(req), prinfo, apptag, appmask, + reftag); =20 if (ret) { goto out; @@ -269,7 +269,7 @@ static void nvme_dif_rw_check_cb(void *opaque, int ret) } =20 status =3D nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size, - ctx->mdata.bounce, ctx->mdata.iov.size, ctrl, + ctx->mdata.bounce, ctx->mdata.iov.size, prinfo, slba, apptag, appmask, &reftag); if (status) { req->status =3D status; @@ -283,7 +283,7 @@ static void nvme_dif_rw_check_cb(void *opaque, int ret) goto out; } =20 - if (ctrl & NVME_RW_PRINFO_PRACT && ns->lbaf.ms =3D=3D 8) { + if (prinfo & NVME_PRINFO_PRACT && ns->lbaf.ms =3D=3D 8) { goto out; } =20 @@ -364,15 +364,15 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req) size_t mlen =3D nvme_m2b(ns, nlb); size_t mapped_len =3D len; int64_t offset =3D nvme_l2b(ns, slba); - uint16_t ctrl =3D le16_to_cpu(rw->control); + uint8_t prinfo =3D NVME_RW_PRINFO(le16_to_cpu(rw->control)); uint16_t apptag =3D le16_to_cpu(rw->apptag); uint16_t appmask =3D le16_to_cpu(rw->appmask); uint32_t reftag =3D le32_to_cpu(rw->reftag); - bool pract =3D !!(ctrl & NVME_RW_PRINFO_PRACT); + bool pract =3D !!(prinfo & NVME_PRINFO_PRACT); NvmeBounceContext *ctx; uint16_t status; =20 - trace_pci_nvme_dif_rw(pract, NVME_RW_PRINFO(ctrl)); + trace_pci_nvme_dif_rw(pract, prinfo); =20 ctx =3D g_new0(NvmeBounceContext, 1); ctx->req =3D req; @@ -380,7 +380,7 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req) if (wrz) { BdrvRequestFlags flags =3D BDRV_REQ_MAY_UNMAP; =20 - if (ctrl & NVME_RW_PRINFO_PRCHK_MASK) { + if (prinfo & NVME_PRINFO_PRCHK_MASK) { status =3D NVME_INVALID_PROT_INFO | NVME_DNR; goto err; } @@ -389,7 +389,7 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req) uint8_t *mbuf, *end; int16_t pil =3D ns->lbaf.ms - sizeof(NvmeDifTuple); =20 - status =3D nvme_check_prinfo(ns, ctrl, slba, reftag); + status =3D nvme_check_prinfo(ns, prinfo, slba, reftag); if (status) { goto err; } @@ -469,7 +469,7 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req) } } =20 - status =3D nvme_check_prinfo(ns, ctrl, slba, reftag); + status =3D nvme_check_prinfo(ns, prinfo, slba, reftag); if (status) { goto err; } @@ -481,7 +481,7 @@ uint16_t nvme_dif_rw(NvmeCtrl *n, NvmeRequest *req) apptag, &reftag); } else { status =3D nvme_dif_check(ns, ctx->data.bounce, ctx->data.iov.size, - ctx->mdata.bounce, ctx->mdata.iov.size, ct= rl, + ctx->mdata.bounce, ctx->mdata.iov.size, pr= info, slba, apptag, appmask, &reftag); if (status) { goto err; --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623958681473472.3373383656408; Thu, 17 Jun 2021 12:38:01 -0700 (PDT) Received: from localhost ([::1]:59838 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxpv-0004HC-V2 for importer@patchew.org; Thu, 17 Jun 2021 15:38:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56386) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMF-0002fD-61; Thu, 17 Jun 2021 15:07:19 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:35779) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMC-00033w-HZ; Thu, 17 Jun 2021 15:07:18 -0400 Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 9B0E95C01BC; Thu, 17 Jun 2021 15:07:15 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Thu, 17 Jun 2021 15:07:15 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:14 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=RhB+jyv3v5d2N B/7uZM3C6ff/2QKW1Dbf9yX5iFQ9VM=; b=HluJmd0SSA/fbbwrB0AVm1lNE5G+o fhkPvZ4M8dui+JsINm8LTUjrba6/8+1cU00VL6KXpcpiNUWX56KW0SnnyLxMqGmH ncQurKpU5InNmRQdf2FzgCXlKwdfNkFEGMmbkyA9UD+EaXA6ocMvPtwH+E7qIWzC d6MpWdrpYVYc9cVcjq84PY3daGQ0alJ71hPL071qnHjYjFWGKHTYb08yM/G3PUv7 hRIJ7Lq3NNzRnTcJ1xdvS9C9EsPPn+ThgvedtKAJisj7MVh3hgXZxt+fS5pLFIv3 J2ngS6jwXPoacmu4OsVGnl3RNYf98XSacWaLrpR+6aXO+O0Kfzm5Q2nng== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=RhB+jyv3v5d2NB/7uZM3C6ff/2QKW1Dbf9yX5iFQ9VM=; b=FQ8zlW2x rJL5hfUAxAkwsUWqj/LXRDxh4/Ir1YCtFctybyRUheCMAZLx0e5a/E0j8sPksLUi wdHldpE1/tS14E3LJQLGanJ0IG2WvEwhKzH3TKYPT95lPXJROY8UPqVOnppRWn4q qIhnnOKhcAI3m22Ri0cuDy5OnV1a+AAmH07mhOHMq/R6GQ8OlN3Efpyhvusax9c+ txrfbzgGiGAX4p0QahmoUX8PytJoHW4NW9sCaA3gZll1dOGwiuodG6wlj6PCfj22 1zusnEdSAJ4isfvt/k8kEtGjDdju2BF0FKWmTAwHT2QaLkxFumyo3XA/wBppLFRa F4XwKLSQZBHk7g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 07/11] hw/nvme: add dw0/1 to the req completion trace event Date: Thu, 17 Jun 2021 21:06:53 +0200 Message-Id: <20210617190657.110823-8-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Some commands report additional useful information in dw0 and dw1 of the completion queue entry. Add them to the trace. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/ctrl.c | 2 ++ hw/nvme/trace-events | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index aca6cf068e2b..cfacf70c1979 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -1290,6 +1290,8 @@ static void nvme_enqueue_req_completion(NvmeCQueue *c= q, NvmeRequest *req) { assert(cq->cqid =3D=3D req->sq->cqid); trace_pci_nvme_enqueue_req_completion(nvme_cid(req), cq->cqid, + le32_to_cpu(req->cqe.result), + le32_to_cpu(req->cqe.dw1), req->status); =20 if (req->status) { diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events index eea4e31e46c4..a3e11346865e 100644 --- a/hw/nvme/trace-events +++ b/hw/nvme/trace-events @@ -80,7 +80,7 @@ pci_nvme_enqueue_event(uint8_t typ, uint8_t info, uint8_t= log_page) "type 0x%"PR pci_nvme_enqueue_event_noqueue(int queued) "queued %d" pci_nvme_enqueue_event_masked(uint8_t typ) "type 0x%"PRIx8"" pci_nvme_no_outstanding_aers(void) "ignoring event; no outstanding AERs" -pci_nvme_enqueue_req_completion(uint16_t cid, uint16_t cqid, uint16_t stat= us) "cid %"PRIu16" cqid %"PRIu16" status 0x%"PRIx16"" +pci_nvme_enqueue_req_completion(uint16_t cid, uint16_t cqid, uint32_t dw0,= uint32_t dw1, uint16_t status) "cid %"PRIu16" cqid %"PRIu16" dw0 0x%"PRIx3= 2" dw1 0x%"PRIx32" status 0x%"PRIx16"" pci_nvme_mmio_read(uint64_t addr, unsigned size) "addr 0x%"PRIx64" size %d" pci_nvme_mmio_write(uint64_t addr, uint64_t data, unsigned size) "addr 0x%= "PRIx64" data 0x%"PRIx64" size %d" pci_nvme_mmio_doorbell_cq(uint16_t cqid, uint16_t new_head) "cqid %"PRIu16= " new_head %"PRIu16"" --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623957287299418.7547043564782; Thu, 17 Jun 2021 12:14:47 -0700 (PDT) Received: from localhost ([::1]:44434 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxTR-0007lk-Oi for importer@patchew.org; Thu, 17 Jun 2021 15:14:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56430) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMI-0002jg-3d; Thu, 17 Jun 2021 15:07:22 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:38811) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMF-00035F-0Z; Thu, 17 Jun 2021 15:07:21 -0400 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id 533695C00E9; Thu, 17 Jun 2021 15:07:17 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Thu, 17 Jun 2021 15:07:17 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:15 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=dyFj96D6qd3wz pAEX26pGJo/vkMdRBteU2hA0GuzeV0=; b=JOUJkOBJRmX1P8VDxkn/+fim4l3id 8WP8YBv02X7nHOr4n2c1luDR/XwFBDd/+KZnYYHVWyL8+ZSz9QyVVKJU+AZONwpw KxcVDghRp2NxVZN4saxHpnbX+4zIVXVxqdeR2jOfS+8qPHSg77zK51lwC/podxkS cw2DEQYzMnjsGrNgWPkh9OtsLzN0MCs36r369jJPexAelJXCDq469vYDZjQDJq1g Z5nHdi2zXpwvEiBR38ZaIU+0oNzGgdv+w7DFcL+berEoIyiPx2ATFsaqWO04rawF WmLmWUoa9FtIZ1Vev/lgzEfdMhUFbTJYAUbyskJDdfoOQndLUUTsg+30w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=dyFj96D6qd3wzpAEX26pGJo/vkMdRBteU2hA0GuzeV0=; b=XJPAPC4K zmPkbWhqCW00UhQ7p3sjqWgLOfeIHNaRLnu6ZmSEZmGBGEmYa1S/I03ijrKtca8N khSnno5lj/6W+DN2QWGOBtJvUxUOo3K5JTh5ea7qVZ6pdSO4iFsUEO7GZ7apIuwA 09ElSDmpIXUiyUfrwlCI8hGkQhXerTtETObmFSYPKijmkJrAilZsz2vlCSNaE3ld S6un+EX9TdWU284nyamra+ICdYDC89vzSeTSPAG7eqQVw14xILiODFbfygx4dF1k RJ+QnpPx3fDHpOoGzAcdhzN2LNCmmyBs4aAtokcdCPFIDxpw5vwn5cVrhaOIuCpW 9OAnWwV4VguxXg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 08/11] hw/nvme: reimplement the copy command to allow aio cancellation Date: Thu, 17 Jun 2021 21:06:54 +0200 Message-Id: <20210617190657.110823-9-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Before this patch the code would issue several aios simultaneously without saving a reference to the aiocb. Without the aiocb reference the individual copies cannot be canceled. Fix this by issuing copies of the ranges one after another. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/ctrl.c | 726 +++++++++++++++++++++++-------------------- hw/nvme/trace-events | 3 +- 2 files changed, 394 insertions(+), 335 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index cfacf70c1979..012b0126057b 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -2093,226 +2093,6 @@ out: nvme_aio_zone_reset_complete_cb(opaque, ret); } =20 -struct nvme_copy_ctx { - int copies; - uint8_t *bounce; - uint8_t *mbounce; - uint32_t nlb; - NvmeCopySourceRange *ranges; -}; - -struct nvme_copy_in_ctx { - NvmeRequest *req; - QEMUIOVector iov; - NvmeCopySourceRange *range; -}; - -static void nvme_copy_complete_cb(void *opaque, int ret) -{ - NvmeRequest *req =3D opaque; - NvmeNamespace *ns =3D req->ns; - struct nvme_copy_ctx *ctx =3D req->opaque; - - if (ret) { - block_acct_failed(blk_get_stats(ns->blkconf.blk), &req->acct); - nvme_aio_err(req, ret); - goto out; - } - - block_acct_done(blk_get_stats(ns->blkconf.blk), &req->acct); - -out: - if (ns->params.zoned) { - NvmeCopyCmd *copy =3D (NvmeCopyCmd *)&req->cmd; - uint64_t sdlba =3D le64_to_cpu(copy->sdlba); - NvmeZone *zone =3D nvme_get_zone_by_slba(ns, sdlba); - - nvme_advance_zone_wp(ns, zone, ctx->nlb); - } - - g_free(ctx->bounce); - g_free(ctx->mbounce); - g_free(ctx); - - nvme_enqueue_req_completion(nvme_cq(req), req); -} - -static void nvme_copy_cb(void *opaque, int ret) -{ - NvmeRequest *req =3D opaque; - NvmeNamespace *ns =3D req->ns; - struct nvme_copy_ctx *ctx =3D req->opaque; - - trace_pci_nvme_copy_cb(nvme_cid(req)); - - if (ret) { - goto out; - } - - if (ns->lbaf.ms) { - NvmeCopyCmd *copy =3D (NvmeCopyCmd *)&req->cmd; - uint64_t sdlba =3D le64_to_cpu(copy->sdlba); - int64_t offset =3D nvme_moff(ns, sdlba); - - qemu_iovec_reset(&req->sg.iov); - qemu_iovec_add(&req->sg.iov, ctx->mbounce, nvme_m2b(ns, ctx->nlb)); - - req->aiocb =3D blk_aio_pwritev(ns->blkconf.blk, offset, &req->sg.i= ov, 0, - nvme_copy_complete_cb, req); - return; - } - -out: - nvme_copy_complete_cb(opaque, ret); -} - -static void nvme_copy_in_complete(NvmeRequest *req) -{ - NvmeNamespace *ns =3D req->ns; - NvmeCopyCmd *copy =3D (NvmeCopyCmd *)&req->cmd; - struct nvme_copy_ctx *ctx =3D req->opaque; - uint64_t sdlba =3D le64_to_cpu(copy->sdlba); - uint16_t status; - - trace_pci_nvme_copy_in_complete(nvme_cid(req)); - - block_acct_done(blk_get_stats(ns->blkconf.blk), &req->acct); - - if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { - uint8_t prinfor =3D (copy->control[0] >> 4) & 0xf; - uint8_t prinfow =3D (copy->control[2] >> 2) & 0xf; - uint16_t nr =3D copy->nr + 1; - NvmeCopySourceRange *range; - uint64_t slba; - uint32_t nlb; - uint16_t apptag, appmask; - uint32_t reftag; - uint8_t *buf =3D ctx->bounce, *mbuf =3D ctx->mbounce; - size_t len, mlen; - int i; - - for (i =3D 0; i < nr; i++) { - range =3D &ctx->ranges[i]; - slba =3D le64_to_cpu(range->slba); - nlb =3D le16_to_cpu(range->nlb) + 1; - len =3D nvme_l2b(ns, nlb); - mlen =3D nvme_m2b(ns, nlb); - apptag =3D le16_to_cpu(range->apptag); - appmask =3D le16_to_cpu(range->appmask); - reftag =3D le32_to_cpu(range->reftag); - - status =3D nvme_dif_check(ns, buf, len, mbuf, mlen, prinfor, s= lba, - apptag, appmask, &reftag); - if (status) { - goto invalid; - } - - buf +=3D len; - mbuf +=3D mlen; - } - - apptag =3D le16_to_cpu(copy->apptag); - appmask =3D le16_to_cpu(copy->appmask); - reftag =3D le32_to_cpu(copy->reftag); - - if (prinfow & NVME_RW_PRINFO_PRACT) { - size_t len =3D nvme_l2b(ns, ctx->nlb); - size_t mlen =3D nvme_m2b(ns, ctx->nlb); - - status =3D nvme_check_prinfo(ns, prinfow, sdlba, reftag); - if (status) { - goto invalid; - } - - nvme_dif_pract_generate_dif(ns, ctx->bounce, len, ctx->mbounce, - mlen, apptag, &reftag); - } else { - status =3D nvme_dif_check(ns, ctx->bounce, len, ctx->mbounce, = mlen, - prinfow, sdlba, apptag, appmask, &reft= ag); - if (status) { - goto invalid; - } - } - } - - status =3D nvme_check_bounds(ns, sdlba, ctx->nlb); - if (status) { - goto invalid; - } - - if (ns->params.zoned) { - NvmeZone *zone =3D nvme_get_zone_by_slba(ns, sdlba); - - status =3D nvme_check_zone_write(ns, zone, sdlba, ctx->nlb); - if (status) { - goto invalid; - } - - status =3D nvme_zrm_auto(nvme_ctrl(req), ns, zone); - if (status) { - goto invalid; - } - - zone->w_ptr +=3D ctx->nlb; - } - - qemu_iovec_init(&req->sg.iov, 1); - qemu_iovec_add(&req->sg.iov, ctx->bounce, nvme_l2b(ns, ctx->nlb)); - - block_acct_start(blk_get_stats(ns->blkconf.blk), &req->acct, 0, - BLOCK_ACCT_WRITE); - - req->aiocb =3D blk_aio_pwritev(ns->blkconf.blk, nvme_l2b(ns, sdlba), - &req->sg.iov, 0, nvme_copy_cb, req); - - return; - -invalid: - req->status =3D status; - - g_free(ctx->bounce); - g_free(ctx); - - nvme_enqueue_req_completion(nvme_cq(req), req); -} - -static void nvme_aio_copy_in_cb(void *opaque, int ret) -{ - struct nvme_copy_in_ctx *in_ctx =3D opaque; - NvmeRequest *req =3D in_ctx->req; - NvmeNamespace *ns =3D req->ns; - struct nvme_copy_ctx *ctx =3D req->opaque; - - qemu_iovec_destroy(&in_ctx->iov); - g_free(in_ctx); - - trace_pci_nvme_aio_copy_in_cb(nvme_cid(req)); - - if (ret) { - nvme_aio_err(req, ret); - } - - ctx->copies--; - - if (ctx->copies) { - return; - } - - if (req->status) { - block_acct_failed(blk_get_stats(ns->blkconf.blk), &req->acct); - - g_free(ctx->bounce); - g_free(ctx->mbounce); - g_free(ctx); - - nvme_enqueue_req_completion(nvme_cq(req), req); - - return; - } - - nvme_copy_in_complete(req); -} - struct nvme_compare_ctx { struct { QEMUIOVector iov; @@ -2713,153 +2493,433 @@ static uint16_t nvme_verify(NvmeCtrl *n, NvmeRequ= est *req) return NVME_NO_COMPLETE; } =20 +typedef struct NvmeCopyAIOCB { + BlockAIOCB common; + BlockAIOCB *aiocb; + NvmeRequest *req; + QEMUBH *bh; + int ret; + + NvmeCopySourceRange *ranges; + int nr; + int idx; + + uint8_t *bounce; + QEMUIOVector iov; + struct { + BlockAcctCookie read; + BlockAcctCookie write; + } acct; + + uint32_t reftag; + uint64_t slba; + + NvmeZone *zone; +} NvmeCopyAIOCB; + +static void nvme_copy_cancel(BlockAIOCB *aiocb) +{ + NvmeCopyAIOCB *iocb =3D container_of(aiocb, NvmeCopyAIOCB, common); + + iocb->ret =3D -ECANCELED; + + if (iocb->aiocb) { + blk_aio_cancel_async(iocb->aiocb); + iocb->aiocb =3D NULL; + } +} + +static const AIOCBInfo nvme_copy_aiocb_info =3D { + .aiocb_size =3D sizeof(NvmeCopyAIOCB), + .cancel_async =3D nvme_copy_cancel, +}; + +static void nvme_copy_bh(void *opaque) +{ + NvmeCopyAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + BlockAcctStats *stats =3D blk_get_stats(ns->blkconf.blk); + + if (iocb->idx !=3D iocb->nr) { + req->cqe.result =3D cpu_to_le32(iocb->idx); + } + + qemu_iovec_destroy(&iocb->iov); + g_free(iocb->bounce); + + qemu_bh_delete(iocb->bh); + iocb->bh =3D NULL; + + if (iocb->ret < 0) { + block_acct_failed(stats, &iocb->acct.read); + block_acct_failed(stats, &iocb->acct.write); + } else { + block_acct_done(stats, &iocb->acct.read); + block_acct_done(stats, &iocb->acct.write); + } + + iocb->common.cb(iocb->common.opaque, iocb->ret); + qemu_aio_unref(iocb); +} + +static void nvme_copy_cb(void *opaque, int ret); + +static void nvme_copy_out_completed_cb(void *opaque, int ret) +{ + NvmeCopyAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + NvmeCopySourceRange *range =3D &iocb->ranges[iocb->idx]; + uint32_t nlb =3D le32_to_cpu(range->nlb) + 1; + + if (ret < 0) { + iocb->ret =3D ret; + goto out; + } else if (iocb->ret < 0) { + goto out; + } + + if (ns->params.zoned) { + nvme_advance_zone_wp(ns, iocb->zone, nlb); + } + + iocb->idx++; + iocb->slba +=3D nlb; +out: + nvme_copy_cb(iocb, iocb->ret); +} + +static void nvme_copy_out_cb(void *opaque, int ret) +{ + NvmeCopyAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + NvmeCopySourceRange *range; + uint32_t nlb; + size_t mlen; + uint8_t *mbounce; + + if (ret < 0) { + iocb->ret =3D ret; + goto out; + } else if (iocb->ret < 0) { + goto out; + } + + if (!ns->lbaf.ms) { + nvme_copy_out_completed_cb(iocb, 0); + return; + } + + range =3D &iocb->ranges[iocb->idx]; + nlb =3D le32_to_cpu(range->nlb) + 1; + + mlen =3D nvme_m2b(ns, nlb); + mbounce =3D iocb->bounce + nvme_l2b(ns, nlb); + + qemu_iovec_reset(&iocb->iov); + qemu_iovec_add(&iocb->iov, mbounce, mlen); + + iocb->aiocb =3D blk_aio_pwritev(ns->blkconf.blk, nvme_moff(ns, iocb->s= lba), + &iocb->iov, 0, nvme_copy_out_completed_c= b, + iocb); + + return; + +out: + nvme_copy_cb(iocb, ret); +} + +static void nvme_copy_in_completed_cb(void *opaque, int ret) +{ + NvmeCopyAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + NvmeCopySourceRange *range; + uint32_t nlb; + size_t len; + uint16_t status; + + if (ret < 0) { + iocb->ret =3D ret; + goto out; + } else if (iocb->ret < 0) { + goto out; + } + + range =3D &iocb->ranges[iocb->idx]; + nlb =3D le32_to_cpu(range->nlb) + 1; + len =3D nvme_l2b(ns, nlb); + + trace_pci_nvme_copy_out(iocb->slba, nlb); + + if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps)) { + NvmeCopyCmd *copy =3D (NvmeCopyCmd *)&req->cmd; + + uint16_t prinfor =3D ((copy->control[0] >> 4) & 0xf); + uint16_t prinfow =3D ((copy->control[2] >> 2) & 0xf); + + uint16_t apptag =3D le16_to_cpu(range->apptag); + uint16_t appmask =3D le16_to_cpu(range->appmask); + uint32_t reftag =3D le32_to_cpu(range->reftag); + + uint64_t slba =3D le64_to_cpu(range->slba); + size_t mlen =3D nvme_m2b(ns, nlb); + uint8_t *mbounce =3D iocb->bounce + nvme_l2b(ns, nlb); + + status =3D nvme_dif_check(ns, iocb->bounce, len, mbounce, mlen, pr= infor, + slba, apptag, appmask, &reftag); + if (status) { + goto invalid; + } + + apptag =3D le16_to_cpu(copy->apptag); + appmask =3D le16_to_cpu(copy->appmask); + + if (prinfow & NVME_PRINFO_PRACT) { + status =3D nvme_check_prinfo(ns, prinfow, iocb->slba, iocb->re= ftag); + if (status) { + goto invalid; + } + + nvme_dif_pract_generate_dif(ns, iocb->bounce, len, mbounce, ml= en, + apptag, &iocb->reftag); + } else { + status =3D nvme_dif_check(ns, iocb->bounce, len, mbounce, mlen, + prinfow, iocb->slba, apptag, appmask, + &iocb->reftag); + if (status) { + goto invalid; + } + } + } + + status =3D nvme_check_bounds(ns, iocb->slba, nlb); + if (status) { + goto invalid; + } + + if (ns->params.zoned) { + status =3D nvme_check_zone_write(ns, iocb->zone, iocb->slba, nlb); + if (status) { + goto invalid; + } + + iocb->zone->w_ptr +=3D nlb; + } + + qemu_iovec_reset(&iocb->iov); + qemu_iovec_add(&iocb->iov, iocb->bounce, len); + + iocb->aiocb =3D blk_aio_pwritev(ns->blkconf.blk, nvme_l2b(ns, iocb->sl= ba), + &iocb->iov, 0, nvme_copy_out_cb, iocb); + + return; + +invalid: + req->status =3D status; + iocb->aiocb =3D NULL; + if (iocb->bh) { + qemu_bh_schedule(iocb->bh); + } + + return; + +out: + nvme_copy_cb(iocb, ret); +} + +static void nvme_copy_in_cb(void *opaque, int ret) +{ + NvmeCopyAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + NvmeCopySourceRange *range; + uint64_t slba; + uint32_t nlb; + + if (ret < 0) { + iocb->ret =3D ret; + goto out; + } else if (iocb->ret < 0) { + goto out; + } + + if (!ns->lbaf.ms) { + nvme_copy_in_completed_cb(iocb, 0); + return; + } + + range =3D &iocb->ranges[iocb->idx]; + slba =3D le64_to_cpu(range->slba); + nlb =3D le32_to_cpu(range->nlb) + 1; + + qemu_iovec_reset(&iocb->iov); + qemu_iovec_add(&iocb->iov, iocb->bounce + nvme_l2b(ns, nlb), + nvme_m2b(ns, nlb)); + + iocb->aiocb =3D blk_aio_preadv(ns->blkconf.blk, nvme_moff(ns, slba), + &iocb->iov, 0, nvme_copy_in_completed_cb, + iocb); + return; + +out: + nvme_copy_cb(iocb, iocb->ret); +} + +static void nvme_copy_cb(void *opaque, int ret) +{ + NvmeCopyAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + NvmeCopySourceRange *range; + uint64_t slba; + uint32_t nlb; + size_t len; + uint16_t status; + + if (ret < 0) { + iocb->ret =3D ret; + goto done; + } else if (iocb->ret < 0) { + goto done; + } + + if (iocb->idx =3D=3D iocb->nr) { + goto done; + } + + range =3D &iocb->ranges[iocb->idx]; + slba =3D le64_to_cpu(range->slba); + nlb =3D le32_to_cpu(range->nlb) + 1; + len =3D nvme_l2b(ns, nlb); + + trace_pci_nvme_copy_source_range(slba, nlb); + + if (nlb > le16_to_cpu(ns->id_ns.mssrl)) { + status =3D NVME_CMD_SIZE_LIMIT | NVME_DNR; + goto invalid; + } + + status =3D nvme_check_bounds(ns, slba, nlb); + if (status) { + goto invalid; + } + + if (NVME_ERR_REC_DULBE(ns->features.err_rec)) { + status =3D nvme_check_dulbe(ns, slba, nlb); + if (status) { + goto invalid; + } + } + + if (ns->params.zoned) { + status =3D nvme_check_zone_read(ns, slba, nlb); + if (status) { + goto invalid; + } + } + + qemu_iovec_reset(&iocb->iov); + qemu_iovec_add(&iocb->iov, iocb->bounce, len); + + iocb->aiocb =3D blk_aio_preadv(ns->blkconf.blk, nvme_l2b(ns, slba), + &iocb->iov, 0, nvme_copy_in_cb, iocb); + return; + +invalid: + req->status =3D status; +done: + iocb->aiocb =3D NULL; + if (iocb->bh) { + qemu_bh_schedule(iocb->bh); + } +} + + static uint16_t nvme_copy(NvmeCtrl *n, NvmeRequest *req) { NvmeNamespace *ns =3D req->ns; NvmeCopyCmd *copy =3D (NvmeCopyCmd *)&req->cmd; - + NvmeCopyAIOCB *iocb =3D blk_aio_get(&nvme_copy_aiocb_info, ns->blkconf= .blk, + nvme_misc_cb, req); uint16_t nr =3D copy->nr + 1; uint8_t format =3D copy->control[0] & 0xf; - uint8_t prinfor =3D (copy->control[0] >> 4) & 0xf; - uint8_t prinfow =3D (copy->control[2] >> 2) & 0xf; + uint16_t prinfor =3D ((copy->control[0] >> 4) & 0xf); + uint16_t prinfow =3D ((copy->control[2] >> 2) & 0xf); =20 - uint32_t nlb =3D 0; - uint8_t *bounce =3D NULL, *bouncep =3D NULL; - uint8_t *mbounce =3D NULL, *mbouncep =3D NULL; - struct nvme_copy_ctx *ctx; uint16_t status; - int i; =20 trace_pci_nvme_copy(nvme_cid(req), nvme_nsid(ns), nr, format); =20 + iocb->ranges =3D NULL; + iocb->zone =3D NULL; + if (NVME_ID_NS_DPS_TYPE(ns->id_ns.dps) && ((prinfor & NVME_PRINFO_PRACT) !=3D (prinfow & NVME_PRINFO_PRACT))= ) { - return NVME_INVALID_FIELD | NVME_DNR; + status =3D NVME_INVALID_FIELD | NVME_DNR; + goto invalid; } =20 if (!(n->id_ctrl.ocfs & (1 << format))) { trace_pci_nvme_err_copy_invalid_format(format); - return NVME_INVALID_FIELD | NVME_DNR; + status =3D NVME_INVALID_FIELD | NVME_DNR; + goto invalid; } =20 if (nr > ns->id_ns.msrc + 1) { - return NVME_CMD_SIZE_LIMIT | NVME_DNR; - } - - ctx =3D g_new(struct nvme_copy_ctx, 1); - ctx->ranges =3D g_new(NvmeCopySourceRange, nr); - - status =3D nvme_h2c(n, (uint8_t *)ctx->ranges, - nr * sizeof(NvmeCopySourceRange), req); - if (status) { - goto out; - } - - for (i =3D 0; i < nr; i++) { - uint64_t slba =3D le64_to_cpu(ctx->ranges[i].slba); - uint32_t _nlb =3D le16_to_cpu(ctx->ranges[i].nlb) + 1; - - if (_nlb > le16_to_cpu(ns->id_ns.mssrl)) { - status =3D NVME_CMD_SIZE_LIMIT | NVME_DNR; - goto out; - } - - status =3D nvme_check_bounds(ns, slba, _nlb); - if (status) { - goto out; - } - - if (NVME_ERR_REC_DULBE(ns->features.err_rec)) { - status =3D nvme_check_dulbe(ns, slba, _nlb); - if (status) { - goto out; - } - } - - if (ns->params.zoned) { - status =3D nvme_check_zone_read(ns, slba, _nlb); - if (status) { - goto out; - } - } - - nlb +=3D _nlb; - } - - if (nlb > le32_to_cpu(ns->id_ns.mcl)) { status =3D NVME_CMD_SIZE_LIMIT | NVME_DNR; - goto out; + goto invalid; } =20 - bounce =3D bouncep =3D g_malloc(nvme_l2b(ns, nlb)); - if (ns->lbaf.ms) { - mbounce =3D mbouncep =3D g_malloc(nvme_m2b(ns, nlb)); + iocb->ranges =3D g_new(NvmeCopySourceRange, nr); + + status =3D nvme_h2c(n, (uint8_t *)iocb->ranges, + sizeof(NvmeCopySourceRange) * nr, req); + if (status) { + goto invalid; } =20 - block_acct_start(blk_get_stats(ns->blkconf.blk), &req->acct, 0, - BLOCK_ACCT_READ); + iocb->slba =3D le64_to_cpu(copy->sdlba); =20 - ctx->bounce =3D bounce; - ctx->mbounce =3D mbounce; - ctx->nlb =3D nlb; - ctx->copies =3D 1; + if (ns->params.zoned) { + iocb->zone =3D nvme_get_zone_by_slba(ns, iocb->slba); + if (!iocb->zone) { + status =3D NVME_LBA_RANGE | NVME_DNR; + goto invalid; + } =20 - req->opaque =3D ctx; - - for (i =3D 0; i < nr; i++) { - uint64_t slba =3D le64_to_cpu(ctx->ranges[i].slba); - uint32_t nlb =3D le16_to_cpu(ctx->ranges[i].nlb) + 1; - - size_t len =3D nvme_l2b(ns, nlb); - int64_t offset =3D nvme_l2b(ns, slba); - - trace_pci_nvme_copy_source_range(slba, nlb); - - struct nvme_copy_in_ctx *in_ctx =3D g_new(struct nvme_copy_in_ctx,= 1); - in_ctx->req =3D req; - - qemu_iovec_init(&in_ctx->iov, 1); - qemu_iovec_add(&in_ctx->iov, bouncep, len); - - ctx->copies++; - - blk_aio_preadv(ns->blkconf.blk, offset, &in_ctx->iov, 0, - nvme_aio_copy_in_cb, in_ctx); - - bouncep +=3D len; - - if (ns->lbaf.ms) { - len =3D nvme_m2b(ns, nlb); - offset =3D nvme_moff(ns, slba); - - in_ctx =3D g_new(struct nvme_copy_in_ctx, 1); - in_ctx->req =3D req; - - qemu_iovec_init(&in_ctx->iov, 1); - qemu_iovec_add(&in_ctx->iov, mbouncep, len); - - ctx->copies++; - - blk_aio_preadv(ns->blkconf.blk, offset, &in_ctx->iov, 0, - nvme_aio_copy_in_cb, in_ctx); - - mbouncep +=3D len; + status =3D nvme_zrm_auto(n, ns, iocb->zone); + if (status) { + goto invalid; } } =20 - /* account for the 1-initialization */ - ctx->copies--; + iocb->req =3D req; + iocb->bh =3D qemu_bh_new(nvme_copy_bh, iocb); + iocb->ret =3D 0; + iocb->nr =3D nr; + iocb->idx =3D 0; + iocb->reftag =3D le32_to_cpu(copy->reftag); + iocb->bounce =3D g_malloc_n(le16_to_cpu(ns->id_ns.mssrl), + ns->lbasz + ns->lbaf.ms); =20 - if (!ctx->copies) { - nvme_copy_in_complete(req); - } + qemu_iovec_init(&iocb->iov, 1); + + block_acct_start(blk_get_stats(ns->blkconf.blk), &iocb->acct.read, 0, + BLOCK_ACCT_READ); + block_acct_start(blk_get_stats(ns->blkconf.blk), &iocb->acct.write, 0, + BLOCK_ACCT_WRITE); + + req->aiocb =3D &iocb->common; + nvme_copy_cb(iocb, 0); =20 return NVME_NO_COMPLETE; =20 -out: - g_free(ctx->ranges); - g_free(ctx); - +invalid: + g_free(iocb->ranges); + qemu_aio_unref(iocb); return status; } =20 diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events index a3e11346865e..cd65f8b28895 100644 --- a/hw/nvme/trace-events +++ b/hw/nvme/trace-events @@ -30,8 +30,7 @@ pci_nvme_dif_prchk_apptag(uint16_t apptag, uint16_t elbat= , uint16_t elbatm) "app pci_nvme_dif_prchk_reftag(uint32_t reftag, uint32_t elbrt) "reftag 0x%"PRI= x32" elbrt 0x%"PRIx32"" pci_nvme_copy(uint16_t cid, uint32_t nsid, uint16_t nr, uint8_t format) "c= id %"PRIu16" nsid %"PRIu32" nr %"PRIu16" format 0x%"PRIx8"" pci_nvme_copy_source_range(uint64_t slba, uint32_t nlb) "slba 0x%"PRIx64" = nlb %"PRIu32"" -pci_nvme_copy_in_complete(uint16_t cid) "cid %"PRIu16"" -pci_nvme_copy_cb(uint16_t cid) "cid %"PRIu16"" +pci_nvme_copy_out(uint64_t slba, uint32_t nlb) "slba 0x%"PRIx64" nlb %"PRI= u32"" pci_nvme_verify(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) = "cid %"PRIu16" nsid %"PRIu32" slba 0x%"PRIx64" nlb %"PRIu32"" pci_nvme_verify_mdata_in_cb(uint16_t cid, const char *blkname) "cid %"PRIu= 16" blk '%s'" pci_nvme_verify_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t= appmask, uint32_t reftag) "cid %"PRIu16" prinfo 0x%"PRIx8" apptag 0x%"PRIx= 16" appmask 0x%"PRIx16" reftag 0x%"PRIx32"" --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623959008969346.29228667195434; Thu, 17 Jun 2021 12:43:28 -0700 (PDT) Received: from localhost ([::1]:34900 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxvA-0006fa-BI for importer@patchew.org; Thu, 17 Jun 2021 15:43:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56444) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMJ-0002lC-2J; Thu, 17 Jun 2021 15:07:23 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:38011) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMF-000363-Ox; Thu, 17 Jun 2021 15:07:22 -0400 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 089085C01BC; Thu, 17 Jun 2021 15:07:19 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Thu, 17 Jun 2021 15:07:19 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:17 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=fr4zo+HlAWM+M OUFRSjlShoufDwodMNIfm1EU324EAY=; b=l94VyVU3MZZD2fwWs9wFGH6vGAKdj EEjcRsyBUzb0mkZNJ2ko8AC5NMLjChcBiOzFLzjlm4ru3zijsILnfKZNK4bjgNiW fvptfm2GrAp4rgxZrE3/WiVDsgSJxak1tqY12AEMhycZr9rrvzEUysHegEF2NRRK GMjQAixrF6u6UWPzOvN0cZQVOch5MSpJlwthTNq1MpvRZcV66qEXIp3Hj44FquSv rmzbxIyipjSlmU+5rYmuo0gMNSXjo/EY51G2zFNTTlyfNTzjS9NB7po7YAz4SDUT 57OVpb5CuNY5w9DgDoKOswX5foyb7lxwNUsCHye3aj//PHblo4rTIJdDA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=fr4zo+HlAWM+MOUFRSjlShoufDwodMNIfm1EU324EAY=; b=WXL/xmVt 0JwnGFc65PuYv50JS1o4UW11vGRlUsT181Dda7fcuu0vlO3YFdCquZmck1de2Rj3 Wy0V4EATl2/Od9mHWcdLk5aM1UTImehd+dA8HYJomkBlDMeGirwrVWYZQ1D61zbJ MHoaDUYA012dw28lMKEl+RMJBRDlcu8/rlvf75XHWXlLi8RnNn/ZGXDi6cVULqi+ MqOOCOWGQwo3pqqhlhA4jL0N1YqZlGz8g//WgiUCFkjpPBJL/7aUQt0rkrfm7wis i87dhyR7vmXHNYlXDpjPqYldoXonD1EucnmZOLchsNTaU8lfH2s2rKJhtuMtJafp r1rOqjNyR6Hx1Q== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 09/11] hw/nvme: reimplement zone reset to allow cancellation Date: Thu, 17 Jun 2021 21:06:55 +0200 Message-Id: <20210617190657.110823-10-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Prior to this patch, the aios associated with zone reset are submitted anonymously (no reference saved to the aiocb from the blk_aio call). Fix this by resetting the zones one after another, saving a reference to the aiocb for each reset. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/ctrl.c | 288 +++++++++++++++++++++++++------------------ hw/nvme/trace-events | 2 +- 2 files changed, 169 insertions(+), 121 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 012b0126057b..6a8c1ff2271d 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -1691,6 +1691,29 @@ static uint16_t nvme_zrm_close(NvmeNamespace *ns, Nv= meZone *zone) } } =20 +static uint16_t nvme_zrm_reset(NvmeNamespace *ns, NvmeZone *zone) +{ + switch (nvme_get_zone_state(zone)) { + case NVME_ZONE_STATE_EXPLICITLY_OPEN: + case NVME_ZONE_STATE_IMPLICITLY_OPEN: + nvme_aor_dec_open(ns); + /* fallthrough */ + case NVME_ZONE_STATE_CLOSED: + nvme_aor_dec_active(ns); + /* fallthrough */ + case NVME_ZONE_STATE_FULL: + zone->w_ptr =3D zone->d.zslba; + zone->d.wp =3D zone->w_ptr; + nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_EMPTY); + /* fallthrough */ + case NVME_ZONE_STATE_EMPTY: + return NVME_SUCCESS; + + default: + return NVME_ZONE_INVAL_TRANSITION; + } +} + static void nvme_zrm_auto_transition_zone(NvmeNamespace *ns) { NvmeZone *zone; @@ -2020,79 +2043,6 @@ out: nvme_verify_cb(ctx, ret); } =20 -struct nvme_zone_reset_ctx { - NvmeRequest *req; - NvmeZone *zone; -}; - -static void nvme_aio_zone_reset_complete_cb(void *opaque, int ret) -{ - struct nvme_zone_reset_ctx *ctx =3D opaque; - NvmeRequest *req =3D ctx->req; - NvmeNamespace *ns =3D req->ns; - NvmeZone *zone =3D ctx->zone; - uintptr_t *resets =3D (uintptr_t *)&req->opaque; - - if (ret) { - nvme_aio_err(req, ret); - goto out; - } - - switch (nvme_get_zone_state(zone)) { - case NVME_ZONE_STATE_EXPLICITLY_OPEN: - case NVME_ZONE_STATE_IMPLICITLY_OPEN: - nvme_aor_dec_open(ns); - /* fall through */ - case NVME_ZONE_STATE_CLOSED: - nvme_aor_dec_active(ns); - /* fall through */ - case NVME_ZONE_STATE_FULL: - zone->w_ptr =3D zone->d.zslba; - zone->d.wp =3D zone->w_ptr; - nvme_assign_zone_state(ns, zone, NVME_ZONE_STATE_EMPTY); - /* fall through */ - default: - break; - } - -out: - g_free(ctx); - - (*resets)--; - - if (*resets) { - return; - } - - nvme_enqueue_req_completion(nvme_cq(req), req); -} - -static void nvme_aio_zone_reset_cb(void *opaque, int ret) -{ - struct nvme_zone_reset_ctx *ctx =3D opaque; - NvmeRequest *req =3D ctx->req; - NvmeNamespace *ns =3D req->ns; - NvmeZone *zone =3D ctx->zone; - - trace_pci_nvme_aio_zone_reset_cb(nvme_cid(req), zone->d.zslba); - - if (ret) { - goto out; - } - - if (ns->lbaf.ms) { - int64_t offset =3D nvme_moff(ns, zone->d.zslba); - - blk_aio_pwrite_zeroes(ns->blkconf.blk, offset, - nvme_m2b(ns, ns->zone_size), BDRV_REQ_MAY_UN= MAP, - nvme_aio_zone_reset_complete_cb, ctx); - return; - } - -out: - nvme_aio_zone_reset_complete_cb(opaque, ret); -} - struct nvme_compare_ctx { struct { QEMUIOVector iov; @@ -3395,41 +3345,6 @@ static uint16_t nvme_finish_zone(NvmeNamespace *ns, = NvmeZone *zone, return nvme_zrm_finish(ns, zone); } =20 -static uint16_t nvme_reset_zone(NvmeNamespace *ns, NvmeZone *zone, - NvmeZoneState state, NvmeRequest *req) -{ - uintptr_t *resets =3D (uintptr_t *)&req->opaque; - struct nvme_zone_reset_ctx *ctx; - - switch (state) { - case NVME_ZONE_STATE_EMPTY: - return NVME_SUCCESS; - case NVME_ZONE_STATE_EXPLICITLY_OPEN: - case NVME_ZONE_STATE_IMPLICITLY_OPEN: - case NVME_ZONE_STATE_CLOSED: - case NVME_ZONE_STATE_FULL: - break; - default: - return NVME_ZONE_INVAL_TRANSITION; - } - - /* - * The zone reset aio callback needs to know the zone that is being re= set - * in order to transition the zone on completion. - */ - ctx =3D g_new(struct nvme_zone_reset_ctx, 1); - ctx->req =3D req; - ctx->zone =3D zone; - - (*resets)++; - - blk_aio_pwrite_zeroes(ns->blkconf.blk, nvme_l2b(ns, zone->d.zslba), - nvme_l2b(ns, ns->zone_size), BDRV_REQ_MAY_UNMAP, - nvme_aio_zone_reset_cb, ctx); - - return NVME_NO_COMPLETE; -} - static uint16_t nvme_offline_zone(NvmeNamespace *ns, NvmeZone *zone, NvmeZoneState state, NvmeRequest *req) { @@ -3558,12 +3473,144 @@ out: return status; } =20 +typedef struct NvmeZoneResetAIOCB { + BlockAIOCB common; + BlockAIOCB *aiocb; + NvmeRequest *req; + QEMUBH *bh; + int ret; + + bool all; + int idx; + NvmeZone *zone; +} NvmeZoneResetAIOCB; + +static void nvme_zone_reset_cancel(BlockAIOCB *aiocb) +{ + NvmeZoneResetAIOCB *iocb =3D container_of(aiocb, NvmeZoneResetAIOCB, c= ommon); + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + + iocb->idx =3D ns->num_zones; + + iocb->ret =3D -ECANCELED; + + if (iocb->aiocb) { + blk_aio_cancel_async(iocb->aiocb); + iocb->aiocb =3D NULL; + } +} + +static const AIOCBInfo nvme_zone_reset_aiocb_info =3D { + .aiocb_size =3D sizeof(NvmeZoneResetAIOCB), + .cancel_async =3D nvme_zone_reset_cancel, +}; + +static void nvme_zone_reset_bh(void *opaque) +{ + NvmeZoneResetAIOCB *iocb =3D opaque; + + iocb->common.cb(iocb->common.opaque, iocb->ret); + + qemu_bh_delete(iocb->bh); + iocb->bh =3D NULL; + qemu_aio_unref(iocb); +} + +static void nvme_zone_reset_cb(void *opaque, int ret); + +static void nvme_zone_reset_epilogue_cb(void *opaque, int ret) +{ + NvmeZoneResetAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + int64_t moff; + int count; + + if (ret < 0) { + nvme_zone_reset_cb(iocb, ret); + return; + } + + if (!ns->lbaf.ms) { + nvme_zone_reset_cb(iocb, 0); + return; + } + + moff =3D nvme_moff(ns, iocb->zone->d.zslba); + count =3D nvme_m2b(ns, ns->zone_size); + + iocb->aiocb =3D blk_aio_pwrite_zeroes(ns->blkconf.blk, moff, count, + BDRV_REQ_MAY_UNMAP, + nvme_zone_reset_cb, iocb); + return; +} + +static void nvme_zone_reset_cb(void *opaque, int ret) +{ + NvmeZoneResetAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D req->ns; + + if (ret < 0) { + iocb->ret =3D ret; + goto done; + } + + if (iocb->zone) { + nvme_zrm_reset(ns, iocb->zone); + + if (!iocb->all) { + goto done; + } + } + + while (iocb->idx < ns->num_zones) { + NvmeZone *zone =3D &ns->zone_array[iocb->idx++]; + + switch (nvme_get_zone_state(zone)) { + case NVME_ZONE_STATE_EMPTY: + if (!iocb->all) { + goto done; + } + + continue; + + case NVME_ZONE_STATE_EXPLICITLY_OPEN: + case NVME_ZONE_STATE_IMPLICITLY_OPEN: + case NVME_ZONE_STATE_CLOSED: + case NVME_ZONE_STATE_FULL: + iocb->zone =3D zone; + break; + + default: + continue; + } + + trace_pci_nvme_zns_zone_reset(zone->d.zslba); + + iocb->aiocb =3D blk_aio_pwrite_zeroes(ns->blkconf.blk, + nvme_l2b(ns, zone->d.zslba), + nvme_l2b(ns, ns->zone_size), + BDRV_REQ_MAY_UNMAP, + nvme_zone_reset_epilogue_cb, + iocb); + return; + } + +done: + iocb->aiocb =3D NULL; + if (iocb->bh) { + qemu_bh_schedule(iocb->bh); + } +} + static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, NvmeRequest *req) { NvmeCmd *cmd =3D (NvmeCmd *)&req->cmd; NvmeNamespace *ns =3D req->ns; NvmeZone *zone; - uintptr_t *resets; + NvmeZoneResetAIOCB *iocb; uint8_t *zd_ext; uint32_t dw13 =3D le32_to_cpu(cmd->cdw13); uint64_t slba =3D 0; @@ -3574,7 +3621,7 @@ static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, Nvme= Request *req) enum NvmeZoneProcessingMask proc_mask =3D NVME_PROC_CURRENT_ZONE; =20 action =3D dw13 & 0xff; - all =3D dw13 & 0x100; + all =3D !!(dw13 & 0x100); =20 req->status =3D NVME_SUCCESS; =20 @@ -3618,21 +3665,22 @@ static uint16_t nvme_zone_mgmt_send(NvmeCtrl *n, Nv= meRequest *req) break; =20 case NVME_ZONE_ACTION_RESET: - resets =3D (uintptr_t *)&req->opaque; - - if (all) { - proc_mask =3D NVME_PROC_OPENED_ZONES | NVME_PROC_CLOSED_ZONES | - NVME_PROC_FULL_ZONES; - } trace_pci_nvme_reset_zone(slba, zone_idx, all); =20 - *resets =3D 1; + iocb =3D blk_aio_get(&nvme_zone_reset_aiocb_info, ns->blkconf.blk, + nvme_misc_cb, req); =20 - status =3D nvme_do_zone_op(ns, zone, proc_mask, nvme_reset_zone, r= eq); + iocb->req =3D req; + iocb->bh =3D qemu_bh_new(nvme_zone_reset_bh, iocb); + iocb->ret =3D 0; + iocb->all =3D all; + iocb->idx =3D zone_idx; + iocb->zone =3D NULL; =20 - (*resets)--; + req->aiocb =3D &iocb->common; + nvme_zone_reset_cb(iocb, 0); =20 - return *resets ? NVME_NO_COMPLETE : req->status; + return NVME_NO_COMPLETE; =20 case NVME_ZONE_ACTION_OFFLINE: if (all) { diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events index cd65f8b28895..dc00c2860db7 100644 --- a/hw/nvme/trace-events +++ b/hw/nvme/trace-events @@ -44,7 +44,6 @@ pci_nvme_compare_data_cb(uint16_t cid) "cid %"PRIu16"" pci_nvme_compare_mdata_cb(uint16_t cid) "cid %"PRIu16"" pci_nvme_aio_discard_cb(uint16_t cid) "cid %"PRIu16"" pci_nvme_aio_copy_in_cb(uint16_t cid) "cid %"PRIu16"" -pci_nvme_aio_zone_reset_cb(uint16_t cid, uint64_t zslba) "cid %"PRIu16" zs= lba 0x%"PRIx64"" pci_nvme_aio_flush_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" bl= k '%s'" pci_nvme_create_sq(uint64_t addr, uint16_t sqid, uint16_t cqid, uint16_t q= size, uint16_t qflags) "create submission queue, addr=3D0x%"PRIx64", sqid= =3D%"PRIu16", cqid=3D%"PRIu16", qsize=3D%"PRIu16", qflags=3D%"PRIu16"" pci_nvme_create_cq(uint64_t addr, uint16_t cqid, uint16_t vector, uint16_t= size, uint16_t qflags, int ien) "create completion queue, addr=3D0x%"PRIx6= 4", cqid=3D%"PRIu16", vector=3D%"PRIu16", qsize=3D%"PRIu16", qflags=3D%"PRI= u16", ien=3D%d" @@ -100,6 +99,7 @@ pci_nvme_open_zone(uint64_t slba, uint32_t zone_idx, int= all) "open zone, slba=3D% pci_nvme_close_zone(uint64_t slba, uint32_t zone_idx, int all) "close zone= , slba=3D%"PRIu64", idx=3D%"PRIu32", all=3D%"PRIi32"" pci_nvme_finish_zone(uint64_t slba, uint32_t zone_idx, int all) "finish zo= ne, slba=3D%"PRIu64", idx=3D%"PRIu32", all=3D%"PRIi32"" pci_nvme_reset_zone(uint64_t slba, uint32_t zone_idx, int all) "reset zone= , slba=3D%"PRIu64", idx=3D%"PRIu32", all=3D%"PRIi32"" +pci_nvme_zns_zone_reset(uint64_t zslba) "zslba 0x%"PRIx64"" pci_nvme_offline_zone(uint64_t slba, uint32_t zone_idx, int all) "offline = zone, slba=3D%"PRIu64", idx=3D%"PRIu32", all=3D%"PRIi32"" pci_nvme_set_descriptor_extension(uint64_t slba, uint32_t zone_idx) "set z= one descriptor extension, slba=3D%"PRIu64", idx=3D%"PRIu32"" pci_nvme_zd_extension_set(uint32_t zone_idx) "set descriptor extension for= zone_idx=3D%"PRIu32"" --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 162395936551446.9891477516104; Thu, 17 Jun 2021 12:49:25 -0700 (PDT) Received: from localhost ([::1]:39808 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lty0x-0001iw-Pg for importer@patchew.org; Thu, 17 Jun 2021 15:49:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56448) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMJ-0002lx-JX; Thu, 17 Jun 2021 15:07:23 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:36135) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMH-00037Q-BB; Thu, 17 Jun 2021 15:07:23 -0400 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id 9BB035C0068; Thu, 17 Jun 2021 15:07:20 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Thu, 17 Jun 2021 15:07:20 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:19 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=vBQePKlQL2ui/ j2YDU6QcePdqwp4M+k+mmdb0VstpZo=; b=c9ko9RJ6eZ00VHic384j1tydOIXjX Nv5GFXWxEY1jRHxTMZPjA1zUzRsD0sKk+2GbAV+HzUvNs6BEWOYn2DtNYeC9iG8a OJxOkT+f7nWnoWvr5snpo4QaV5BNv2FlwR/hBUF5UOQmyf4f3JhQTR89z4GjF5eo UoCAA79ldaBrczG2H5ih/GWv8Le7I6AJmjcGRILY9DZc5ZZd7yeFFQ3INi2v6o2R BF1xD5rbh/wlDKRhzgwHkmYPjG3Dpw06/6Gf6VsYmZIDd7QysuDcv7TFF0DouGyw LQMCtF/teCasr1u0GxikG7RL9n7X5lPfXw12pZMrjxq3nCbhR/ZcwCYmg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=vBQePKlQL2ui/j2YDU6QcePdqwp4M+k+mmdb0VstpZo=; b=S7ahrXWl u1xBD1lY3Itmy4BUFMa0TOaimqozAQf+KXu5O2t3VHlgXdjMmZROGGmqLDta3ctz zT/HTVqxFQbP12es2qC7mvUuCRkpjoaZ+XvFwY6LP9IBeJVv6ufQ3H9AxSP2bsfE cbjvAp7ouWo39kwbO9//vzl5knB9am20Xlfvb3DEFgt4xlSlnOmB5R7++KMUSODI cSzS5WxOxqe+hE2j/8A3LmWqLnfk+kzPZ43AX6yLoRxu+v+ml1EePAJ+F3C6Srco /hev3eBvJ7KyMH7fpUwUWhO9BcQ22h0NHLhCvOzIuoxqxixU1XARBTg7EtShzkQa HCeCeIvTVvi+Mg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 10/11] hw/nvme: reimplement format nvm to allow cancellation Date: Thu, 17 Jun 2021 21:06:56 +0200 Message-Id: <20210617190657.110823-11-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen Prior to this patch, the aios associated with broadcast format are submitted anonymously (no aiocb reference saved from the blk_aio call). Fix this by formatting the namespaces one after another, saving a reference to the aiocb for each. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/ctrl.c | 289 +++++++++++++++++++++++-------------------- hw/nvme/trace-events | 4 +- 2 files changed, 156 insertions(+), 137 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 6a8c1ff2271d..ec8ddb76cd39 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -1924,42 +1924,6 @@ out: nvme_rw_complete_cb(req, ret); } =20 -struct nvme_aio_format_ctx { - NvmeRequest *req; - NvmeNamespace *ns; - - /* number of outstanding write zeroes for this namespace */ - int *count; -}; - -static void nvme_aio_format_cb(void *opaque, int ret) -{ - struct nvme_aio_format_ctx *ctx =3D opaque; - NvmeRequest *req =3D ctx->req; - NvmeNamespace *ns =3D ctx->ns; - uintptr_t *num_formats =3D (uintptr_t *)&req->opaque; - int *count =3D ctx->count; - - g_free(ctx); - - if (ret) { - nvme_aio_err(req, ret); - } - - if (--(*count)) { - return; - } - - g_free(count); - ns->status =3D 0x0; - - if (--(*num_formats)) { - return; - } - - nvme_enqueue_req_completion(nvme_cq(req), req); -} - static void nvme_verify_cb(void *opaque, int ret) { NvmeBounceContext *ctx =3D opaque; @@ -5260,30 +5224,98 @@ static uint16_t nvme_ns_attachment(NvmeCtrl *n, Nvm= eRequest *req) return NVME_SUCCESS; } =20 -static uint16_t nvme_format_ns(NvmeCtrl *n, NvmeNamespace *ns, uint8_t lba= f, - uint8_t mset, uint8_t pi, uint8_t pil, - NvmeRequest *req) -{ - int64_t len, offset; - struct nvme_aio_format_ctx *ctx; - BlockBackend *blk =3D ns->blkconf.blk; - uint16_t ms; - uintptr_t *num_formats =3D (uintptr_t *)&req->opaque; - int *count; +typedef struct NvmeFormatAIOCB { + BlockAIOCB common; + BlockAIOCB *aiocb; + QEMUBH *bh; + NvmeRequest *req; + int ret; =20 + NvmeNamespace *ns; + uint32_t nsid; + bool broadcast; + int64_t offset; +} NvmeFormatAIOCB; + +static void nvme_format_bh(void *opaque); + +static void nvme_format_cancel(BlockAIOCB *aiocb) +{ + NvmeFormatAIOCB *iocb =3D container_of(aiocb, NvmeFormatAIOCB, common); + + if (iocb->aiocb) { + blk_aio_cancel_async(iocb->aiocb); + } +} + +static const AIOCBInfo nvme_format_aiocb_info =3D { + .aiocb_size =3D sizeof(NvmeFormatAIOCB), + .cancel_async =3D nvme_format_cancel, + .get_aio_context =3D nvme_get_aio_context, +}; + +static void nvme_format_set(NvmeNamespace *ns, NvmeCmd *cmd) +{ + uint32_t dw10 =3D le32_to_cpu(cmd->cdw10); + uint8_t lbaf =3D dw10 & 0xf; + uint8_t pi =3D (dw10 >> 5) & 0x7; + uint8_t mset =3D (dw10 >> 4) & 0x1; + uint8_t pil =3D (dw10 >> 8) & 0x1; + + trace_pci_nvme_format_set(ns->params.nsid, lbaf, mset, pi, pil); + + ns->id_ns.dps =3D (pil << 3) | pi; + ns->id_ns.flbas =3D lbaf | (mset << 4); + + nvme_ns_init_format(ns); +} + +static void nvme_format_ns_cb(void *opaque, int ret) +{ + NvmeFormatAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeNamespace *ns =3D iocb->ns; + int bytes; + + if (ret < 0) { + iocb->ret =3D ret; + goto done; + } + + assert(ns); + + if (iocb->offset < ns->size) { + bytes =3D MIN(BDRV_REQUEST_MAX_BYTES, ns->size - iocb->offset); + + iocb->aiocb =3D blk_aio_pwrite_zeroes(ns->blkconf.blk, iocb->offse= t, + bytes, BDRV_REQ_MAY_UNMAP, + nvme_format_ns_cb, iocb); + + iocb->offset +=3D bytes; + return; + } + + nvme_format_set(ns, &req->cmd); + ns->status =3D 0x0; + iocb->ns =3D NULL; + iocb->offset =3D 0; + +done: + iocb->aiocb =3D NULL; + qemu_bh_schedule(iocb->bh); +} + +static uint16_t nvme_format_check(NvmeNamespace *ns, uint8_t lbaf, uint8_t= pi) +{ if (ns->params.zoned) { return NVME_INVALID_FORMAT | NVME_DNR; } =20 - trace_pci_nvme_format_ns(nvme_cid(req), nvme_nsid(ns), lbaf, mset, pi,= pil); - if (lbaf > ns->id_ns.nlbaf) { return NVME_INVALID_FORMAT | NVME_DNR; } =20 - ms =3D ns->id_ns.lbaf[lbaf].ms; - - if (pi && (ms < sizeof(NvmeDifTuple))) { + if (pi && (ns->id_ns.lbaf[lbaf].ms < sizeof(NvmeDifTuple))) { return NVME_INVALID_FORMAT | NVME_DNR; } =20 @@ -5291,107 +5323,96 @@ static uint16_t nvme_format_ns(NvmeCtrl *n, NvmeNa= mespace *ns, uint8_t lbaf, return NVME_INVALID_FIELD | NVME_DNR; } =20 - nvme_ns_drain(ns); - nvme_ns_shutdown(ns); - nvme_ns_cleanup(ns); - - ns->id_ns.dps =3D (pil << 3) | pi; - ns->id_ns.flbas =3D lbaf | (mset << 4); - - nvme_ns_init_format(ns); - - ns->status =3D NVME_FORMAT_IN_PROGRESS; - - len =3D ns->size; - offset =3D 0; - - count =3D g_new(int, 1); - *count =3D 1; - - (*num_formats)++; - - while (len) { - ctx =3D g_new(struct nvme_aio_format_ctx, 1); - ctx->req =3D req; - ctx->ns =3D ns; - ctx->count =3D count; - - size_t bytes =3D MIN(BDRV_REQUEST_MAX_BYTES, len); - - (*count)++; - - blk_aio_pwrite_zeroes(blk, offset, bytes, BDRV_REQ_MAY_UNMAP, - nvme_aio_format_cb, ctx); - - offset +=3D bytes; - len -=3D bytes; - - } - - if (--(*count)) { - return NVME_NO_COMPLETE; - } - - g_free(count); - ns->status =3D 0x0; - (*num_formats)--; - return NVME_SUCCESS; } =20 -static uint16_t nvme_format(NvmeCtrl *n, NvmeRequest *req) +static void nvme_format_bh(void *opaque) { - NvmeNamespace *ns; + NvmeFormatAIOCB *iocb =3D opaque; + NvmeRequest *req =3D iocb->req; + NvmeCtrl *n =3D nvme_ctrl(req); uint32_t dw10 =3D le32_to_cpu(req->cmd.cdw10); - uint32_t nsid =3D le32_to_cpu(req->cmd.nsid); uint8_t lbaf =3D dw10 & 0xf; - uint8_t mset =3D (dw10 >> 4) & 0x1; uint8_t pi =3D (dw10 >> 5) & 0x7; - uint8_t pil =3D (dw10 >> 8) & 0x1; - uintptr_t *num_formats =3D (uintptr_t *)&req->opaque; uint16_t status; int i; =20 - trace_pci_nvme_format(nvme_cid(req), nsid, lbaf, mset, pi, pil); + if (iocb->ret < 0) { + goto done; + } =20 - /* 1-initialize; see the comment in nvme_dsm */ - *num_formats =3D 1; - - if (nsid !=3D NVME_NSID_BROADCAST) { - if (!nvme_nsid_valid(n, nsid)) { - return NVME_INVALID_NSID | NVME_DNR; - } - - ns =3D nvme_ns(n, nsid); - if (!ns) { - return NVME_INVALID_FIELD | NVME_DNR; - } - - status =3D nvme_format_ns(n, ns, lbaf, mset, pi, pil, req); - if (status && status !=3D NVME_NO_COMPLETE) { - req->status =3D status; - } - } else { - for (i =3D 1; i <=3D NVME_MAX_NAMESPACES; i++) { - ns =3D nvme_ns(n, i); - if (!ns) { - continue; - } - - status =3D nvme_format_ns(n, ns, lbaf, mset, pi, pil, req); - if (status && status !=3D NVME_NO_COMPLETE) { - req->status =3D status; + if (iocb->broadcast) { + for (i =3D iocb->nsid + 1; i <=3D NVME_MAX_NAMESPACES; i++) { + iocb->ns =3D nvme_ns(n, i); + if (iocb->ns) { + iocb->nsid =3D i; break; } } } =20 - /* account for the 1-initialization */ - if (--(*num_formats)) { - return NVME_NO_COMPLETE; + if (!iocb->ns) { + goto done; } =20 - return req->status; + status =3D nvme_format_check(iocb->ns, lbaf, pi); + if (status) { + req->status =3D status; + goto done; + } + + iocb->ns->status =3D NVME_FORMAT_IN_PROGRESS; + nvme_format_ns_cb(iocb, 0); + return; + +done: + qemu_bh_delete(iocb->bh); + iocb->bh =3D NULL; + + iocb->common.cb(iocb->common.opaque, iocb->ret); + + qemu_aio_unref(iocb); +} + +static uint16_t nvme_format(NvmeCtrl *n, NvmeRequest *req) +{ + NvmeFormatAIOCB *iocb; + uint32_t nsid =3D le32_to_cpu(req->cmd.nsid); + uint16_t status; + + iocb =3D qemu_aio_get(&nvme_format_aiocb_info, NULL, nvme_misc_cb, req= ); + + iocb->req =3D req; + iocb->bh =3D qemu_bh_new(nvme_format_bh, iocb); + iocb->ret =3D 0; + iocb->ns =3D NULL; + iocb->nsid =3D 0; + iocb->broadcast =3D (nsid =3D=3D NVME_NSID_BROADCAST); + iocb->offset =3D 0; + + if (!iocb->broadcast) { + if (!nvme_nsid_valid(n, nsid)) { + status =3D NVME_INVALID_NSID | NVME_DNR; + goto out; + } + + iocb->ns =3D nvme_ns(n, nsid); + if (!iocb->ns) { + status =3D NVME_INVALID_FIELD | NVME_DNR; + goto out; + } + } + + req->aiocb =3D &iocb->common; + qemu_bh_schedule(iocb->bh); + + return NVME_NO_COMPLETE; + +out: + qemu_bh_delete(iocb->bh); + iocb->bh =3D NULL; + qemu_aio_unref(iocb); + return status; } =20 static uint16_t nvme_admin_cmd(NvmeCtrl *n, NvmeRequest *req) diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events index dc00c2860db7..48d10c36e85b 100644 --- a/hw/nvme/trace-events +++ b/hw/nvme/trace-events @@ -10,9 +10,7 @@ pci_nvme_map_sgl(uint8_t typ, uint64_t len) "type 0x%"PRI= x8" len %"PRIu64"" pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode= , const char *opname) "cid %"PRIu16" nsid 0x%"PRIx32" sqid %"PRIu16" opc 0x= %"PRIx8" opname '%s'" pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char= *opname) "cid %"PRIu16" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'" pci_nvme_flush_ns(uint32_t nsid) "nsid 0x%"PRIx32"" -pci_nvme_format(uint16_t cid, uint32_t nsid, uint8_t lbaf, uint8_t mset, u= int8_t pi, uint8_t pil) "cid %"PRIu16" nsid %"PRIu32" lbaf %"PRIu8" mset %"= PRIu8" pi %"PRIu8" pil %"PRIu8"" -pci_nvme_format_ns(uint16_t cid, uint32_t nsid, uint8_t lbaf, uint8_t mset= , uint8_t pi, uint8_t pil) "cid %"PRIu16" nsid %"PRIu32" lbaf %"PRIu8" mset= %"PRIu8" pi %"PRIu8" pil %"PRIu8"" -pci_nvme_format_cb(uint16_t cid, uint32_t nsid) "cid %"PRIu16" nsid %"PRIu= 32"" +pci_nvme_format_set(uint32_t nsid, uint8_t lbaf, uint8_t mset, uint8_t pi,= uint8_t pil) "nsid %"PRIu32" lbaf %"PRIu8" mset %"PRIu8" pi %"PRIu8" pil %= "PRIu8"" pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, u= int64_t lba) "cid %"PRIu16" nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lb= a 0x%"PRIx64"" pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb= , uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" n= lb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64"" pci_nvme_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" --=20 2.32.0 From nobody Sat May 4 08:06:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623957596049642.2238409795982; Thu, 17 Jun 2021 12:19:56 -0700 (PDT) Received: from localhost ([::1]:51468 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ltxYP-0004BT-TF for importer@patchew.org; Thu, 17 Jun 2021 15:19:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56568) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMe-0003Fh-L3; Thu, 17 Jun 2021 15:07:44 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:34143) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ltxMd-00038D-1K; Thu, 17 Jun 2021 15:07:44 -0400 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id 44C205C01C9; Thu, 17 Jun 2021 15:07:22 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Thu, 17 Jun 2021 15:07:22 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 17 Jun 2021 15:07:20 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irrelevant.dk; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm3; bh=3mSDNuRqjjILD ecg4FdYMuDAbsIqEkKgQQYi4orBLYU=; b=U7OIfigpCRKuJiibAaoRiH7KCKP+G T9ddn9/42tMQNMWI9Q+p9hF7jO6Wi5RDbGLS7H9LbZJIe1JcVY96eSG+T4giCcRf GWCnpAjVuM8vQQOy6b5u6H+iOawc3z3pW1gv3aQvK44Y3q3uk35QAmqSs3U0SPb4 0+PP3gwaR30bekTDDda4n+xCYdfYz3HaQY7sjpopLaV41B0FZpeOp74snTAqhjEs q5J1YhNtu4tJl3ne9lg2NscUB77LKGhK/D0BLFdG7RROmhFkl9GmCMimpnbpdemA Lhn8Lj3E/bzmhK9PrTL2ABhlRzC8VGy6oJZkI8tt2r/eGW3NstkaxJnKg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=3mSDNuRqjjILDecg4FdYMuDAbsIqEkKgQQYi4orBLYU=; b=No1DF8cS NhJ0zTX/iyusO28GMOhDIxLhRyLI8qQFx82vF/GVDPp9etjCQG54ibXwjNrMAUJs ze8+Un94enHYwN9oGiF9bW1rdCwjBi7geOqjMUUJC1sq8qAWd2hj6zb9gRZIK2Sf Unw4mPO3cPd7WcGJVR/805i8NzgDfUaQ+910M8n2n/JtgrmWN17VNQI5vScI6Hq3 qd7iKEZYjuDPjURSrfvPYYq+0h1qJVnTXyLpakx8v7ECBPAdkcHNLeS0pf7/NtL5 I4uhda21DAC+qphEfUKaTrnh0bfB8Utke8/uT1bzsiacglAyYkQSFkRpJ9XKOKGf QVOrJNAvo+cEkQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfeefuddgudefudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepmfhlrghu shculfgvnhhsvghnuceoihhtshesihhrrhgvlhgvvhgrnhhtrdgukheqnecuggftrfgrth htvghrnhepueelteegieeuhffgkeefgfevjeeigfetkeeitdfgtdeifefhtdfhfeeuffev gfeknecuvehluhhsthgvrhfuihiivgepvdenucfrrghrrghmpehmrghilhhfrhhomhepih htshesihhrrhgvlhgvvhgrnhhtrdgukh X-ME-Proxy: From: Klaus Jensen To: qemu-devel@nongnu.org Subject: [PATCH v2 11/11] Partially revert "hw/block/nvme: drain namespaces on sq deletion" Date: Thu, 17 Jun 2021 21:06:57 +0200 Message-Id: <20210617190657.110823-12-its@irrelevant.dk> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210617190657.110823-1-its@irrelevant.dk> References: <20210617190657.110823-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=66.111.4.25; envelope-from=its@irrelevant.dk; helo=out1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Kevin Wolf , Vladimir Sementsov-Ogievskiy , qemu-block@nongnu.org, Klaus Jensen , Max Reitz , Keith Busch , Stefan Hajnoczi , Klaus Jensen Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Klaus Jensen This partially reverts commit 98f84f5a4eca5c03e32fff20f246d9b4b96d6422. Since all "multi aio" commands are now reimplemented to properly track the nested aiocbs, we can revert the "hack" that was introduced to make sure all requests we're properly drained upon sq deletion. The revert is partial since we keep the assert that no outstanding requests remain on the submission queue after the explicit cancellation. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- hw/nvme/ctrl.c | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index ec8ddb76cd39..5a1d25265a9d 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -3918,7 +3918,6 @@ static uint16_t nvme_del_sq(NvmeCtrl *n, NvmeRequest = *req) NvmeSQueue *sq; NvmeCQueue *cq; uint16_t qid =3D le16_to_cpu(c->qid); - uint32_t nsid; =20 if (unlikely(!qid || nvme_check_sqid(n, qid))) { trace_pci_nvme_err_invalid_del_sq(qid); @@ -3930,22 +3929,8 @@ static uint16_t nvme_del_sq(NvmeCtrl *n, NvmeRequest= *req) sq =3D n->sq[qid]; while (!QTAILQ_EMPTY(&sq->out_req_list)) { r =3D QTAILQ_FIRST(&sq->out_req_list); - if (r->aiocb) { - blk_aio_cancel(r->aiocb); - } - } - - /* - * Drain all namespaces if there are still outstanding requests that we - * could not cancel explicitly. - */ - if (!QTAILQ_EMPTY(&sq->out_req_list)) { - for (nsid =3D 1; nsid <=3D NVME_MAX_NAMESPACES; nsid++) { - NvmeNamespace *ns =3D nvme_ns(n, nsid); - if (ns) { - nvme_ns_drain(ns); - } - } + assert(r->aiocb); + blk_aio_cancel(r->aiocb); } =20 assert(QTAILQ_EMPTY(&sq->out_req_list)); --=20 2.32.0