From nobody Tue Feb 10 17:13:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1623312899; cv=none; d=zohomail.com; s=zohoarc; b=ir9cbemjGkvrI4x2jrAyia3le6gWCCf52ZF2KZMGfOZlr5Ajr6t7LqJKRY66U3PkbmS96PENyqDcrxGQg3cfrZOu/kmlctPr9X3nakJQ7j2ZqHvuXdO+u7UCnlU+lZ/+kfSk0A5MajvUJqttwSizWS76YTbkGrElxwtU0tv7J20= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1623312899; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=q1F2fftV59DYjAAg2g097MRZ19V1XvvdJKyV2FLD/SQ=; b=ANuSQTLNSlJ2lGawE1PQFyIOE+Y44iedrDGqT0kCb4AEFPuettFkqJYfG+7HrhgEvJ3ZhK2fKZ4QARlMQPhYZE5se5rLZlg6svxZPx4vyKzutZEecnnuErb9OBoyWeNwWP2opQKJfrZgrNNRrpI3aIvbyo4V6Phm1Fyu4moSRD0= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1623312899043421.3397064190192; Thu, 10 Jun 2021 01:14:59 -0700 (PDT) Received: from localhost ([::1]:42970 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrFq5-0002d8-TG for importer@patchew.org; Thu, 10 Jun 2021 04:14:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41814) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrFiT-0008Sp-TV; Thu, 10 Jun 2021 04:07:10 -0400 Received: from out28-145.mail.aliyun.com ([115.124.28.145]:33821) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrFiO-0001nV-2s; Thu, 10 Jun 2021 04:07:05 -0400 Received: from localhost.localdomain(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.KQMZbrT_1623312412) by smtp.aliyun-inc.com(10.147.42.197); Thu, 10 Jun 2021 16:06:52 +0800 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07436317|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.620553-0.00353106-0.375916; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047207; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.KQMZbrT_1623312412; From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v2 15/37] target/riscv: Signed MSW 32x32 Multiply and Add Instructions Date: Thu, 10 Jun 2021 15:58:46 +0800 Message-Id: <20210610075908.3305506-16-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210610075908.3305506-1-zhiwei_liu@c-sky.com> References: <20210610075908.3305506-1-zhiwei_liu@c-sky.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=115.124.28.145; envelope-from=zhiwei_liu@c-sky.com; helo=out28-145.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Always contain a 32x32 multiplification and the most significant word can be used as the result, or an operand for an add or subtract operation with rounding or saturation. Signed-off-by: LIU Zhiwei --- target/riscv/helper.h | 9 ++ target/riscv/insn32.decode | 9 ++ target/riscv/insn_trans/trans_rvp.c.inc | 44 ++++++++++ target/riscv/packed_helper.c | 109 ++++++++++++++++++++++++ 4 files changed, 171 insertions(+) diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 9872f5efbd..600e8dee44 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -1271,3 +1271,12 @@ DEF_HELPER_3(pkbb16, tl, env, tl, tl) DEF_HELPER_3(pkbt16, tl, env, tl, tl) DEF_HELPER_3(pktt16, tl, env, tl, tl) DEF_HELPER_3(pktb16, tl, env, tl, tl) + +DEF_HELPER_3(smmul, tl, env, tl, tl) +DEF_HELPER_3(smmul_u, tl, env, tl, tl) +DEF_HELPER_4(kmmac, tl, env, tl, tl, tl) +DEF_HELPER_4(kmmac_u, tl, env, tl, tl, tl) +DEF_HELPER_4(kmmsb, tl, env, tl, tl, tl) +DEF_HELPER_4(kmmsb_u, tl, env, tl, tl, tl) +DEF_HELPER_3(kwmmul, tl, env, tl, tl) +DEF_HELPER_3(kwmmul_u, tl, env, tl, tl) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 0b6830c76e..0484de140b 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -874,3 +874,12 @@ pkbb16 0000111 ..... ..... 001 ..... 1110111 @r pkbt16 0001111 ..... ..... 001 ..... 1110111 @r pktt16 0010111 ..... ..... 001 ..... 1110111 @r pktb16 0011111 ..... ..... 001 ..... 1110111 @r + +smmul 0100000 ..... ..... 001 ..... 1110111 @r +smmul_u 0101000 ..... ..... 001 ..... 1110111 @r +kmmac 0110000 ..... ..... 001 ..... 1110111 @r +kmmac_u 0111000 ..... ..... 001 ..... 1110111 @r +kmmsb 0100001 ..... ..... 001 ..... 1110111 @r +kmmsb_u 0101001 ..... ..... 001 ..... 1110111 @r +kwmmul 0110001 ..... ..... 001 ..... 1110111 @r +kwmmul_u 0111001 ..... ..... 001 ..... 1110111 @r diff --git a/target/riscv/insn_trans/trans_rvp.c.inc b/target/riscv/insn_tr= ans/trans_rvp.c.inc index b5bd8b1406..073558b950 100644 --- a/target/riscv/insn_trans/trans_rvp.c.inc +++ b/target/riscv/insn_trans/trans_rvp.c.inc @@ -369,3 +369,47 @@ GEN_RVP_R_OOL(pkbb16); GEN_RVP_R_OOL(pkbt16); GEN_RVP_R_OOL(pktt16); GEN_RVP_R_OOL(pktb16); + +/* Most Significant Word =E2=80=9C32x32=E2=80=9D Multiply & Add Instructio= ns */ +GEN_RVP_R_OOL(smmul); +GEN_RVP_R_OOL(smmul_u); + +/* Function to accumulate destination register */ +static inline bool r_acc_ool(DisasContext *ctx, arg_r *a, + void (* fn)(TCGv, TCGv_ptr, TCGv, TCGv, TCGv)) +{ + TCGv src1, src2, src3, dst; + if (!has_ext(ctx, RVP)) { + return false; + } + + src1 =3D tcg_temp_new(); + src2 =3D tcg_temp_new(); + src3 =3D tcg_temp_new(); + dst =3D tcg_temp_new(); + + gen_get_gpr(src1, a->rs1); + gen_get_gpr(src2, a->rs2); + gen_get_gpr(src3, a->rd); + fn(dst, cpu_env, src1, src2, src3); + gen_set_gpr(a->rd, dst); + + tcg_temp_free(src1); + tcg_temp_free(src2); + tcg_temp_free(src3); + tcg_temp_free(dst); + return true; +} + +#define GEN_RVP_R_ACC_OOL(NAME) \ +static bool trans_##NAME(DisasContext *s, arg_r *a) \ +{ \ + return r_acc_ool(s, a, gen_helper_##NAME); \ +} + +GEN_RVP_R_ACC_OOL(kmmac); +GEN_RVP_R_ACC_OOL(kmmac_u); +GEN_RVP_R_ACC_OOL(kmmsb); +GEN_RVP_R_ACC_OOL(kmmsb_u); +GEN_RVP_R_OOL(kwmmul); +GEN_RVP_R_OOL(kwmmul_u); diff --git a/target/riscv/packed_helper.c b/target/riscv/packed_helper.c index f6cea654b2..465cb5a3b3 100644 --- a/target/riscv/packed_helper.c +++ b/target/riscv/packed_helper.c @@ -1359,3 +1359,112 @@ static inline void do_pktb16(CPURISCVState *env, vo= id *vd, void *va, } =20 RVPR(pktb16, 2, 2); + +/* Most Significant Word =E2=80=9C32x32=E2=80=9D Multiply & Add Instructio= ns */ +static inline void do_smmul(CPURISCVState *env, void *vd, void *va, + void *vb, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb; + d[i] =3D (int64_t)a[i] * b[i] >> 32; +} + +RVPR(smmul, 1, 4); + +static inline void do_smmul_u(CPURISCVState *env, void *vd, void *va, + void *vb, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb; + d[i] =3D ((int64_t)a[i] * b[i] + (uint32_t)INT32_MIN) >> 32; +} + +RVPR(smmul_u, 1, 4); + +typedef void PackedFn4i(CPURISCVState *, void *, void *, + void *, void *, uint8_t); + +static inline target_ulong +rvpr_acc(CPURISCVState *env, target_ulong a, + target_ulong b, target_ulong c, + uint8_t step, uint8_t size, PackedFn4i *fn) +{ + int i, passes =3D sizeof(target_ulong) / size; + target_ulong result =3D 0; + + for (i =3D 0; i < passes; i +=3D step) { + fn(env, &result, &a, &b, &c, i); + } + return result; +} + +#define RVPR_ACC(NAME, STEP, SIZE) \ +target_ulong HELPER(NAME)(CPURISCVState *env, target_ulong a, \ + target_ulong b, target_ulong c) \ +{ \ + return rvpr_acc(env, a, b, c, STEP, SIZE, (PackedFn4i *)do_##NAME);\ +} + +static inline void do_kmmac(CPURISCVState *env, void *vd, void *va, + void *vb, void *vc, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb, *c =3D vc; + d[i] =3D sadd32(env, 0, ((int64_t)a[i] * b[i]) >> 32, c[i]); +} + +RVPR_ACC(kmmac, 1, 4); + +static inline void do_kmmac_u(CPURISCVState *env, void *vd, void *va, + void *vb, void *vc, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb, *c =3D vc; + d[i] =3D sadd32(env, 0, ((int64_t)a[i] * b[i] + + (uint32_t)INT32_MIN) >> 32, c[i]); +} + +RVPR_ACC(kmmac_u, 1, 4); + +static inline void do_kmmsb(CPURISCVState *env, void *vd, void *va, + void *vb, void *vc, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb, *c =3D vc; + d[i] =3D ssub32(env, 0, c[i], (int64_t)a[i] * b[i] >> 32); +} + +RVPR_ACC(kmmsb, 1, 4); + +static inline void do_kmmsb_u(CPURISCVState *env, void *vd, void *va, + void *vb, void *vc, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb, *c =3D vc; + d[i] =3D ssub32(env, 0, c[i], ((int64_t)a[i] * b[i] + + (uint32_t)INT32_MIN) >> 32); +} + +RVPR_ACC(kmmsb_u, 1, 4); + +static inline void do_kwmmul(CPURISCVState *env, void *vd, void *va, + void *vb, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb; + if (a[i] =3D=3D INT32_MIN && b[i] =3D=3D INT32_MIN) { + env->vxsat =3D 0x1; + d[i] =3D INT32_MAX; + } else { + d[i] =3D (int64_t)a[i] * b[i] >> 31; + } +} + +RVPR(kwmmul, 1, 4); + +static inline void do_kwmmul_u(CPURISCVState *env, void *vd, void *va, + void *vb, uint8_t i) +{ + int32_t *d =3D vd, *a =3D va, *b =3D vb; + if (a[i] =3D=3D INT32_MIN && b[i] =3D=3D INT32_MIN) { + env->vxsat =3D 0x1; + d[i] =3D INT32_MAX; + } else { + d[i] =3D ((int64_t)a[i] * b[i] + (1ull << 30)) >> 31; + } +} + +RVPR(kwmmul_u, 1, 4); --=20 2.25.1